diff --git a/.mxproject b/.mxproject index 5a27921..e9dcbb9 100644 --- a/.mxproject +++ b/.mxproject @@ -1,5 +1,5 @@ [PreviousLibFiles] -LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f439xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/core_cm85.h;Drivers/CMSIS/Include/core_cm55.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/pac_armv81.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/cachel1_armv7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/pmu_armv8.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_starmc1.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_armv8mbl.h; +LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f439xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/cachel1_armv7.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm85.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/pac_armv81.h;Drivers/CMSIS/Include/core_cm55.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_starmc1.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/pmu_armv8.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_cm4.h; [PreviousUsedCubeIDEFiles] SourceFiles=Core/Src/main.c;Core/Src/stm32f4xx_it.c;Core/Src/stm32f4xx_hal_msp.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Core/Src/system_stm32f4xx.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Core/Src/system_stm32f4xx.c;;; diff --git a/Core/Inc/main.h b/Core/Inc/main.h index b8cd27e..6a12cb6 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -117,7 +117,18 @@ struct prng { unsigned long long seed; unsigned long long output; //unsigned int checksum; -} /*__attribute__((packed))*/; +}; + +#define CSPRNG_VERS 0x1 + +/* Define all commands */ +#define CSPRNG_CMD_GET_RNG 0x10 + + +struct cmd{ + int version; + int cmd; +}; /* USER CODE END Private defines */ diff --git a/Core/Inc/stm32f4xx_it.h b/Core/Inc/stm32f4xx_it.h index 381ec28..65d1a19 100644 --- a/Core/Inc/stm32f4xx_it.h +++ b/Core/Inc/stm32f4xx_it.h @@ -55,7 +55,6 @@ void SVC_Handler(void); void DebugMon_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); -void USART3_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/Core/Src/main.c b/Core/Src/main.c index 0239501..ae4639b 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -1,605 +1,642 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file : main.c - * @brief : Main program body - ****************************************************************************** - * @attention - * - * Copyright (c) 2026 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -#include "string.h" - -/* Private includes ----------------------------------------------------------*/ -/* USER CODE BEGIN Includes */ -#include"csprng.h" -#include -struct entropy_pool s_entropy; - -/* USER CODE END Includes */ - -/* Private typedef -----------------------------------------------------------*/ -/* USER CODE BEGIN PTD */ - -/* USER CODE END PTD */ - -/* Private define ------------------------------------------------------------*/ -/* USER CODE BEGIN PD */ - -/* USER CODE END PD */ - -/* Private macro -------------------------------------------------------------*/ -/* USER CODE BEGIN PM */ - -/* USER CODE END PM */ - -/* Private variables ---------------------------------------------------------*/ - -ETH_TxPacketConfig TxConfig; -ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */ -ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */ - -ETH_HandleTypeDef heth; - -RNG_HandleTypeDef hrng; - -UART_HandleTypeDef huart3; - -PCD_HandleTypeDef hpcd_USB_OTG_FS; - -/* USER CODE BEGIN PV */ - -/* USER CODE END PV */ - -/* Private function prototypes -----------------------------------------------*/ -void SystemClock_Config(void); -static void MX_GPIO_Init(void); -static void MX_ETH_Init(void); -static void MX_USART3_UART_Init(void); -static void MX_USB_OTG_FS_PCD_Init(void); -static void MX_RNG_Init(void); -/* USER CODE BEGIN PFP */ - -/* USER CODE END PFP */ - -/* Private user code ---------------------------------------------------------*/ -/* USER CODE BEGIN 0 */ - -/* - * Fill the entropy structure with random data - */ -void init_entropy(){ - - // Generate entropy - memset(&s_entropy, 0, sizeof(s_entropy)); - - while(s_entropy.pool_size < BUFSIZE){ - generateEntropy(s_entropy.position++); - s_entropy.pool_size++; - - // Add a delay for avoiding the same value - //delay(50); - } - /* We start at 0, ready for pickup to the pool */ - s_entropy.position = 0; -} - -/* - * Generate a random value from the analog input - * Store the value in the entropy structure at the position specified in argument - */ -static void generateEntropy(int position){ - unsigned int sensorValue = 0; - - //RNG->CR|=RNG_CR_RNGEN; - RNG->CR = RNG_CR_RNGEN; /* RNG_CR_RNGEN -> 4 */ - - while (sensorValue == 0){ - HAL_GPIO_TogglePin (GPIOB, GPIO_PIN_0); - HAL_Delay (100); /* Insert delay 100 ms */ - - // Wait until the data is ready - while (RNG_SR_DRDY == 0); - - uint32_t random = RNG->DR; - - sensorValue = abs(random); - - if (sensorValue != 0){ - if(sensorValue <= 10) - sensorValue = sensorValue << 5; - else if(sensorValue > 10 && sensorValue <= 100) - sensorValue = sensorValue << 4; - - s_entropy.buf[position] = sensorValue; - } - } -} - -/* - * Pick a random data from the entropy pool - * This function is the API function to get the random number from the pool - */ -unsigned int prng(){ - unsigned int p = 0; - - if (s_entropy.position == BUFSIZE) - s_entropy.position = 0; - - // We consume the entropy - p = s_entropy.buf[s_entropy.position]; - s_entropy.pool_size--; - - // We have consumed the entropy, we replace the value by a new one - generateEntropy(s_entropy.position); - - s_entropy.position++; - - return p; -} - -/* - * For the Blum-Blum-Shub, we need to find a prime number and must be congruent 3 modulo 4 - */ -static void prime_number_finder(unsigned int *p){ - while(!isPrimeNumber(*p) || (*p % 4 != 3)) - *p += 1; -} -/* - * Check if the number specified is a prime number - */ -static int isPrimeNumber(unsigned int x){ - for (int i = 0; i < SIEVES_LEN; i++){ - if (x % sieves[i] == 0) - return 0; - } - return 1; -} -/* - * This function find the GCD - */ -static int gcd(unsigned long a, unsigned long b){ - if (b == 0) - return a; - return gcd(b, a % b); -} - -unsigned int random_range(int min, int max){ - // Wait until the data is ready - while (RNG_SR_DRDY == 0); - - uint32_t random = RNG->DR; - return (random % max) + 1; -} - -static unsigned short csum(unsigned short *buf, int nwords) { - unsigned long sum = 0; - while (nwords > 0) { - sum += *buf++; - nwords--; - } - sum = (sum >> 16) + (sum & 0xFFFF); - sum += (sum >> 16); - return (unsigned short)(~sum); -} - -/* - * This function implement the Blum-Blum-Shub algorithm - * Based on the algorithm described in the Chapter 5: - * https://cacr.uwaterloo.ca/hac/about/chap5.pdf - */ -static unsigned long long bbs(unsigned int *p, unsigned int *q, unsigned long long *s){ - /* We pickup data from the entropy pool */ - unsigned int p1 = prng(); - unsigned int p2 = prng(); - unsigned long long n = 0, seed = 0; - - // We check if they are prime numbers - prime_number_finder(&p1); - prime_number_finder(&p2); - *p = p1; - *q = p2; - - n = (unsigned long long)p1 * (unsigned long long)p2; - - /* - * We need to find the seed - * between 1 < s < n - 1 and gcd(s, n) = 1 - */ - seed = random_range(1, n); - while (gcd(seed, n) != 1) - seed += 1; - *s = seed; - - unsigned long long x0 = (seed * seed) % n; - - unsigned long long tmp = x0; - - char output[ITER_BBS]; - memset(output, 0, ITER_BBS); - int pos = 0; - for (size_t i = 1; i < ITER_BBS; i++){ - unsigned long long x = (tmp * tmp) % n; - output[pos++] = (x & 1) + '0'; - tmp = x; - } - - /* We convert the bit sequence to unsigned long long */ - unsigned long long res = 0; - for (int i = 0; i < strlen(output); i++) - res = (res << 1) + output[i] - '0'; - - return res; -} - - -/* USER CODE END 0 */ - -/** - * @brief The application entry point. - * @retval int - */ -int main(void) -{ - - /* USER CODE BEGIN 1 */ - - /* USER CODE END 1 */ - - /* MCU Configuration--------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - - /* USER CODE BEGIN Init */ - - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - MX_ETH_Init(); - MX_USART3_UART_Init(); - MX_USB_OTG_FS_PCD_Init(); - MX_RNG_Init(); - /* USER CODE BEGIN 2 */ - init_entropy(); - - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - - - uint8_t buffer[sizeof(struct prng)]; - uint8_t buf_recv; - - while (1) - { - /* USER CODE END WHILE */ - - /* USER CODE BEGIN 3 */ - HAL_StatusTypeDef status = HAL_UART_Receive(&huart3, &buf_recv, 1, 100); - - if (status == HAL_OK){ - if (buf_recv == 1){ - struct prng s_prng = {0}; - - memset(buffer, 0, sizeof(struct prng)); - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_SET); - - - unsigned long long random = bbs(&s_prng.p, &s_prng.q, &s_prng.seed); - s_prng.output = random; - memcpy(buffer, &s_prng, sizeof(struct prng)); - - HAL_StatusTypeDef s = HAL_UART_Transmit(&huart3, buffer, sizeof(struct prng), 0xF); - - // We have finished, we disable the pin - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET); - } - } - - } - /* USER CODE END 3 */ -} - -/** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) -{ - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - - /** Configure the main internal regulator output voltage - */ - __HAL_RCC_PWR_CLK_ENABLE(); - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - - /** Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 4; - RCC_OscInitStruct.PLL.PLLN = 168; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = 7; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - Error_Handler(); - } - - /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) - { - Error_Handler(); - } -} - -/** - * @brief ETH Initialization Function - * @param None - * @retval None - */ -static void MX_ETH_Init(void) -{ - - /* USER CODE BEGIN ETH_Init 0 */ - - /* USER CODE END ETH_Init 0 */ - - static uint8_t MACAddr[6]; - - /* USER CODE BEGIN ETH_Init 1 */ - - /* USER CODE END ETH_Init 1 */ - heth.Instance = ETH; - MACAddr[0] = 0x00; - MACAddr[1] = 0x80; - MACAddr[2] = 0xE1; - MACAddr[3] = 0x00; - MACAddr[4] = 0x00; - MACAddr[5] = 0x00; - heth.Init.MACAddr = &MACAddr[0]; - heth.Init.MediaInterface = HAL_ETH_RMII_MODE; - heth.Init.TxDesc = DMATxDscrTab; - heth.Init.RxDesc = DMARxDscrTab; - heth.Init.RxBuffLen = 1524; - - /* USER CODE BEGIN MACADDRESS */ - - /* USER CODE END MACADDRESS */ - - if (HAL_ETH_Init(&heth) != HAL_OK) - { - Error_Handler(); - } - - memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); - TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; - TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; - TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; - /* USER CODE BEGIN ETH_Init 2 */ - - /* USER CODE END ETH_Init 2 */ - -} - -/** - * @brief RNG Initialization Function - * @param None - * @retval None - */ -static void MX_RNG_Init(void) -{ - - /* USER CODE BEGIN RNG_Init 0 */ - - /* USER CODE END RNG_Init 0 */ - - /* USER CODE BEGIN RNG_Init 1 */ - - /* USER CODE END RNG_Init 1 */ - hrng.Instance = RNG; - if (HAL_RNG_Init(&hrng) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN RNG_Init 2 */ - - /* USER CODE END RNG_Init 2 */ - -} - -/** - * @brief USART3 Initialization Function - * @param None - * @retval None - */ -static void MX_USART3_UART_Init(void) -{ - - /* USER CODE BEGIN USART3_Init 0 */ - - /* USER CODE END USART3_Init 0 */ - - /* USER CODE BEGIN USART3_Init 1 */ - - /* USER CODE END USART3_Init 1 */ - huart3.Instance = USART3; - huart3.Init.BaudRate = 115200; - huart3.Init.WordLength = UART_WORDLENGTH_8B; - huart3.Init.StopBits = UART_STOPBITS_1; - huart3.Init.Parity = UART_PARITY_NONE; - huart3.Init.Mode = UART_MODE_TX_RX; - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart3.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart3) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USART3_Init 2 */ - - /* USER CODE END USART3_Init 2 */ - -} - -/** - * @brief USB_OTG_FS Initialization Function - * @param None - * @retval None - */ -static void MX_USB_OTG_FS_PCD_Init(void) -{ - - /* USER CODE BEGIN USB_OTG_FS_Init 0 */ - - /* USER CODE END USB_OTG_FS_Init 0 */ - - /* USER CODE BEGIN USB_OTG_FS_Init 1 */ - - /* USER CODE END USB_OTG_FS_Init 1 */ - hpcd_USB_OTG_FS.Instance = USB_OTG_FS; - hpcd_USB_OTG_FS.Init.dev_endpoints = 4; - hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; - hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; - hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; - hpcd_USB_OTG_FS.Init.Sof_enable = ENABLE; - hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; - hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; - hpcd_USB_OTG_FS.Init.vbus_sensing_enable = ENABLE; - hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; - if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USB_OTG_FS_Init 2 */ - - /* USER CODE END USB_OTG_FS_Init 2 */ - -} - -/** - * @brief GPIO Initialization Function - * @param None - * @retval None - */ -static void MX_GPIO_Init(void) -{ - GPIO_InitTypeDef GPIO_InitStruct = {0}; - /* USER CODE BEGIN MX_GPIO_Init_1 */ - - /* USER CODE END MX_GPIO_Init_1 */ - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOH_CLK_ENABLE(); - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - __HAL_RCC_GPIOG_CLK_ENABLE(); - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, LD1_Pin|LD3_Pin|LD2_Pin, GPIO_PIN_RESET); - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(USB_PowerSwitchOn_GPIO_Port, USB_PowerSwitchOn_Pin, GPIO_PIN_RESET); - - /*Configure GPIO pin : USER_Btn_Pin */ - GPIO_InitStruct.Pin = USER_Btn_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(USER_Btn_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pins : LD1_Pin LD3_Pin LD2_Pin */ - GPIO_InitStruct.Pin = LD1_Pin|LD3_Pin|LD2_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /*Configure GPIO pin : USB_PowerSwitchOn_Pin */ - GPIO_InitStruct.Pin = USB_PowerSwitchOn_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(USB_PowerSwitchOn_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pin : USB_OverCurrent_Pin */ - GPIO_InitStruct.Pin = USB_OverCurrent_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(USB_OverCurrent_GPIO_Port, &GPIO_InitStruct); - - /* USER CODE BEGIN MX_GPIO_Init_2 */ - - /* USER CODE END MX_GPIO_Init_2 */ -} - -/* USER CODE BEGIN 4 */ -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) -{ - if (huart->Instance == USART3) - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET); -} -/* USER CODE END 4 */ - -/** - * @brief This function is executed in case of error occurrence. - * @retval None - */ -void Error_Handler(void) -{ - /* USER CODE BEGIN Error_Handler_Debug */ - /* User can add his own implementation to report the HAL error return state */ - __disable_irq(); - while (1) - { - } - /* USER CODE END Error_Handler_Debug */ -} -#ifdef USE_FULL_ASSERT -/** - * @brief Reports the name of the source file and the source line number - * where the assert_param error has occurred. - * @param file: pointer to the source file name - * @param line: assert_param error line source number - * @retval None - */ -void assert_failed(uint8_t *file, uint32_t line) -{ - /* USER CODE BEGIN 6 */ - /* User can add his own implementation to report the file name and line number, - ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ - /* USER CODE END 6 */ -} -#endif /* USE_FULL_ASSERT */ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "string.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include"csprng.h" +#include +struct entropy_pool s_entropy; + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ + +ETH_TxPacketConfig TxConfig; +ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */ +ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */ + +ETH_HandleTypeDef heth; + +RNG_HandleTypeDef hrng; + +UART_HandleTypeDef huart3; +UART_HandleTypeDef huart6; + +PCD_HandleTypeDef hpcd_USB_OTG_FS; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_ETH_Init(void); +static void MX_USART3_UART_Init(void); +static void MX_USB_OTG_FS_PCD_Init(void); +static void MX_RNG_Init(void); +static void MX_USART6_UART_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* + * Fill the entropy structure with random data + */ +void init_entropy(){ + + // Generate entropy + memset(&s_entropy, 0, sizeof(s_entropy)); + + while(s_entropy.pool_size < BUFSIZE){ + generateEntropy(s_entropy.position++); + s_entropy.pool_size++; + + // Add a delay for avoiding the same value + //delay(50); + } + /* We start at 0, ready for pickup to the pool */ + s_entropy.position = 0; +} + +/* + * Generate a random value from the analog input + * Store the value in the entropy structure at the position specified in argument + */ +static void generateEntropy(int position){ + unsigned int sensorValue = 0; + + //RNG->CR|=RNG_CR_RNGEN; + RNG->CR = RNG_CR_RNGEN; /* RNG_CR_RNGEN -> 4 */ + + while (sensorValue == 0){ + HAL_GPIO_TogglePin (GPIOB, GPIO_PIN_0); + HAL_Delay (100); /* Insert delay 100 ms */ + + // Wait until the data is ready + while (RNG_SR_DRDY == 0); + + uint32_t random = RNG->DR; + + sensorValue = abs(random); + + if (sensorValue != 0){ + if(sensorValue <= 10) + sensorValue = sensorValue << 5; + else if(sensorValue > 10 && sensorValue <= 100) + sensorValue = sensorValue << 4; + + s_entropy.buf[position] = sensorValue; + } + } +} + +/* + * Pick a random data from the entropy pool + * This function is the API function to get the random number from the pool + */ +unsigned int prng(){ + unsigned int p = 0; + + if (s_entropy.position == BUFSIZE) + s_entropy.position = 0; + + // We consume the entropy + p = s_entropy.buf[s_entropy.position]; + s_entropy.pool_size--; + + // We have consumed the entropy, we replace the value by a new one + generateEntropy(s_entropy.position); + + s_entropy.position++; + + return p; +} + +/* + * For the Blum-Blum-Shub, we need to find a prime number and must be congruent 3 modulo 4 + */ +static void prime_number_finder(unsigned int *p){ + while(!isPrimeNumber(*p) || (*p % 4 != 3)) + *p += 1; +} +/* + * Check if the number specified is a prime number + */ +static int isPrimeNumber(unsigned int x){ + for (int i = 0; i < SIEVES_LEN; i++){ + if (x % sieves[i] == 0) + return 0; + } + return 1; +} +/* + * This function find the GCD + */ +static int gcd(unsigned long a, unsigned long b){ + if (b == 0) + return a; + return gcd(b, a % b); +} + +unsigned int random_range(int min, int max){ + // Wait until the data is ready + while (RNG_SR_DRDY == 0); + + uint32_t random = RNG->DR; + return (random % max) + 1; +} + +static unsigned short csum(unsigned short *buf, int nwords) { + unsigned long sum = 0; + while (nwords > 0) { + sum += *buf++; + nwords--; + } + sum = (sum >> 16) + (sum & 0xFFFF); + sum += (sum >> 16); + return (unsigned short)(~sum); +} + +/* + * This function implement the Blum-Blum-Shub algorithm + * Based on the algorithm described in the Chapter 5: + * https://cacr.uwaterloo.ca/hac/about/chap5.pdf + */ +static unsigned long long bbs(unsigned int *p, unsigned int *q, unsigned long long *s){ + /* We pickup data from the entropy pool */ + unsigned int p1 = prng(); + unsigned int p2 = prng(); + unsigned long long n = 0, seed = 0; + + // We check if they are prime numbers + prime_number_finder(&p1); + prime_number_finder(&p2); + *p = p1; + *q = p2; + + n = (unsigned long long)p1 * (unsigned long long)p2; + + /* + * We need to find the seed + * between 1 < s < n - 1 and gcd(s, n) = 1 + */ + seed = random_range(1, n); + while (gcd(seed, n) != 1) + seed += 1; + *s = seed; + + unsigned long long x0 = (seed * seed) % n; + + unsigned long long tmp = x0; + + char output[ITER_BBS]; + memset(output, 0, ITER_BBS); + int pos = 0; + for (size_t i = 1; i < ITER_BBS; i++){ + unsigned long long x = (tmp * tmp) % n; + output[pos++] = (x & 1) + '0'; + tmp = x; + } + + /* We convert the bit sequence to unsigned long long */ + unsigned long long res = 0; + for (int i = 0; i < strlen(output); i++) + res = (res << 1) + output[i] - '0'; + + return res; +} + + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_ETH_Init(); + MX_USART3_UART_Init(); + MX_USB_OTG_FS_PCD_Init(); + MX_RNG_Init(); + MX_USART6_UART_Init(); + /* USER CODE BEGIN 2 */ + init_entropy(); + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + + + uint8_t buffer[sizeof(struct prng)]; + uint8_t buf_recv[sizeof(struct cmd)]; + + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + HAL_StatusTypeDef status = HAL_UART_Receive(&huart6, buf_recv, sizeof(struct cmd), 100); + + if (status == HAL_OK){ + struct cmd *s_cmd = (struct cmd *)buf_recv; + if (s_cmd->cmd == CSPRNG_CMD_GET_RNG){ + struct prng s_prng = {0}; + + memset(buffer, 0, sizeof(struct prng)); + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_SET); + + + unsigned long long random = bbs(&s_prng.p, &s_prng.q, &s_prng.seed); + s_prng.output = random; + memcpy(buffer, &s_prng, sizeof(struct prng)); + + HAL_StatusTypeDef s = HAL_UART_Transmit(&huart6, buffer, sizeof(struct prng), 0xF); + + // We have finished, we disable the pin + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET); + } + } + + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLN = 168; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief ETH Initialization Function + * @param None + * @retval None + */ +static void MX_ETH_Init(void) +{ + + /* USER CODE BEGIN ETH_Init 0 */ + + /* USER CODE END ETH_Init 0 */ + + static uint8_t MACAddr[6]; + + /* USER CODE BEGIN ETH_Init 1 */ + + /* USER CODE END ETH_Init 1 */ + heth.Instance = ETH; + MACAddr[0] = 0x00; + MACAddr[1] = 0x80; + MACAddr[2] = 0xE1; + MACAddr[3] = 0x00; + MACAddr[4] = 0x00; + MACAddr[5] = 0x00; + heth.Init.MACAddr = &MACAddr[0]; + heth.Init.MediaInterface = HAL_ETH_RMII_MODE; + heth.Init.TxDesc = DMATxDscrTab; + heth.Init.RxDesc = DMARxDscrTab; + heth.Init.RxBuffLen = 1524; + + /* USER CODE BEGIN MACADDRESS */ + + /* USER CODE END MACADDRESS */ + + if (HAL_ETH_Init(&heth) != HAL_OK) + { + Error_Handler(); + } + + memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); + TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; + TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; + TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; + /* USER CODE BEGIN ETH_Init 2 */ + + /* USER CODE END ETH_Init 2 */ + +} + +/** + * @brief RNG Initialization Function + * @param None + * @retval None + */ +static void MX_RNG_Init(void) +{ + + /* USER CODE BEGIN RNG_Init 0 */ + + /* USER CODE END RNG_Init 0 */ + + /* USER CODE BEGIN RNG_Init 1 */ + + /* USER CODE END RNG_Init 1 */ + hrng.Instance = RNG; + if (HAL_RNG_Init(&hrng) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN RNG_Init 2 */ + + /* USER CODE END RNG_Init 2 */ + +} + +/** + * @brief USART3 Initialization Function + * @param None + * @retval None + */ +static void MX_USART3_UART_Init(void) +{ + + /* USER CODE BEGIN USART3_Init 0 */ + + /* USER CODE END USART3_Init 0 */ + + /* USER CODE BEGIN USART3_Init 1 */ + + /* USER CODE END USART3_Init 1 */ + huart3.Instance = USART3; + huart3.Init.BaudRate = 115200; + huart3.Init.WordLength = UART_WORDLENGTH_8B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart3) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART3_Init 2 */ + + /* USER CODE END USART3_Init 2 */ + +} + +/** + * @brief USART6 Initialization Function + * @param None + * @retval None + */ +static void MX_USART6_UART_Init(void) +{ + + /* USER CODE BEGIN USART6_Init 0 */ + + /* USER CODE END USART6_Init 0 */ + + /* USER CODE BEGIN USART6_Init 1 */ + + /* USER CODE END USART6_Init 1 */ + huart6.Instance = USART6; + huart6.Init.BaudRate = 115200; + huart6.Init.WordLength = UART_WORDLENGTH_8B; + huart6.Init.StopBits = UART_STOPBITS_1; + huart6.Init.Parity = UART_PARITY_NONE; + huart6.Init.Mode = UART_MODE_TX_RX; + huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart6.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart6) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART6_Init 2 */ + + /* USER CODE END USART6_Init 2 */ + +} + +/** + * @brief USB_OTG_FS Initialization Function + * @param None + * @retval None + */ +static void MX_USB_OTG_FS_PCD_Init(void) +{ + + /* USER CODE BEGIN USB_OTG_FS_Init 0 */ + + /* USER CODE END USB_OTG_FS_Init 0 */ + + /* USER CODE BEGIN USB_OTG_FS_Init 1 */ + + /* USER CODE END USB_OTG_FS_Init 1 */ + hpcd_USB_OTG_FS.Instance = USB_OTG_FS; + hpcd_USB_OTG_FS.Init.dev_endpoints = 4; + hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; + hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; + hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd_USB_OTG_FS.Init.Sof_enable = ENABLE; + hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; + hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; + hpcd_USB_OTG_FS.Init.vbus_sensing_enable = ENABLE; + hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; + if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USB_OTG_FS_Init 2 */ + + /* USER CODE END USB_OTG_FS_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* USER CODE BEGIN MX_GPIO_Init_1 */ + + /* USER CODE END MX_GPIO_Init_1 */ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, LD1_Pin|LD3_Pin|LD2_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(USB_PowerSwitchOn_GPIO_Port, USB_PowerSwitchOn_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin : USER_Btn_Pin */ + GPIO_InitStruct.Pin = USER_Btn_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USER_Btn_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : LD1_Pin LD3_Pin LD2_Pin */ + GPIO_InitStruct.Pin = LD1_Pin|LD3_Pin|LD2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pin : USB_PowerSwitchOn_Pin */ + GPIO_InitStruct.Pin = USB_PowerSwitchOn_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(USB_PowerSwitchOn_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : USB_OverCurrent_Pin */ + GPIO_InitStruct.Pin = USB_OverCurrent_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USB_OverCurrent_GPIO_Port, &GPIO_InitStruct); + + /* USER CODE BEGIN MX_GPIO_Init_2 */ + + /* USER CODE END MX_GPIO_Init_2 */ +} + +/* USER CODE BEGIN 4 */ +void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) +{ + if (huart->Instance == USART3) + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET); +} +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + { + } + /* USER CODE END Error_Handler_Debug */ +} +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ diff --git a/Core/Src/stm32f4xx_hal_msp.c b/Core/Src/stm32f4xx_hal_msp.c index 16e109e..f9d5ab7 100644 --- a/Core/Src/stm32f4xx_hal_msp.c +++ b/Core/Src/stm32f4xx_hal_msp.c @@ -260,13 +260,33 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) GPIO_InitStruct.Alternate = GPIO_AF7_USART3; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - /* USART3 interrupt Init */ - HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ + } + else if(huart->Instance==USART6) + { + /* USER CODE BEGIN USART6_MspInit 0 */ + /* USER CODE END USART6_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART6_CLK_ENABLE(); + + __HAL_RCC_GPIOG_CLK_ENABLE(); + /**USART6 GPIO Configuration + PG9 ------> USART6_RX + PG14 ------> USART6_TX + */ + GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_14; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF8_USART6; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /* USER CODE BEGIN USART6_MspInit 1 */ + + /* USER CODE END USART6_MspInit 1 */ } } @@ -293,12 +313,28 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) */ HAL_GPIO_DeInit(GPIOD, STLK_RX_Pin|STLK_TX_Pin); - /* USART3 interrupt DeInit */ - HAL_NVIC_DisableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspDeInit 1 */ /* USER CODE END USART3_MspDeInit 1 */ } + else if(huart->Instance==USART6) + { + /* USER CODE BEGIN USART6_MspDeInit 0 */ + + /* USER CODE END USART6_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART6_CLK_DISABLE(); + + /**USART6 GPIO Configuration + PG9 ------> USART6_RX + PG14 ------> USART6_TX + */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_9|GPIO_PIN_14); + + /* USER CODE BEGIN USART6_MspDeInit 1 */ + + /* USER CODE END USART6_MspDeInit 1 */ + } } diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c index 72b28c5..e32897f 100644 --- a/Core/Src/stm32f4xx_it.c +++ b/Core/Src/stm32f4xx_it.c @@ -55,7 +55,7 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ -extern UART_HandleTypeDef huart3; + /* USER CODE BEGIN EV */ /* USER CODE END EV */ @@ -198,20 +198,6 @@ void SysTick_Handler(void) /* please refer to the startup file (startup_stm32f4xx.s). */ /******************************************************************************/ -/** - * @brief This function handles USART3 global interrupt. - */ -void USART3_IRQHandler(void) -{ - /* USER CODE BEGIN USART3_IRQn 0 */ - - /* USER CODE END USART3_IRQn 0 */ - HAL_UART_IRQHandler(&huart3); - /* USER CODE BEGIN USART3_IRQn 1 */ - - /* USER CODE END USART3_IRQn 1 */ -} - /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/Debug/Core/Src/main.cyclo b/Debug/Core/Src/main.cyclo index f668446..54faad7 100644 --- a/Debug/Core/Src/main.cyclo +++ b/Debug/Core/Src/main.cyclo @@ -1,18 +1,19 @@ -../Core/Src/main.c:81:6:init_entropy 2 -../Core/Src/main.c:101:13:generateEntropy 6 -../Core/Src/main.c:133:14:prng 2 -../Core/Src/main.c:154:13:prime_number_finder 3 -../Core/Src/main.c:161:12:isPrimeNumber 3 -../Core/Src/main.c:171:12:gcd 2 -../Core/Src/main.c:177:14:random_range 1 -../Core/Src/main.c:185:23:csum 2 -../Core/Src/main.c:201:27:bbs 4 -../Core/Src/main.c:252:5:main 3 -../Core/Src/main.c:327:6:SystemClock_Config 3 -../Core/Src/main.c:373:13:MX_ETH_Init 2 -../Core/Src/main.c:422:13:MX_RNG_Init 2 -../Core/Src/main.c:448:13:MX_USART3_UART_Init 2 -../Core/Src/main.c:481:13:MX_USB_OTG_FS_PCD_Init 2 -../Core/Src/main.c:516:13:MX_GPIO_Init 1 -../Core/Src/main.c:569:6:HAL_UART_TxCpltCallback 2 -../Core/Src/main.c:580:6:Error_Handler 1 +../Core/Src/main.c:83:6:init_entropy 2 +../Core/Src/main.c:103:13:generateEntropy 6 +../Core/Src/main.c:135:14:prng 2 +../Core/Src/main.c:156:13:prime_number_finder 3 +../Core/Src/main.c:163:12:isPrimeNumber 3 +../Core/Src/main.c:173:12:gcd 2 +../Core/Src/main.c:179:14:random_range 1 +../Core/Src/main.c:187:23:csum 2 +../Core/Src/main.c:203:27:bbs 4 +../Core/Src/main.c:254:5:main 3 +../Core/Src/main.c:331:6:SystemClock_Config 3 +../Core/Src/main.c:377:13:MX_ETH_Init 2 +../Core/Src/main.c:426:13:MX_RNG_Init 2 +../Core/Src/main.c:452:13:MX_USART3_UART_Init 2 +../Core/Src/main.c:485:13:MX_USART6_UART_Init 2 +../Core/Src/main.c:518:13:MX_USB_OTG_FS_PCD_Init 2 +../Core/Src/main.c:553:13:MX_GPIO_Init 1 +../Core/Src/main.c:606:6:HAL_UART_TxCpltCallback 2 +../Core/Src/main.c:617:6:Error_Handler 1 diff --git a/Debug/Core/Src/main.o b/Debug/Core/Src/main.o index 1f5cde3..a35682e 100644 Binary files a/Debug/Core/Src/main.o and b/Debug/Core/Src/main.o differ diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su index 27f1808..a6d15d1 100644 --- a/Debug/Core/Src/main.su +++ b/Debug/Core/Src/main.su @@ -1,18 +1,19 @@ -../Core/Src/main.c:81:6:init_entropy 8 static -../Core/Src/main.c:101:13:generateEntropy 24 static -../Core/Src/main.c:133:14:prng 16 static -../Core/Src/main.c:154:13:prime_number_finder 16 static -../Core/Src/main.c:161:12:isPrimeNumber 24 static -../Core/Src/main.c:171:12:gcd 16 static -../Core/Src/main.c:177:14:random_range 24 static -../Core/Src/main.c:185:23:csum 24 static -../Core/Src/main.c:201:27:bbs 288 static -../Core/Src/main.c:252:5:main 88 static -../Core/Src/main.c:327:6:SystemClock_Config 88 static -../Core/Src/main.c:373:13:MX_ETH_Init 8 static -../Core/Src/main.c:422:13:MX_RNG_Init 8 static -../Core/Src/main.c:448:13:MX_USART3_UART_Init 8 static -../Core/Src/main.c:481:13:MX_USB_OTG_FS_PCD_Init 8 static -../Core/Src/main.c:516:13:MX_GPIO_Init 56 static -../Core/Src/main.c:569:6:HAL_UART_TxCpltCallback 16 static -../Core/Src/main.c:580:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:83:6:init_entropy 8 static +../Core/Src/main.c:103:13:generateEntropy 24 static +../Core/Src/main.c:135:14:prng 16 static +../Core/Src/main.c:156:13:prime_number_finder 16 static +../Core/Src/main.c:163:12:isPrimeNumber 24 static +../Core/Src/main.c:173:12:gcd 16 static +../Core/Src/main.c:179:14:random_range 24 static +../Core/Src/main.c:187:23:csum 24 static +../Core/Src/main.c:203:27:bbs 288 static +../Core/Src/main.c:254:5:main 96 static +../Core/Src/main.c:331:6:SystemClock_Config 88 static +../Core/Src/main.c:377:13:MX_ETH_Init 8 static +../Core/Src/main.c:426:13:MX_RNG_Init 8 static +../Core/Src/main.c:452:13:MX_USART3_UART_Init 8 static +../Core/Src/main.c:485:13:MX_USART6_UART_Init 8 static +../Core/Src/main.c:518:13:MX_USB_OTG_FS_PCD_Init 8 static +../Core/Src/main.c:553:13:MX_GPIO_Init 56 static +../Core/Src/main.c:606:6:HAL_UART_TxCpltCallback 16 static +../Core/Src/main.c:617:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/Debug/Core/Src/stm32f4xx_hal_msp.cyclo b/Debug/Core/Src/stm32f4xx_hal_msp.cyclo index cc7c349..04ecd91 100644 --- a/Debug/Core/Src/stm32f4xx_hal_msp.cyclo +++ b/Debug/Core/Src/stm32f4xx_hal_msp.cyclo @@ -3,7 +3,7 @@ ../Core/Src/stm32f4xx_hal_msp.c:153:6:HAL_ETH_MspDeInit 2 ../Core/Src/stm32f4xx_hal_msp.c:195:6:HAL_RNG_MspInit 2 ../Core/Src/stm32f4xx_hal_msp.c:218:6:HAL_RNG_MspDeInit 2 -../Core/Src/stm32f4xx_hal_msp.c:240:6:HAL_UART_MspInit 2 -../Core/Src/stm32f4xx_hal_msp.c:280:6:HAL_UART_MspDeInit 2 -../Core/Src/stm32f4xx_hal_msp.c:311:6:HAL_PCD_MspInit 2 -../Core/Src/stm32f4xx_hal_msp.c:356:6:HAL_PCD_MspDeInit 2 +../Core/Src/stm32f4xx_hal_msp.c:240:6:HAL_UART_MspInit 3 +../Core/Src/stm32f4xx_hal_msp.c:300:6:HAL_UART_MspDeInit 3 +../Core/Src/stm32f4xx_hal_msp.c:347:6:HAL_PCD_MspInit 2 +../Core/Src/stm32f4xx_hal_msp.c:392:6:HAL_PCD_MspDeInit 2 diff --git a/Debug/Core/Src/stm32f4xx_hal_msp.o b/Debug/Core/Src/stm32f4xx_hal_msp.o index d18bc00..4cb8946 100644 Binary files a/Debug/Core/Src/stm32f4xx_hal_msp.o and b/Debug/Core/Src/stm32f4xx_hal_msp.o differ diff --git a/Debug/Core/Src/stm32f4xx_hal_msp.su b/Debug/Core/Src/stm32f4xx_hal_msp.su index 3166567..0ad7470 100644 --- a/Debug/Core/Src/stm32f4xx_hal_msp.su +++ b/Debug/Core/Src/stm32f4xx_hal_msp.su @@ -3,7 +3,7 @@ ../Core/Src/stm32f4xx_hal_msp.c:153:6:HAL_ETH_MspDeInit 16 static ../Core/Src/stm32f4xx_hal_msp.c:195:6:HAL_RNG_MspInit 24 static ../Core/Src/stm32f4xx_hal_msp.c:218:6:HAL_RNG_MspDeInit 16 static -../Core/Src/stm32f4xx_hal_msp.c:240:6:HAL_UART_MspInit 48 static -../Core/Src/stm32f4xx_hal_msp.c:280:6:HAL_UART_MspDeInit 16 static -../Core/Src/stm32f4xx_hal_msp.c:311:6:HAL_PCD_MspInit 48 static -../Core/Src/stm32f4xx_hal_msp.c:356:6:HAL_PCD_MspDeInit 16 static +../Core/Src/stm32f4xx_hal_msp.c:240:6:HAL_UART_MspInit 56 static +../Core/Src/stm32f4xx_hal_msp.c:300:6:HAL_UART_MspDeInit 16 static +../Core/Src/stm32f4xx_hal_msp.c:347:6:HAL_PCD_MspInit 48 static +../Core/Src/stm32f4xx_hal_msp.c:392:6:HAL_PCD_MspDeInit 16 static diff --git a/Debug/Core/Src/stm32f4xx_it.cyclo b/Debug/Core/Src/stm32f4xx_it.cyclo index 956ea3a..1c5d501 100644 --- a/Debug/Core/Src/stm32f4xx_it.cyclo +++ b/Debug/Core/Src/stm32f4xx_it.cyclo @@ -7,4 +7,3 @@ ../Core/Src/stm32f4xx_it.c:157:6:DebugMon_Handler 1 ../Core/Src/stm32f4xx_it.c:170:6:PendSV_Handler 1 ../Core/Src/stm32f4xx_it.c:183:6:SysTick_Handler 1 -../Core/Src/stm32f4xx_it.c:204:6:USART3_IRQHandler 1 diff --git a/Debug/Core/Src/stm32f4xx_it.o b/Debug/Core/Src/stm32f4xx_it.o index c614bf6..a1031dc 100644 Binary files a/Debug/Core/Src/stm32f4xx_it.o and b/Debug/Core/Src/stm32f4xx_it.o differ diff --git a/Debug/Core/Src/stm32f4xx_it.su b/Debug/Core/Src/stm32f4xx_it.su index 33e40cb..088e092 100644 --- a/Debug/Core/Src/stm32f4xx_it.su +++ b/Debug/Core/Src/stm32f4xx_it.su @@ -7,4 +7,3 @@ ../Core/Src/stm32f4xx_it.c:157:6:DebugMon_Handler 4 static ../Core/Src/stm32f4xx_it.c:170:6:PendSV_Handler 4 static ../Core/Src/stm32f4xx_it.c:183:6:SysTick_Handler 8 static -../Core/Src/stm32f4xx_it.c:204:6:USART3_IRQHandler 8 static diff --git a/Debug/csprng.elf b/Debug/csprng.elf index 61078e4..fc6b3bb 100755 Binary files a/Debug/csprng.elf and b/Debug/csprng.elf differ diff --git a/Debug/csprng.list b/Debug/csprng.list index 639e4dd..e8838c4 100644 --- a/Debug/csprng.list +++ b/Debug/csprng.list @@ -5,49 +5,49 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001ac 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 000043bc 080001ac 080001ac 000101ac 2**2 + 1 .text 00003abc 080001ac 080001ac 000101ac 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000018 08004568 08004568 00014568 2**2 + 2 .rodata 00000018 08003c68 08003c68 00013c68 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08004580 08004580 000206c8 2**0 + 3 .ARM.extab 00000000 08003c80 08003c80 000206c8 2**0 CONTENTS - 4 .ARM 00000008 08004580 08004580 00014580 2**2 + 4 .ARM 00000008 08003c80 08003c80 00013c80 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08004588 08004588 000206c8 2**0 + 5 .preinit_array 00000000 08003c88 08003c88 000206c8 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000008 08004588 08004588 00014588 2**2 + 6 .init_array 00000008 08003c88 08003c88 00013c88 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 08004590 08004590 00014590 2**2 + 7 .fini_array 00000004 08003c90 08003c90 00013c90 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 000006c8 20000000 08004594 00020000 2**2 + 8 .data 000006c8 20000000 08003c94 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .ccmram 00000000 10000000 10000000 000206c8 2**0 CONTENTS - 10 .bss 00000b2c 200006c8 200006c8 000206c8 2**2 + 10 .bss 00000b74 200006c8 200006c8 000206c8 2**2 ALLOC - 11 ._user_heap_stack 00000604 200011f4 200011f4 000206c8 2**0 + 11 ._user_heap_stack 00000604 2000123c 2000123c 000206c8 2**0 ALLOC 12 .ARM.attributes 00000030 00000000 00000000 000206c8 2**0 CONTENTS, READONLY 13 .comment 00000043 00000000 00000000 000206f8 2**0 CONTENTS, READONLY - 14 .debug_info 0000fc88 00000000 00000000 0002073b 2**0 + 14 .debug_info 0000ec80 00000000 00000000 0002073b 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_abbrev 000022ce 00000000 00000000 000303c3 2**0 + 15 .debug_abbrev 00001f5a 00000000 00000000 0002f3bb 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_aranges 00000cc0 00000000 00000000 00032698 2**3 + 16 .debug_aranges 00000c30 00000000 00000000 00031318 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_rnglists 000009d3 00000000 00000000 00033358 2**0 + 17 .debug_rnglists 00000963 00000000 00000000 00031f48 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_macro 00024751 00000000 00000000 00033d2b 2**0 + 18 .debug_macro 00024565 00000000 00000000 000328ab 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .debug_line 0000ddc7 00000000 00000000 0005847c 2**0 + 19 .debug_line 0000cef7 00000000 00000000 00056e10 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 20 .debug_str 000dbbe7 00000000 00000000 00066243 2**0 + 20 .debug_str 000db955 00000000 00000000 00063d07 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_frame 0000379c 00000000 00000000 00141e2c 2**2 + 21 .debug_frame 0000354c 00000000 00000000 0013f65c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 22 .debug_line_str 0000005f 00000000 00000000 001455c8 2**0 + 22 .debug_line_str 0000005f 00000000 00000000 00142ba8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -66,7 +66,7 @@ Disassembly of section .text: 80001c2: bd10 pop {r4, pc} 80001c4: 200006c8 .word 0x200006c8 80001c8: 00000000 .word 0x00000000 - 80001cc: 08004550 .word 0x08004550 + 80001cc: 08003c50 .word 0x08003c50 080001d0 : 80001d0: b508 push {r3, lr} @@ -78,7 +78,7 @@ Disassembly of section .text: 80001de: bd08 pop {r3, pc} 80001e0: 00000000 .word 0x00000000 80001e4: 200006cc .word 0x200006cc - 80001e8: 08004550 .word 0x08004550 + 80001e8: 08003c50 .word 0x08003c50 080001ec : 80001ec: 4603 mov r3, r0 @@ -377,7 +377,7 @@ void init_entropy(){ 80004fc: f44f 7202 mov.w r2, #520 ; 0x208 8000500: 2100 movs r1, #0 8000502: 4810 ldr r0, [pc, #64] ; (8000544 ) - 8000504: f003 ff92 bl 800442c + 8000504: f003 fb12 bl 8003b2c while(s_entropy.pool_size < BUFSIZE){ 8000508: e010 b.n 800052c @@ -441,10 +441,10 @@ static void generateEntropy(int position){ HAL_GPIO_TogglePin (GPIOB, GPIO_PIN_0); 800055c: 2101 movs r1, #1 800055e: 4818 ldr r0, [pc, #96] ; (80005c0 ) - 8000560: f001 fdcf bl 8002102 + 8000560: f001 fd51 bl 8002006 HAL_Delay (100); /* Insert delay 100 ms */ 8000564: 2064 movs r0, #100 ; 0x64 - 8000566: f000 feef bl 8001348 + 8000566: f000 ff2f bl 80013c8 // Wait until the data is ready while (RNG_SR_DRDY == 0); @@ -856,7 +856,7 @@ static unsigned long long bbs(unsigned int *p, unsigned int *q, unsigned long lo 8000846: 2264 movs r2, #100 ; 0x64 8000848: 2100 movs r1, #0 800084a: 4618 mov r0, r3 - 800084c: f003 fdee bl 800442c + 800084c: f003 f96e bl 8003b2c int pos = 0; 8000850: 2300 movs r3, #0 8000852: f8c7 30ec str.w r3, [r7, #236] ; 0xec @@ -978,7 +978,7 @@ static unsigned long long bbs(unsigned int *p, unsigned int *q, unsigned long lo int main(void) { 800096c: b5b0 push {r4, r5, r7, lr} - 800096e: b092 sub sp, #72 ; 0x48 + 800096e: b094 sub sp, #80 ; 0x50 8000970: af00 add r7, sp, #0 /* USER CODE END 1 */ @@ -986,10104 +986,8566 @@ int main(void) /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8000972: f000 fc77 bl 8001264 + 8000972: f000 fcb7 bl 80012e4 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8000976: f000 f85d bl 8000a34 + 8000976: f000 f863 bl 8000a40 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 800097a: f000 f97f bl 8000c7c + 800097a: f000 f9af bl 8000cdc MX_ETH_Init(); - 800097e: f000 f8c3 bl 8000b08 + 800097e: f000 f8c9 bl 8000b14 MX_USART3_UART_Init(); - 8000982: f000 f923 bl 8000bcc + 8000982: f000 f929 bl 8000bd8 MX_USB_OTG_FS_PCD_Init(); - 8000986: f000 f94b bl 8000c20 + 8000986: f000 f97b bl 8000c80 MX_RNG_Init(); - 800098a: f000 f90b bl 8000ba4 + 800098a: f000 f911 bl 8000bb0 + MX_USART6_UART_Init(); + 800098e: f000 f94d bl 8000c2c /* USER CODE BEGIN 2 */ init_entropy(); - 800098e: f7ff fdb3 bl 80004f8 + 8000992: f7ff fdb1 bl 80004f8 while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ - HAL_StatusTypeDef status = HAL_UART_Receive(&huart3, &buf_recv, 1, 100); - 8000992: f107 011b add.w r1, r7, #27 - 8000996: 2364 movs r3, #100 ; 0x64 - 8000998: 2201 movs r2, #1 - 800099a: 4824 ldr r0, [pc, #144] ; (8000a2c ) - 800099c: f002 fa77 bl 8002e8e - 80009a0: 4603 mov r3, r0 - 80009a2: f887 3047 strb.w r3, [r7, #71] ; 0x47 + HAL_StatusTypeDef status = HAL_UART_Receive(&huart6, buf_recv, sizeof(struct cmd), 100); + 8000996: f107 011c add.w r1, r7, #28 + 800099a: 2364 movs r3, #100 ; 0x64 + 800099c: 2208 movs r2, #8 + 800099e: 4826 ldr r0, [pc, #152] ; (8000a38 ) + 80009a0: f002 f9f7 bl 8002d92 + 80009a4: 4603 mov r3, r0 + 80009a6: f887 304f strb.w r3, [r7, #79] ; 0x4f if (status == HAL_OK){ - 80009a6: f897 3047 ldrb.w r3, [r7, #71] ; 0x47 - 80009aa: 2b00 cmp r3, #0 - 80009ac: d1f1 bne.n 8000992 - if (buf_recv == 1){ - 80009ae: 7efb ldrb r3, [r7, #27] - 80009b0: 2b01 cmp r3, #1 - 80009b2: d1ee bne.n 8000992 + 80009aa: f897 304f ldrb.w r3, [r7, #79] ; 0x4f + 80009ae: 2b00 cmp r3, #0 + 80009b0: d1f1 bne.n 8000996 + struct cmd *s_cmd = (struct cmd *)buf_recv; + 80009b2: f107 031c add.w r3, r7, #28 + 80009b6: 64bb str r3, [r7, #72] ; 0x48 + if (s_cmd->cmd == CSPRNG_CMD_GET_RNG){ + 80009b8: 6cbb ldr r3, [r7, #72] ; 0x48 + 80009ba: 685b ldr r3, [r3, #4] + 80009bc: 2b10 cmp r3, #16 + 80009be: d1ea bne.n 8000996 struct prng s_prng = {0}; - 80009b4: 463b mov r3, r7 - 80009b6: 2200 movs r2, #0 - 80009b8: 601a str r2, [r3, #0] - 80009ba: 605a str r2, [r3, #4] - 80009bc: 609a str r2, [r3, #8] - 80009be: 60da str r2, [r3, #12] - 80009c0: 611a str r2, [r3, #16] - 80009c2: 615a str r2, [r3, #20] + 80009c0: 463b mov r3, r7 + 80009c2: 2200 movs r2, #0 + 80009c4: 601a str r2, [r3, #0] + 80009c6: 605a str r2, [r3, #4] + 80009c8: 609a str r2, [r3, #8] + 80009ca: 60da str r2, [r3, #12] + 80009cc: 611a str r2, [r3, #16] + 80009ce: 615a str r2, [r3, #20] memset(buffer, 0, sizeof(struct prng)); - 80009c4: f107 031c add.w r3, r7, #28 - 80009c8: 2218 movs r2, #24 - 80009ca: 2100 movs r1, #0 - 80009cc: 4618 mov r0, r3 - 80009ce: f003 fd2d bl 800442c + 80009d0: f107 0324 add.w r3, r7, #36 ; 0x24 + 80009d4: 2218 movs r2, #24 + 80009d6: 2100 movs r1, #0 + 80009d8: 4618 mov r0, r3 + 80009da: f003 f8a7 bl 8003b2c HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_SET); - 80009d2: 2201 movs r2, #1 - 80009d4: 2101 movs r1, #1 - 80009d6: 4816 ldr r0, [pc, #88] ; (8000a30 ) - 80009d8: f001 fb7a bl 80020d0 + 80009de: 2201 movs r2, #1 + 80009e0: 2101 movs r1, #1 + 80009e2: 4816 ldr r0, [pc, #88] ; (8000a3c ) + 80009e4: f001 faf6 bl 8001fd4 unsigned long long random = bbs(&s_prng.p, &s_prng.q, &s_prng.seed); - 80009dc: 463b mov r3, r7 - 80009de: f103 0208 add.w r2, r3, #8 - 80009e2: 463b mov r3, r7 - 80009e4: 1d19 adds r1, r3, #4 - 80009e6: 463b mov r3, r7 - 80009e8: 4618 mov r0, r3 - 80009ea: f7ff fe97 bl 800071c - 80009ee: e9c7 010e strd r0, r1, [r7, #56] ; 0x38 + 80009e8: 463b mov r3, r7 + 80009ea: f103 0208 add.w r2, r3, #8 + 80009ee: 463b mov r3, r7 + 80009f0: 1d19 adds r1, r3, #4 + 80009f2: 463b mov r3, r7 + 80009f4: 4618 mov r0, r3 + 80009f6: f7ff fe91 bl 800071c + 80009fa: e9c7 0110 strd r0, r1, [r7, #64] ; 0x40 s_prng.output = random; - 80009f2: e9d7 230e ldrd r2, r3, [r7, #56] ; 0x38 - 80009f6: e9c7 2304 strd r2, r3, [r7, #16] + 80009fe: e9d7 2310 ldrd r2, r3, [r7, #64] ; 0x40 + 8000a02: e9c7 2304 strd r2, r3, [r7, #16] memcpy(buffer, &s_prng, sizeof(struct prng)); - 80009fa: f107 041c add.w r4, r7, #28 - 80009fe: 463d mov r5, r7 - 8000a00: cd0f ldmia r5!, {r0, r1, r2, r3} - 8000a02: c40f stmia r4!, {r0, r1, r2, r3} - 8000a04: e895 0003 ldmia.w r5, {r0, r1} - 8000a08: e884 0003 stmia.w r4, {r0, r1} + 8000a06: f107 0424 add.w r4, r7, #36 ; 0x24 + 8000a0a: 463d mov r5, r7 + 8000a0c: cd0f ldmia r5!, {r0, r1, r2, r3} + 8000a0e: c40f stmia r4!, {r0, r1, r2, r3} + 8000a10: e895 0003 ldmia.w r5, {r0, r1} + 8000a14: e884 0003 stmia.w r4, {r0, r1} - HAL_StatusTypeDef s = HAL_UART_Transmit(&huart3, buffer, sizeof(struct prng), 0xF); - 8000a0c: f107 011c add.w r1, r7, #28 - 8000a10: 230f movs r3, #15 - 8000a12: 2218 movs r2, #24 - 8000a14: 4805 ldr r0, [pc, #20] ; (8000a2c ) - 8000a16: f002 f9af bl 8002d78 - 8000a1a: 4603 mov r3, r0 - 8000a1c: f887 3037 strb.w r3, [r7, #55] ; 0x37 + HAL_StatusTypeDef s = HAL_UART_Transmit(&huart6, buffer, sizeof(struct prng), 0xF); + 8000a18: f107 0124 add.w r1, r7, #36 ; 0x24 + 8000a1c: 230f movs r3, #15 + 8000a1e: 2218 movs r2, #24 + 8000a20: 4805 ldr r0, [pc, #20] ; (8000a38 ) + 8000a22: f002 f92b bl 8002c7c + 8000a26: 4603 mov r3, r0 + 8000a28: f887 303f strb.w r3, [r7, #63] ; 0x3f // We have finished, we disable the pin HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET); - 8000a20: 2200 movs r2, #0 - 8000a22: 2101 movs r1, #1 - 8000a24: 4802 ldr r0, [pc, #8] ; (8000a30 ) - 8000a26: f001 fb53 bl 80020d0 + 8000a2c: 2200 movs r2, #0 + 8000a2e: 2101 movs r1, #1 + 8000a30: 4802 ldr r0, [pc, #8] ; (8000a3c ) + 8000a32: f001 facf bl 8001fd4 { - 8000a2a: e7b2 b.n 8000992 - 8000a2c: 20000b24 .word 0x20000b24 - 8000a30: 40020400 .word 0x40020400 + 8000a36: e7ae b.n 8000996 + 8000a38: 20000b6c .word 0x20000b6c + 8000a3c: 40020400 .word 0x40020400 -08000a34 : +08000a40 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8000a34: b580 push {r7, lr} - 8000a36: b094 sub sp, #80 ; 0x50 - 8000a38: af00 add r7, sp, #0 + 8000a40: b580 push {r7, lr} + 8000a42: b094 sub sp, #80 ; 0x50 + 8000a44: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8000a3a: f107 0320 add.w r3, r7, #32 - 8000a3e: 2230 movs r2, #48 ; 0x30 - 8000a40: 2100 movs r1, #0 - 8000a42: 4618 mov r0, r3 - 8000a44: f003 fcf2 bl 800442c + 8000a46: f107 0320 add.w r3, r7, #32 + 8000a4a: 2230 movs r2, #48 ; 0x30 + 8000a4c: 2100 movs r1, #0 + 8000a4e: 4618 mov r0, r3 + 8000a50: f003 f86c bl 8003b2c RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8000a48: f107 030c add.w r3, r7, #12 - 8000a4c: 2200 movs r2, #0 - 8000a4e: 601a str r2, [r3, #0] - 8000a50: 605a str r2, [r3, #4] - 8000a52: 609a str r2, [r3, #8] - 8000a54: 60da str r2, [r3, #12] - 8000a56: 611a str r2, [r3, #16] + 8000a54: f107 030c add.w r3, r7, #12 + 8000a58: 2200 movs r2, #0 + 8000a5a: 601a str r2, [r3, #0] + 8000a5c: 605a str r2, [r3, #4] + 8000a5e: 609a str r2, [r3, #8] + 8000a60: 60da str r2, [r3, #12] + 8000a62: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); - 8000a58: 2300 movs r3, #0 - 8000a5a: 60bb str r3, [r7, #8] - 8000a5c: 4b28 ldr r3, [pc, #160] ; (8000b00 ) - 8000a5e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000a60: 4a27 ldr r2, [pc, #156] ; (8000b00 ) - 8000a62: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8000a66: 6413 str r3, [r2, #64] ; 0x40 - 8000a68: 4b25 ldr r3, [pc, #148] ; (8000b00 ) + 8000a64: 2300 movs r3, #0 + 8000a66: 60bb str r3, [r7, #8] + 8000a68: 4b28 ldr r3, [pc, #160] ; (8000b0c ) 8000a6a: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000a6c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8000a70: 60bb str r3, [r7, #8] - 8000a72: 68bb ldr r3, [r7, #8] + 8000a6c: 4a27 ldr r2, [pc, #156] ; (8000b0c ) + 8000a6e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8000a72: 6413 str r3, [r2, #64] ; 0x40 + 8000a74: 4b25 ldr r3, [pc, #148] ; (8000b0c ) + 8000a76: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000a78: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8000a7c: 60bb str r3, [r7, #8] + 8000a7e: 68bb ldr r3, [r7, #8] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8000a74: 2300 movs r3, #0 - 8000a76: 607b str r3, [r7, #4] - 8000a78: 4b22 ldr r3, [pc, #136] ; (8000b04 ) - 8000a7a: 681b ldr r3, [r3, #0] - 8000a7c: 4a21 ldr r2, [pc, #132] ; (8000b04 ) - 8000a7e: f443 4340 orr.w r3, r3, #49152 ; 0xc000 - 8000a82: 6013 str r3, [r2, #0] - 8000a84: 4b1f ldr r3, [pc, #124] ; (8000b04 ) + 8000a80: 2300 movs r3, #0 + 8000a82: 607b str r3, [r7, #4] + 8000a84: 4b22 ldr r3, [pc, #136] ; (8000b10 ) 8000a86: 681b ldr r3, [r3, #0] - 8000a88: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8000a8c: 607b str r3, [r7, #4] - 8000a8e: 687b ldr r3, [r7, #4] + 8000a88: 4a21 ldr r2, [pc, #132] ; (8000b10 ) + 8000a8a: f443 4340 orr.w r3, r3, #49152 ; 0xc000 + 8000a8e: 6013 str r3, [r2, #0] + 8000a90: 4b1f ldr r3, [pc, #124] ; (8000b10 ) + 8000a92: 681b ldr r3, [r3, #0] + 8000a94: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8000a98: 607b str r3, [r7, #4] + 8000a9a: 687b ldr r3, [r7, #4] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8000a90: 2301 movs r3, #1 - 8000a92: 623b str r3, [r7, #32] + 8000a9c: 2301 movs r3, #1 + 8000a9e: 623b str r3, [r7, #32] RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - 8000a94: f44f 23a0 mov.w r3, #327680 ; 0x50000 - 8000a98: 627b str r3, [r7, #36] ; 0x24 + 8000aa0: f44f 23a0 mov.w r3, #327680 ; 0x50000 + 8000aa4: 627b str r3, [r7, #36] ; 0x24 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8000a9a: 2302 movs r3, #2 - 8000a9c: 63bb str r3, [r7, #56] ; 0x38 + 8000aa6: 2302 movs r3, #2 + 8000aa8: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8000a9e: f44f 0380 mov.w r3, #4194304 ; 0x400000 - 8000aa2: 63fb str r3, [r7, #60] ; 0x3c + 8000aaa: f44f 0380 mov.w r3, #4194304 ; 0x400000 + 8000aae: 63fb str r3, [r7, #60] ; 0x3c RCC_OscInitStruct.PLL.PLLM = 4; - 8000aa4: 2304 movs r3, #4 - 8000aa6: 643b str r3, [r7, #64] ; 0x40 + 8000ab0: 2304 movs r3, #4 + 8000ab2: 643b str r3, [r7, #64] ; 0x40 RCC_OscInitStruct.PLL.PLLN = 168; - 8000aa8: 23a8 movs r3, #168 ; 0xa8 - 8000aaa: 647b str r3, [r7, #68] ; 0x44 + 8000ab4: 23a8 movs r3, #168 ; 0xa8 + 8000ab6: 647b str r3, [r7, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 8000aac: 2302 movs r3, #2 - 8000aae: 64bb str r3, [r7, #72] ; 0x48 + 8000ab8: 2302 movs r3, #2 + 8000aba: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLQ = 7; - 8000ab0: 2307 movs r3, #7 - 8000ab2: 64fb str r3, [r7, #76] ; 0x4c + 8000abc: 2307 movs r3, #7 + 8000abe: 64fb str r3, [r7, #76] ; 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8000ab4: f107 0320 add.w r3, r7, #32 - 8000ab8: 4618 mov r0, r3 - 8000aba: f001 fc4b bl 8002354 - 8000abe: 4603 mov r3, r0 - 8000ac0: 2b00 cmp r3, #0 - 8000ac2: d001 beq.n 8000ac8 + 8000ac0: f107 0320 add.w r3, r7, #32 + 8000ac4: 4618 mov r0, r3 + 8000ac6: f001 fbc7 bl 8002258 + 8000aca: 4603 mov r3, r0 + 8000acc: 2b00 cmp r3, #0 + 8000ace: d001 beq.n 8000ad4 { Error_Handler(); - 8000ac4: f000 f99e bl 8000e04 + 8000ad0: f000 f9b2 bl 8000e38 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8000ac8: 230f movs r3, #15 - 8000aca: 60fb str r3, [r7, #12] + 8000ad4: 230f movs r3, #15 + 8000ad6: 60fb str r3, [r7, #12] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8000acc: 2302 movs r3, #2 - 8000ace: 613b str r3, [r7, #16] + 8000ad8: 2302 movs r3, #2 + 8000ada: 613b str r3, [r7, #16] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000ad0: 2300 movs r3, #0 - 8000ad2: 617b str r3, [r7, #20] + 8000adc: 2300 movs r3, #0 + 8000ade: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 8000ad4: f44f 53a0 mov.w r3, #5120 ; 0x1400 - 8000ad8: 61bb str r3, [r7, #24] + 8000ae0: f44f 53a0 mov.w r3, #5120 ; 0x1400 + 8000ae4: 61bb str r3, [r7, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 8000ada: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8000ade: 61fb str r3, [r7, #28] + 8000ae6: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8000aea: 61fb str r3, [r7, #28] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) - 8000ae0: f107 030c add.w r3, r7, #12 - 8000ae4: 2105 movs r1, #5 - 8000ae6: 4618 mov r0, r3 - 8000ae8: f001 feac bl 8002844 - 8000aec: 4603 mov r3, r0 - 8000aee: 2b00 cmp r3, #0 - 8000af0: d001 beq.n 8000af6 + 8000aec: f107 030c add.w r3, r7, #12 + 8000af0: 2105 movs r1, #5 + 8000af2: 4618 mov r0, r3 + 8000af4: f001 fe28 bl 8002748 + 8000af8: 4603 mov r3, r0 + 8000afa: 2b00 cmp r3, #0 + 8000afc: d001 beq.n 8000b02 { Error_Handler(); - 8000af2: f000 f987 bl 8000e04 + 8000afe: f000 f99b bl 8000e38 } } - 8000af6: bf00 nop - 8000af8: 3750 adds r7, #80 ; 0x50 - 8000afa: 46bd mov sp, r7 - 8000afc: bd80 pop {r7, pc} - 8000afe: bf00 nop - 8000b00: 40023800 .word 0x40023800 - 8000b04: 40007000 .word 0x40007000 + 8000b02: bf00 nop + 8000b04: 3750 adds r7, #80 ; 0x50 + 8000b06: 46bd mov sp, r7 + 8000b08: bd80 pop {r7, pc} + 8000b0a: bf00 nop + 8000b0c: 40023800 .word 0x40023800 + 8000b10: 40007000 .word 0x40007000 -08000b08 : +08000b14 : * @brief ETH Initialization Function * @param None * @retval None */ static void MX_ETH_Init(void) { - 8000b08: b580 push {r7, lr} - 8000b0a: af00 add r7, sp, #0 + 8000b14: b580 push {r7, lr} + 8000b16: af00 add r7, sp, #0 static uint8_t MACAddr[6]; /* USER CODE BEGIN ETH_Init 1 */ /* USER CODE END ETH_Init 1 */ heth.Instance = ETH; - 8000b0c: 4b1f ldr r3, [pc, #124] ; (8000b8c ) - 8000b0e: 4a20 ldr r2, [pc, #128] ; (8000b90 ) - 8000b10: 601a str r2, [r3, #0] + 8000b18: 4b1f ldr r3, [pc, #124] ; (8000b98 ) + 8000b1a: 4a20 ldr r2, [pc, #128] ; (8000b9c ) + 8000b1c: 601a str r2, [r3, #0] MACAddr[0] = 0x00; - 8000b12: 4b20 ldr r3, [pc, #128] ; (8000b94 ) - 8000b14: 2200 movs r2, #0 - 8000b16: 701a strb r2, [r3, #0] + 8000b1e: 4b20 ldr r3, [pc, #128] ; (8000ba0 ) + 8000b20: 2200 movs r2, #0 + 8000b22: 701a strb r2, [r3, #0] MACAddr[1] = 0x80; - 8000b18: 4b1e ldr r3, [pc, #120] ; (8000b94 ) - 8000b1a: 2280 movs r2, #128 ; 0x80 - 8000b1c: 705a strb r2, [r3, #1] + 8000b24: 4b1e ldr r3, [pc, #120] ; (8000ba0 ) + 8000b26: 2280 movs r2, #128 ; 0x80 + 8000b28: 705a strb r2, [r3, #1] MACAddr[2] = 0xE1; - 8000b1e: 4b1d ldr r3, [pc, #116] ; (8000b94 ) - 8000b20: 22e1 movs r2, #225 ; 0xe1 - 8000b22: 709a strb r2, [r3, #2] + 8000b2a: 4b1d ldr r3, [pc, #116] ; (8000ba0 ) + 8000b2c: 22e1 movs r2, #225 ; 0xe1 + 8000b2e: 709a strb r2, [r3, #2] MACAddr[3] = 0x00; - 8000b24: 4b1b ldr r3, [pc, #108] ; (8000b94 ) - 8000b26: 2200 movs r2, #0 - 8000b28: 70da strb r2, [r3, #3] - MACAddr[4] = 0x00; - 8000b2a: 4b1a ldr r3, [pc, #104] ; (8000b94 ) - 8000b2c: 2200 movs r2, #0 - 8000b2e: 711a strb r2, [r3, #4] - MACAddr[5] = 0x00; - 8000b30: 4b18 ldr r3, [pc, #96] ; (8000b94 ) + 8000b30: 4b1b ldr r3, [pc, #108] ; (8000ba0 ) 8000b32: 2200 movs r2, #0 - 8000b34: 715a strb r2, [r3, #5] + 8000b34: 70da strb r2, [r3, #3] + MACAddr[4] = 0x00; + 8000b36: 4b1a ldr r3, [pc, #104] ; (8000ba0 ) + 8000b38: 2200 movs r2, #0 + 8000b3a: 711a strb r2, [r3, #4] + MACAddr[5] = 0x00; + 8000b3c: 4b18 ldr r3, [pc, #96] ; (8000ba0 ) + 8000b3e: 2200 movs r2, #0 + 8000b40: 715a strb r2, [r3, #5] heth.Init.MACAddr = &MACAddr[0]; - 8000b36: 4b15 ldr r3, [pc, #84] ; (8000b8c ) - 8000b38: 4a16 ldr r2, [pc, #88] ; (8000b94 ) - 8000b3a: 605a str r2, [r3, #4] + 8000b42: 4b15 ldr r3, [pc, #84] ; (8000b98 ) + 8000b44: 4a16 ldr r2, [pc, #88] ; (8000ba0 ) + 8000b46: 605a str r2, [r3, #4] heth.Init.MediaInterface = HAL_ETH_RMII_MODE; - 8000b3c: 4b13 ldr r3, [pc, #76] ; (8000b8c ) - 8000b3e: f44f 0200 mov.w r2, #8388608 ; 0x800000 - 8000b42: 609a str r2, [r3, #8] + 8000b48: 4b13 ldr r3, [pc, #76] ; (8000b98 ) + 8000b4a: f44f 0200 mov.w r2, #8388608 ; 0x800000 + 8000b4e: 609a str r2, [r3, #8] heth.Init.TxDesc = DMATxDscrTab; - 8000b44: 4b11 ldr r3, [pc, #68] ; (8000b8c ) - 8000b46: 4a14 ldr r2, [pc, #80] ; (8000b98 ) - 8000b48: 60da str r2, [r3, #12] + 8000b50: 4b11 ldr r3, [pc, #68] ; (8000b98 ) + 8000b52: 4a14 ldr r2, [pc, #80] ; (8000ba4 ) + 8000b54: 60da str r2, [r3, #12] heth.Init.RxDesc = DMARxDscrTab; - 8000b4a: 4b10 ldr r3, [pc, #64] ; (8000b8c ) - 8000b4c: 4a13 ldr r2, [pc, #76] ; (8000b9c ) - 8000b4e: 611a str r2, [r3, #16] + 8000b56: 4b10 ldr r3, [pc, #64] ; (8000b98 ) + 8000b58: 4a13 ldr r2, [pc, #76] ; (8000ba8 ) + 8000b5a: 611a str r2, [r3, #16] heth.Init.RxBuffLen = 1524; - 8000b50: 4b0e ldr r3, [pc, #56] ; (8000b8c ) - 8000b52: f240 52f4 movw r2, #1524 ; 0x5f4 - 8000b56: 615a str r2, [r3, #20] + 8000b5c: 4b0e ldr r3, [pc, #56] ; (8000b98 ) + 8000b5e: f240 52f4 movw r2, #1524 ; 0x5f4 + 8000b62: 615a str r2, [r3, #20] /* USER CODE BEGIN MACADDRESS */ /* USER CODE END MACADDRESS */ if (HAL_ETH_Init(&heth) != HAL_OK) - 8000b58: 480c ldr r0, [pc, #48] ; (8000b8c ) - 8000b5a: f000 fdbd bl 80016d8 - 8000b5e: 4603 mov r3, r0 - 8000b60: 2b00 cmp r3, #0 - 8000b62: d001 beq.n 8000b68 + 8000b64: 480c ldr r0, [pc, #48] ; (8000b98 ) + 8000b66: f000 fd39 bl 80015dc + 8000b6a: 4603 mov r3, r0 + 8000b6c: 2b00 cmp r3, #0 + 8000b6e: d001 beq.n 8000b74 { Error_Handler(); - 8000b64: f000 f94e bl 8000e04 + 8000b70: f000 f962 bl 8000e38 } memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); - 8000b68: 2238 movs r2, #56 ; 0x38 - 8000b6a: 2100 movs r1, #0 - 8000b6c: 480c ldr r0, [pc, #48] ; (8000ba0 ) - 8000b6e: f003 fc5d bl 800442c + 8000b74: 2238 movs r2, #56 ; 0x38 + 8000b76: 2100 movs r1, #0 + 8000b78: 480c ldr r0, [pc, #48] ; (8000bac ) + 8000b7a: f002 ffd7 bl 8003b2c TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; - 8000b72: 4b0b ldr r3, [pc, #44] ; (8000ba0 ) - 8000b74: 2221 movs r2, #33 ; 0x21 - 8000b76: 601a str r2, [r3, #0] + 8000b7e: 4b0b ldr r3, [pc, #44] ; (8000bac ) + 8000b80: 2221 movs r2, #33 ; 0x21 + 8000b82: 601a str r2, [r3, #0] TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; - 8000b78: 4b09 ldr r3, [pc, #36] ; (8000ba0 ) - 8000b7a: f44f 0240 mov.w r2, #12582912 ; 0xc00000 - 8000b7e: 615a str r2, [r3, #20] + 8000b84: 4b09 ldr r3, [pc, #36] ; (8000bac ) + 8000b86: f44f 0240 mov.w r2, #12582912 ; 0xc00000 + 8000b8a: 615a str r2, [r3, #20] TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; - 8000b80: 4b07 ldr r3, [pc, #28] ; (8000ba0 ) - 8000b82: 2200 movs r2, #0 - 8000b84: 611a str r2, [r3, #16] + 8000b8c: 4b07 ldr r3, [pc, #28] ; (8000bac ) + 8000b8e: 2200 movs r2, #0 + 8000b90: 611a str r2, [r3, #16] /* USER CODE BEGIN ETH_Init 2 */ /* USER CODE END ETH_Init 2 */ } - 8000b86: bf00 nop - 8000b88: bd80 pop {r7, pc} - 8000b8a: bf00 nop - 8000b8c: 20000a64 .word 0x20000a64 - 8000b90: 40028000 .word 0x40028000 - 8000b94: 20001050 .word 0x20001050 - 8000b98: 200009c4 .word 0x200009c4 - 8000b9c: 20000924 .word 0x20000924 - 8000ba0: 200008ec .word 0x200008ec + 8000b92: bf00 nop + 8000b94: bd80 pop {r7, pc} + 8000b96: bf00 nop + 8000b98: 20000a64 .word 0x20000a64 + 8000b9c: 40028000 .word 0x40028000 + 8000ba0: 20001098 .word 0x20001098 + 8000ba4: 200009c4 .word 0x200009c4 + 8000ba8: 20000924 .word 0x20000924 + 8000bac: 200008ec .word 0x200008ec -08000ba4 : +08000bb0 : * @brief RNG Initialization Function * @param None * @retval None */ static void MX_RNG_Init(void) { - 8000ba4: b580 push {r7, lr} - 8000ba6: af00 add r7, sp, #0 + 8000bb0: b580 push {r7, lr} + 8000bb2: af00 add r7, sp, #0 /* USER CODE END RNG_Init 0 */ /* USER CODE BEGIN RNG_Init 1 */ /* USER CODE END RNG_Init 1 */ hrng.Instance = RNG; - 8000ba8: 4b06 ldr r3, [pc, #24] ; (8000bc4 ) - 8000baa: 4a07 ldr r2, [pc, #28] ; (8000bc8 ) - 8000bac: 601a str r2, [r3, #0] + 8000bb4: 4b06 ldr r3, [pc, #24] ; (8000bd0 ) + 8000bb6: 4a07 ldr r2, [pc, #28] ; (8000bd4 ) + 8000bb8: 601a str r2, [r3, #0] if (HAL_RNG_Init(&hrng) != HAL_OK) - 8000bae: 4805 ldr r0, [pc, #20] ; (8000bc4 ) - 8000bb0: f002 f868 bl 8002c84 - 8000bb4: 4603 mov r3, r0 - 8000bb6: 2b00 cmp r3, #0 - 8000bb8: d001 beq.n 8000bbe + 8000bba: 4805 ldr r0, [pc, #20] ; (8000bd0 ) + 8000bbc: f001 ffe4 bl 8002b88 + 8000bc0: 4603 mov r3, r0 + 8000bc2: 2b00 cmp r3, #0 + 8000bc4: d001 beq.n 8000bca { Error_Handler(); - 8000bba: f000 f923 bl 8000e04 + 8000bc6: f000 f937 bl 8000e38 } /* USER CODE BEGIN RNG_Init 2 */ /* USER CODE END RNG_Init 2 */ } - 8000bbe: bf00 nop - 8000bc0: bd80 pop {r7, pc} - 8000bc2: bf00 nop - 8000bc4: 20000b14 .word 0x20000b14 - 8000bc8: 50060800 .word 0x50060800 + 8000bca: bf00 nop + 8000bcc: bd80 pop {r7, pc} + 8000bce: bf00 nop + 8000bd0: 20000b14 .word 0x20000b14 + 8000bd4: 50060800 .word 0x50060800 -08000bcc : +08000bd8 : * @brief USART3 Initialization Function * @param None * @retval None */ static void MX_USART3_UART_Init(void) { - 8000bcc: b580 push {r7, lr} - 8000bce: af00 add r7, sp, #0 + 8000bd8: b580 push {r7, lr} + 8000bda: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; - 8000bd0: 4b11 ldr r3, [pc, #68] ; (8000c18 ) - 8000bd2: 4a12 ldr r2, [pc, #72] ; (8000c1c ) - 8000bd4: 601a str r2, [r3, #0] + 8000bdc: 4b11 ldr r3, [pc, #68] ; (8000c24 ) + 8000bde: 4a12 ldr r2, [pc, #72] ; (8000c28 ) + 8000be0: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; - 8000bd6: 4b10 ldr r3, [pc, #64] ; (8000c18 ) - 8000bd8: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8000bdc: 605a str r2, [r3, #4] + 8000be2: 4b10 ldr r3, [pc, #64] ; (8000c24 ) + 8000be4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8000be8: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; - 8000bde: 4b0e ldr r3, [pc, #56] ; (8000c18 ) - 8000be0: 2200 movs r2, #0 - 8000be2: 609a str r2, [r3, #8] - huart3.Init.StopBits = UART_STOPBITS_1; - 8000be4: 4b0c ldr r3, [pc, #48] ; (8000c18 ) - 8000be6: 2200 movs r2, #0 - 8000be8: 60da str r2, [r3, #12] - huart3.Init.Parity = UART_PARITY_NONE; - 8000bea: 4b0b ldr r3, [pc, #44] ; (8000c18 ) + 8000bea: 4b0e ldr r3, [pc, #56] ; (8000c24 ) 8000bec: 2200 movs r2, #0 - 8000bee: 611a str r2, [r3, #16] - huart3.Init.Mode = UART_MODE_TX_RX; - 8000bf0: 4b09 ldr r3, [pc, #36] ; (8000c18 ) - 8000bf2: 220c movs r2, #12 - 8000bf4: 615a str r2, [r3, #20] - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8000bf6: 4b08 ldr r3, [pc, #32] ; (8000c18 ) + 8000bee: 609a str r2, [r3, #8] + huart3.Init.StopBits = UART_STOPBITS_1; + 8000bf0: 4b0c ldr r3, [pc, #48] ; (8000c24 ) + 8000bf2: 2200 movs r2, #0 + 8000bf4: 60da str r2, [r3, #12] + huart3.Init.Parity = UART_PARITY_NONE; + 8000bf6: 4b0b ldr r3, [pc, #44] ; (8000c24 ) 8000bf8: 2200 movs r2, #0 - 8000bfa: 619a str r2, [r3, #24] + 8000bfa: 611a str r2, [r3, #16] + huart3.Init.Mode = UART_MODE_TX_RX; + 8000bfc: 4b09 ldr r3, [pc, #36] ; (8000c24 ) + 8000bfe: 220c movs r2, #12 + 8000c00: 615a str r2, [r3, #20] + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8000c02: 4b08 ldr r3, [pc, #32] ; (8000c24 ) + 8000c04: 2200 movs r2, #0 + 8000c06: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; - 8000bfc: 4b06 ldr r3, [pc, #24] ; (8000c18 ) - 8000bfe: 2200 movs r2, #0 - 8000c00: 61da str r2, [r3, #28] + 8000c08: 4b06 ldr r3, [pc, #24] ; (8000c24 ) + 8000c0a: 2200 movs r2, #0 + 8000c0c: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) - 8000c02: 4805 ldr r0, [pc, #20] ; (8000c18 ) - 8000c04: f002 f868 bl 8002cd8 - 8000c08: 4603 mov r3, r0 - 8000c0a: 2b00 cmp r3, #0 - 8000c0c: d001 beq.n 8000c12 + 8000c0e: 4805 ldr r0, [pc, #20] ; (8000c24 ) + 8000c10: f001 ffe4 bl 8002bdc + 8000c14: 4603 mov r3, r0 + 8000c16: 2b00 cmp r3, #0 + 8000c18: d001 beq.n 8000c1e { Error_Handler(); - 8000c0e: f000 f8f9 bl 8000e04 + 8000c1a: f000 f90d bl 8000e38 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } - 8000c12: bf00 nop - 8000c14: bd80 pop {r7, pc} - 8000c16: bf00 nop - 8000c18: 20000b24 .word 0x20000b24 - 8000c1c: 40004800 .word 0x40004800 + 8000c1e: bf00 nop + 8000c20: bd80 pop {r7, pc} + 8000c22: bf00 nop + 8000c24: 20000b24 .word 0x20000b24 + 8000c28: 40004800 .word 0x40004800 -08000c20 : - * @brief USB_OTG_FS Initialization Function +08000c2c : + * @brief USART6 Initialization Function * @param None * @retval None */ -static void MX_USB_OTG_FS_PCD_Init(void) +static void MX_USART6_UART_Init(void) { - 8000c20: b580 push {r7, lr} - 8000c22: af00 add r7, sp, #0 - /* USER CODE END USB_OTG_FS_Init 0 */ + 8000c2c: b580 push {r7, lr} + 8000c2e: af00 add r7, sp, #0 + /* USER CODE END USART6_Init 0 */ - /* USER CODE BEGIN USB_OTG_FS_Init 1 */ + /* USER CODE BEGIN USART6_Init 1 */ - /* USER CODE END USB_OTG_FS_Init 1 */ - hpcd_USB_OTG_FS.Instance = USB_OTG_FS; - 8000c24: 4b14 ldr r3, [pc, #80] ; (8000c78 ) - 8000c26: f04f 42a0 mov.w r2, #1342177280 ; 0x50000000 - 8000c2a: 601a str r2, [r3, #0] - hpcd_USB_OTG_FS.Init.dev_endpoints = 4; - 8000c2c: 4b12 ldr r3, [pc, #72] ; (8000c78 ) - 8000c2e: 2204 movs r2, #4 - 8000c30: 711a strb r2, [r3, #4] - hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; - 8000c32: 4b11 ldr r3, [pc, #68] ; (8000c78 ) - 8000c34: 2202 movs r2, #2 - 8000c36: 71da strb r2, [r3, #7] - hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; - 8000c38: 4b0f ldr r3, [pc, #60] ; (8000c78 ) - 8000c3a: 2200 movs r2, #0 - 8000c3c: 719a strb r2, [r3, #6] - hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; - 8000c3e: 4b0e ldr r3, [pc, #56] ; (8000c78 ) - 8000c40: 2202 movs r2, #2 - 8000c42: 725a strb r2, [r3, #9] - hpcd_USB_OTG_FS.Init.Sof_enable = ENABLE; - 8000c44: 4b0c ldr r3, [pc, #48] ; (8000c78 ) - 8000c46: 2201 movs r2, #1 - 8000c48: 729a strb r2, [r3, #10] - hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; - 8000c4a: 4b0b ldr r3, [pc, #44] ; (8000c78 ) + /* USER CODE END USART6_Init 1 */ + huart6.Instance = USART6; + 8000c30: 4b11 ldr r3, [pc, #68] ; (8000c78 ) + 8000c32: 4a12 ldr r2, [pc, #72] ; (8000c7c ) + 8000c34: 601a str r2, [r3, #0] + huart6.Init.BaudRate = 115200; + 8000c36: 4b10 ldr r3, [pc, #64] ; (8000c78 ) + 8000c38: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8000c3c: 605a str r2, [r3, #4] + huart6.Init.WordLength = UART_WORDLENGTH_8B; + 8000c3e: 4b0e ldr r3, [pc, #56] ; (8000c78 ) + 8000c40: 2200 movs r2, #0 + 8000c42: 609a str r2, [r3, #8] + huart6.Init.StopBits = UART_STOPBITS_1; + 8000c44: 4b0c ldr r3, [pc, #48] ; (8000c78 ) + 8000c46: 2200 movs r2, #0 + 8000c48: 60da str r2, [r3, #12] + huart6.Init.Parity = UART_PARITY_NONE; + 8000c4a: 4b0b ldr r3, [pc, #44] ; (8000c78 ) 8000c4c: 2200 movs r2, #0 - 8000c4e: 72da strb r2, [r3, #11] - hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; - 8000c50: 4b09 ldr r3, [pc, #36] ; (8000c78 ) - 8000c52: 2200 movs r2, #0 - 8000c54: 731a strb r2, [r3, #12] - hpcd_USB_OTG_FS.Init.vbus_sensing_enable = ENABLE; - 8000c56: 4b08 ldr r3, [pc, #32] ; (8000c78 ) - 8000c58: 2201 movs r2, #1 - 8000c5a: 739a strb r2, [r3, #14] - hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; - 8000c5c: 4b06 ldr r3, [pc, #24] ; (8000c78 ) + 8000c4e: 611a str r2, [r3, #16] + huart6.Init.Mode = UART_MODE_TX_RX; + 8000c50: 4b09 ldr r3, [pc, #36] ; (8000c78 ) + 8000c52: 220c movs r2, #12 + 8000c54: 615a str r2, [r3, #20] + huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8000c56: 4b08 ldr r3, [pc, #32] ; (8000c78 ) + 8000c58: 2200 movs r2, #0 + 8000c5a: 619a str r2, [r3, #24] + huart6.Init.OverSampling = UART_OVERSAMPLING_16; + 8000c5c: 4b06 ldr r3, [pc, #24] ; (8000c78 ) 8000c5e: 2200 movs r2, #0 - 8000c60: 73da strb r2, [r3, #15] - if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) - 8000c62: 4805 ldr r0, [pc, #20] ; (8000c78 ) - 8000c64: f001 fa67 bl 8002136 + 8000c60: 61da str r2, [r3, #28] + if (HAL_UART_Init(&huart6) != HAL_OK) + 8000c62: 4805 ldr r0, [pc, #20] ; (8000c78 ) + 8000c64: f001 ffba bl 8002bdc 8000c68: 4603 mov r3, r0 8000c6a: 2b00 cmp r3, #0 - 8000c6c: d001 beq.n 8000c72 + 8000c6c: d001 beq.n 8000c72 { Error_Handler(); - 8000c6e: f000 f8c9 bl 8000e04 + 8000c6e: f000 f8e3 bl 8000e38 } - /* USER CODE BEGIN USB_OTG_FS_Init 2 */ + /* USER CODE BEGIN USART6_Init 2 */ - /* USER CODE END USB_OTG_FS_Init 2 */ + /* USER CODE END USART6_Init 2 */ } 8000c72: bf00 nop 8000c74: bd80 pop {r7, pc} 8000c76: bf00 nop 8000c78: 20000b6c .word 0x20000b6c + 8000c7c: 40011400 .word 0x40011400 -08000c7c : +08000c80 : + * @brief USB_OTG_FS Initialization Function + * @param None + * @retval None + */ +static void MX_USB_OTG_FS_PCD_Init(void) +{ + 8000c80: b580 push {r7, lr} + 8000c82: af00 add r7, sp, #0 + /* USER CODE END USB_OTG_FS_Init 0 */ + + /* USER CODE BEGIN USB_OTG_FS_Init 1 */ + + /* USER CODE END USB_OTG_FS_Init 1 */ + hpcd_USB_OTG_FS.Instance = USB_OTG_FS; + 8000c84: 4b14 ldr r3, [pc, #80] ; (8000cd8 ) + 8000c86: f04f 42a0 mov.w r2, #1342177280 ; 0x50000000 + 8000c8a: 601a str r2, [r3, #0] + hpcd_USB_OTG_FS.Init.dev_endpoints = 4; + 8000c8c: 4b12 ldr r3, [pc, #72] ; (8000cd8 ) + 8000c8e: 2204 movs r2, #4 + 8000c90: 711a strb r2, [r3, #4] + hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; + 8000c92: 4b11 ldr r3, [pc, #68] ; (8000cd8 ) + 8000c94: 2202 movs r2, #2 + 8000c96: 71da strb r2, [r3, #7] + hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; + 8000c98: 4b0f ldr r3, [pc, #60] ; (8000cd8 ) + 8000c9a: 2200 movs r2, #0 + 8000c9c: 719a strb r2, [r3, #6] + hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; + 8000c9e: 4b0e ldr r3, [pc, #56] ; (8000cd8 ) + 8000ca0: 2202 movs r2, #2 + 8000ca2: 725a strb r2, [r3, #9] + hpcd_USB_OTG_FS.Init.Sof_enable = ENABLE; + 8000ca4: 4b0c ldr r3, [pc, #48] ; (8000cd8 ) + 8000ca6: 2201 movs r2, #1 + 8000ca8: 729a strb r2, [r3, #10] + hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; + 8000caa: 4b0b ldr r3, [pc, #44] ; (8000cd8 ) + 8000cac: 2200 movs r2, #0 + 8000cae: 72da strb r2, [r3, #11] + hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; + 8000cb0: 4b09 ldr r3, [pc, #36] ; (8000cd8 ) + 8000cb2: 2200 movs r2, #0 + 8000cb4: 731a strb r2, [r3, #12] + hpcd_USB_OTG_FS.Init.vbus_sensing_enable = ENABLE; + 8000cb6: 4b08 ldr r3, [pc, #32] ; (8000cd8 ) + 8000cb8: 2201 movs r2, #1 + 8000cba: 739a strb r2, [r3, #14] + hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; + 8000cbc: 4b06 ldr r3, [pc, #24] ; (8000cd8 ) + 8000cbe: 2200 movs r2, #0 + 8000cc0: 73da strb r2, [r3, #15] + if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) + 8000cc2: 4805 ldr r0, [pc, #20] ; (8000cd8 ) + 8000cc4: f001 f9b9 bl 800203a + 8000cc8: 4603 mov r3, r0 + 8000cca: 2b00 cmp r3, #0 + 8000ccc: d001 beq.n 8000cd2 + { + Error_Handler(); + 8000cce: f000 f8b3 bl 8000e38 + } + /* USER CODE BEGIN USB_OTG_FS_Init 2 */ + + /* USER CODE END USB_OTG_FS_Init 2 */ + +} + 8000cd2: bf00 nop + 8000cd4: bd80 pop {r7, pc} + 8000cd6: bf00 nop + 8000cd8: 20000bb4 .word 0x20000bb4 + +08000cdc : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 8000c7c: b580 push {r7, lr} - 8000c7e: b08c sub sp, #48 ; 0x30 - 8000c80: af00 add r7, sp, #0 + 8000cdc: b580 push {r7, lr} + 8000cde: b08c sub sp, #48 ; 0x30 + 8000ce0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000c82: f107 031c add.w r3, r7, #28 - 8000c86: 2200 movs r2, #0 - 8000c88: 601a str r2, [r3, #0] - 8000c8a: 605a str r2, [r3, #4] - 8000c8c: 609a str r2, [r3, #8] - 8000c8e: 60da str r2, [r3, #12] - 8000c90: 611a str r2, [r3, #16] + 8000ce2: f107 031c add.w r3, r7, #28 + 8000ce6: 2200 movs r2, #0 + 8000ce8: 601a str r2, [r3, #0] + 8000cea: 605a str r2, [r3, #4] + 8000cec: 609a str r2, [r3, #8] + 8000cee: 60da str r2, [r3, #12] + 8000cf0: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 8000c92: 2300 movs r3, #0 - 8000c94: 61bb str r3, [r7, #24] - 8000c96: 4b4c ldr r3, [pc, #304] ; (8000dc8 ) - 8000c98: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000c9a: 4a4b ldr r2, [pc, #300] ; (8000dc8 ) - 8000c9c: f043 0304 orr.w r3, r3, #4 - 8000ca0: 6313 str r3, [r2, #48] ; 0x30 - 8000ca2: 4b49 ldr r3, [pc, #292] ; (8000dc8 ) - 8000ca4: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000ca6: f003 0304 and.w r3, r3, #4 - 8000caa: 61bb str r3, [r7, #24] - 8000cac: 69bb ldr r3, [r7, #24] - __HAL_RCC_GPIOH_CLK_ENABLE(); - 8000cae: 2300 movs r3, #0 - 8000cb0: 617b str r3, [r7, #20] - 8000cb2: 4b45 ldr r3, [pc, #276] ; (8000dc8 ) - 8000cb4: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000cb6: 4a44 ldr r2, [pc, #272] ; (8000dc8 ) - 8000cb8: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8000cbc: 6313 str r3, [r2, #48] ; 0x30 - 8000cbe: 4b42 ldr r3, [pc, #264] ; (8000dc8 ) - 8000cc0: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000cc2: f003 0380 and.w r3, r3, #128 ; 0x80 - 8000cc6: 617b str r3, [r7, #20] - 8000cc8: 697b ldr r3, [r7, #20] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000cca: 2300 movs r3, #0 - 8000ccc: 613b str r3, [r7, #16] - 8000cce: 4b3e ldr r3, [pc, #248] ; (8000dc8 ) - 8000cd0: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000cd2: 4a3d ldr r2, [pc, #244] ; (8000dc8 ) - 8000cd4: f043 0301 orr.w r3, r3, #1 - 8000cd8: 6313 str r3, [r2, #48] ; 0x30 - 8000cda: 4b3b ldr r3, [pc, #236] ; (8000dc8 ) - 8000cdc: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000cde: f003 0301 and.w r3, r3, #1 - 8000ce2: 613b str r3, [r7, #16] - 8000ce4: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8000ce6: 2300 movs r3, #0 - 8000ce8: 60fb str r3, [r7, #12] - 8000cea: 4b37 ldr r3, [pc, #220] ; (8000dc8 ) - 8000cec: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000cee: 4a36 ldr r2, [pc, #216] ; (8000dc8 ) - 8000cf0: f043 0302 orr.w r3, r3, #2 - 8000cf4: 6313 str r3, [r2, #48] ; 0x30 - 8000cf6: 4b34 ldr r3, [pc, #208] ; (8000dc8 ) + 8000cf2: 2300 movs r3, #0 + 8000cf4: 61bb str r3, [r7, #24] + 8000cf6: 4b4c ldr r3, [pc, #304] ; (8000e28 ) 8000cf8: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000cfa: f003 0302 and.w r3, r3, #2 - 8000cfe: 60fb str r3, [r7, #12] - 8000d00: 68fb ldr r3, [r7, #12] - __HAL_RCC_GPIOD_CLK_ENABLE(); - 8000d02: 2300 movs r3, #0 - 8000d04: 60bb str r3, [r7, #8] - 8000d06: 4b30 ldr r3, [pc, #192] ; (8000dc8 ) - 8000d08: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000d0a: 4a2f ldr r2, [pc, #188] ; (8000dc8 ) - 8000d0c: f043 0308 orr.w r3, r3, #8 - 8000d10: 6313 str r3, [r2, #48] ; 0x30 - 8000d12: 4b2d ldr r3, [pc, #180] ; (8000dc8 ) + 8000cfa: 4a4b ldr r2, [pc, #300] ; (8000e28 ) + 8000cfc: f043 0304 orr.w r3, r3, #4 + 8000d00: 6313 str r3, [r2, #48] ; 0x30 + 8000d02: 4b49 ldr r3, [pc, #292] ; (8000e28 ) + 8000d04: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d06: f003 0304 and.w r3, r3, #4 + 8000d0a: 61bb str r3, [r7, #24] + 8000d0c: 69bb ldr r3, [r7, #24] + __HAL_RCC_GPIOH_CLK_ENABLE(); + 8000d0e: 2300 movs r3, #0 + 8000d10: 617b str r3, [r7, #20] + 8000d12: 4b45 ldr r3, [pc, #276] ; (8000e28 ) 8000d14: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000d16: f003 0308 and.w r3, r3, #8 - 8000d1a: 60bb str r3, [r7, #8] - 8000d1c: 68bb ldr r3, [r7, #8] - __HAL_RCC_GPIOG_CLK_ENABLE(); - 8000d1e: 2300 movs r3, #0 - 8000d20: 607b str r3, [r7, #4] - 8000d22: 4b29 ldr r3, [pc, #164] ; (8000dc8 ) - 8000d24: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000d26: 4a28 ldr r2, [pc, #160] ; (8000dc8 ) - 8000d28: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8000d2c: 6313 str r3, [r2, #48] ; 0x30 - 8000d2e: 4b26 ldr r3, [pc, #152] ; (8000dc8 ) + 8000d16: 4a44 ldr r2, [pc, #272] ; (8000e28 ) + 8000d18: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8000d1c: 6313 str r3, [r2, #48] ; 0x30 + 8000d1e: 4b42 ldr r3, [pc, #264] ; (8000e28 ) + 8000d20: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d22: f003 0380 and.w r3, r3, #128 ; 0x80 + 8000d26: 617b str r3, [r7, #20] + 8000d28: 697b ldr r3, [r7, #20] + __HAL_RCC_GPIOA_CLK_ENABLE(); + 8000d2a: 2300 movs r3, #0 + 8000d2c: 613b str r3, [r7, #16] + 8000d2e: 4b3e ldr r3, [pc, #248] ; (8000e28 ) 8000d30: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000d32: f003 0340 and.w r3, r3, #64 ; 0x40 - 8000d36: 607b str r3, [r7, #4] - 8000d38: 687b ldr r3, [r7, #4] + 8000d32: 4a3d ldr r2, [pc, #244] ; (8000e28 ) + 8000d34: f043 0301 orr.w r3, r3, #1 + 8000d38: 6313 str r3, [r2, #48] ; 0x30 + 8000d3a: 4b3b ldr r3, [pc, #236] ; (8000e28 ) + 8000d3c: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d3e: f003 0301 and.w r3, r3, #1 + 8000d42: 613b str r3, [r7, #16] + 8000d44: 693b ldr r3, [r7, #16] + __HAL_RCC_GPIOB_CLK_ENABLE(); + 8000d46: 2300 movs r3, #0 + 8000d48: 60fb str r3, [r7, #12] + 8000d4a: 4b37 ldr r3, [pc, #220] ; (8000e28 ) + 8000d4c: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d4e: 4a36 ldr r2, [pc, #216] ; (8000e28 ) + 8000d50: f043 0302 orr.w r3, r3, #2 + 8000d54: 6313 str r3, [r2, #48] ; 0x30 + 8000d56: 4b34 ldr r3, [pc, #208] ; (8000e28 ) + 8000d58: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d5a: f003 0302 and.w r3, r3, #2 + 8000d5e: 60fb str r3, [r7, #12] + 8000d60: 68fb ldr r3, [r7, #12] + __HAL_RCC_GPIOD_CLK_ENABLE(); + 8000d62: 2300 movs r3, #0 + 8000d64: 60bb str r3, [r7, #8] + 8000d66: 4b30 ldr r3, [pc, #192] ; (8000e28 ) + 8000d68: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d6a: 4a2f ldr r2, [pc, #188] ; (8000e28 ) + 8000d6c: f043 0308 orr.w r3, r3, #8 + 8000d70: 6313 str r3, [r2, #48] ; 0x30 + 8000d72: 4b2d ldr r3, [pc, #180] ; (8000e28 ) + 8000d74: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d76: f003 0308 and.w r3, r3, #8 + 8000d7a: 60bb str r3, [r7, #8] + 8000d7c: 68bb ldr r3, [r7, #8] + __HAL_RCC_GPIOG_CLK_ENABLE(); + 8000d7e: 2300 movs r3, #0 + 8000d80: 607b str r3, [r7, #4] + 8000d82: 4b29 ldr r3, [pc, #164] ; (8000e28 ) + 8000d84: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d86: 4a28 ldr r2, [pc, #160] ; (8000e28 ) + 8000d88: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8000d8c: 6313 str r3, [r2, #48] ; 0x30 + 8000d8e: 4b26 ldr r3, [pc, #152] ; (8000e28 ) + 8000d90: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000d92: f003 0340 and.w r3, r3, #64 ; 0x40 + 8000d96: 607b str r3, [r7, #4] + 8000d98: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, LD1_Pin|LD3_Pin|LD2_Pin, GPIO_PIN_RESET); - 8000d3a: 2200 movs r2, #0 - 8000d3c: f244 0181 movw r1, #16513 ; 0x4081 - 8000d40: 4822 ldr r0, [pc, #136] ; (8000dcc ) - 8000d42: f001 f9c5 bl 80020d0 + 8000d9a: 2200 movs r2, #0 + 8000d9c: f244 0181 movw r1, #16513 ; 0x4081 + 8000da0: 4822 ldr r0, [pc, #136] ; (8000e2c ) + 8000da2: f001 f917 bl 8001fd4 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(USB_PowerSwitchOn_GPIO_Port, USB_PowerSwitchOn_Pin, GPIO_PIN_RESET); - 8000d46: 2200 movs r2, #0 - 8000d48: 2140 movs r1, #64 ; 0x40 - 8000d4a: 4821 ldr r0, [pc, #132] ; (8000dd0 ) - 8000d4c: f001 f9c0 bl 80020d0 + 8000da6: 2200 movs r2, #0 + 8000da8: 2140 movs r1, #64 ; 0x40 + 8000daa: 4821 ldr r0, [pc, #132] ; (8000e30 ) + 8000dac: f001 f912 bl 8001fd4 /*Configure GPIO pin : USER_Btn_Pin */ GPIO_InitStruct.Pin = USER_Btn_Pin; - 8000d50: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8000d54: 61fb str r3, [r7, #28] + 8000db0: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8000db4: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; - 8000d56: f44f 1388 mov.w r3, #1114112 ; 0x110000 - 8000d5a: 623b str r3, [r7, #32] + 8000db6: f44f 1388 mov.w r3, #1114112 ; 0x110000 + 8000dba: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000d5c: 2300 movs r3, #0 - 8000d5e: 627b str r3, [r7, #36] ; 0x24 + 8000dbc: 2300 movs r3, #0 + 8000dbe: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(USER_Btn_GPIO_Port, &GPIO_InitStruct); - 8000d60: f107 031c add.w r3, r7, #28 - 8000d64: 4619 mov r1, r3 - 8000d66: 481b ldr r0, [pc, #108] ; (8000dd4 ) - 8000d68: f001 f806 bl 8001d78 + 8000dc0: f107 031c add.w r3, r7, #28 + 8000dc4: 4619 mov r1, r3 + 8000dc6: 481b ldr r0, [pc, #108] ; (8000e34 ) + 8000dc8: f000 ff58 bl 8001c7c /*Configure GPIO pins : LD1_Pin LD3_Pin LD2_Pin */ GPIO_InitStruct.Pin = LD1_Pin|LD3_Pin|LD2_Pin; - 8000d6c: f244 0381 movw r3, #16513 ; 0x4081 - 8000d70: 61fb str r3, [r7, #28] + 8000dcc: f244 0381 movw r3, #16513 ; 0x4081 + 8000dd0: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000d72: 2301 movs r3, #1 - 8000d74: 623b str r3, [r7, #32] + 8000dd2: 2301 movs r3, #1 + 8000dd4: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000d76: 2300 movs r3, #0 - 8000d78: 627b str r3, [r7, #36] ; 0x24 + 8000dd6: 2300 movs r3, #0 + 8000dd8: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000d7a: 2300 movs r3, #0 - 8000d7c: 62bb str r3, [r7, #40] ; 0x28 + 8000dda: 2300 movs r3, #0 + 8000ddc: 62bb str r3, [r7, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8000d7e: f107 031c add.w r3, r7, #28 - 8000d82: 4619 mov r1, r3 - 8000d84: 4811 ldr r0, [pc, #68] ; (8000dcc ) - 8000d86: f000 fff7 bl 8001d78 + 8000dde: f107 031c add.w r3, r7, #28 + 8000de2: 4619 mov r1, r3 + 8000de4: 4811 ldr r0, [pc, #68] ; (8000e2c ) + 8000de6: f000 ff49 bl 8001c7c /*Configure GPIO pin : USB_PowerSwitchOn_Pin */ GPIO_InitStruct.Pin = USB_PowerSwitchOn_Pin; - 8000d8a: 2340 movs r3, #64 ; 0x40 - 8000d8c: 61fb str r3, [r7, #28] + 8000dea: 2340 movs r3, #64 ; 0x40 + 8000dec: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000d8e: 2301 movs r3, #1 - 8000d90: 623b str r3, [r7, #32] + 8000dee: 2301 movs r3, #1 + 8000df0: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000d92: 2300 movs r3, #0 - 8000d94: 627b str r3, [r7, #36] ; 0x24 + 8000df2: 2300 movs r3, #0 + 8000df4: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000d96: 2300 movs r3, #0 - 8000d98: 62bb str r3, [r7, #40] ; 0x28 + 8000df6: 2300 movs r3, #0 + 8000df8: 62bb str r3, [r7, #40] ; 0x28 HAL_GPIO_Init(USB_PowerSwitchOn_GPIO_Port, &GPIO_InitStruct); - 8000d9a: f107 031c add.w r3, r7, #28 - 8000d9e: 4619 mov r1, r3 - 8000da0: 480b ldr r0, [pc, #44] ; (8000dd0 ) - 8000da2: f000 ffe9 bl 8001d78 + 8000dfa: f107 031c add.w r3, r7, #28 + 8000dfe: 4619 mov r1, r3 + 8000e00: 480b ldr r0, [pc, #44] ; (8000e30 ) + 8000e02: f000 ff3b bl 8001c7c /*Configure GPIO pin : USB_OverCurrent_Pin */ GPIO_InitStruct.Pin = USB_OverCurrent_Pin; - 8000da6: 2380 movs r3, #128 ; 0x80 - 8000da8: 61fb str r3, [r7, #28] + 8000e06: 2380 movs r3, #128 ; 0x80 + 8000e08: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8000daa: 2300 movs r3, #0 - 8000dac: 623b str r3, [r7, #32] + 8000e0a: 2300 movs r3, #0 + 8000e0c: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000dae: 2300 movs r3, #0 - 8000db0: 627b str r3, [r7, #36] ; 0x24 + 8000e0e: 2300 movs r3, #0 + 8000e10: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(USB_OverCurrent_GPIO_Port, &GPIO_InitStruct); - 8000db2: f107 031c add.w r3, r7, #28 - 8000db6: 4619 mov r1, r3 - 8000db8: 4805 ldr r0, [pc, #20] ; (8000dd0 ) - 8000dba: f000 ffdd bl 8001d78 + 8000e12: f107 031c add.w r3, r7, #28 + 8000e16: 4619 mov r1, r3 + 8000e18: 4805 ldr r0, [pc, #20] ; (8000e30 ) + 8000e1a: f000 ff2f bl 8001c7c /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } - 8000dbe: bf00 nop - 8000dc0: 3730 adds r7, #48 ; 0x30 - 8000dc2: 46bd mov sp, r7 - 8000dc4: bd80 pop {r7, pc} - 8000dc6: bf00 nop - 8000dc8: 40023800 .word 0x40023800 - 8000dcc: 40020400 .word 0x40020400 - 8000dd0: 40021800 .word 0x40021800 - 8000dd4: 40020800 .word 0x40020800 + 8000e1e: bf00 nop + 8000e20: 3730 adds r7, #48 ; 0x30 + 8000e22: 46bd mov sp, r7 + 8000e24: bd80 pop {r7, pc} + 8000e26: bf00 nop + 8000e28: 40023800 .word 0x40023800 + 8000e2c: 40020400 .word 0x40020400 + 8000e30: 40021800 .word 0x40021800 + 8000e34: 40020800 .word 0x40020800 -08000dd8 : - -/* USER CODE BEGIN 4 */ -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) -{ - 8000dd8: b580 push {r7, lr} - 8000dda: b082 sub sp, #8 - 8000ddc: af00 add r7, sp, #0 - 8000dde: 6078 str r0, [r7, #4] - if (huart->Instance == USART3) - 8000de0: 687b ldr r3, [r7, #4] - 8000de2: 681b ldr r3, [r3, #0] - 8000de4: 4a05 ldr r2, [pc, #20] ; (8000dfc ) - 8000de6: 4293 cmp r3, r2 - 8000de8: d104 bne.n 8000df4 - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET); - 8000dea: 2200 movs r2, #0 - 8000dec: 2101 movs r1, #1 - 8000dee: 4804 ldr r0, [pc, #16] ; (8000e00 ) - 8000df0: f001 f96e bl 80020d0 -} - 8000df4: bf00 nop - 8000df6: 3708 adds r7, #8 - 8000df8: 46bd mov sp, r7 - 8000dfa: bd80 pop {r7, pc} - 8000dfc: 40004800 .word 0x40004800 - 8000e00: 40020400 .word 0x40020400 - -08000e04 : +08000e38 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8000e04: b480 push {r7} - 8000e06: af00 add r7, sp, #0 + 8000e38: b480 push {r7} + 8000e3a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting special-purpose register PRIMASK. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8000e08: b672 cpsid i + 8000e3c: b672 cpsid i } - 8000e0a: bf00 nop + 8000e3e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8000e0c: e7fe b.n 8000e0c + 8000e40: e7fe b.n 8000e40 ... -08000e10 : +08000e44 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8000e10: b480 push {r7} - 8000e12: b083 sub sp, #12 - 8000e14: af00 add r7, sp, #0 + 8000e44: b480 push {r7} + 8000e46: b083 sub sp, #12 + 8000e48: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000e16: 2300 movs r3, #0 - 8000e18: 607b str r3, [r7, #4] - 8000e1a: 4b10 ldr r3, [pc, #64] ; (8000e5c ) - 8000e1c: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000e1e: 4a0f ldr r2, [pc, #60] ; (8000e5c ) - 8000e20: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8000e24: 6453 str r3, [r2, #68] ; 0x44 - 8000e26: 4b0d ldr r3, [pc, #52] ; (8000e5c ) - 8000e28: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000e2a: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8000e2e: 607b str r3, [r7, #4] - 8000e30: 687b ldr r3, [r7, #4] + 8000e4a: 2300 movs r3, #0 + 8000e4c: 607b str r3, [r7, #4] + 8000e4e: 4b10 ldr r3, [pc, #64] ; (8000e90 ) + 8000e50: 6c5b ldr r3, [r3, #68] ; 0x44 + 8000e52: 4a0f ldr r2, [pc, #60] ; (8000e90 ) + 8000e54: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8000e58: 6453 str r3, [r2, #68] ; 0x44 + 8000e5a: 4b0d ldr r3, [pc, #52] ; (8000e90 ) + 8000e5c: 6c5b ldr r3, [r3, #68] ; 0x44 + 8000e5e: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8000e62: 607b str r3, [r7, #4] + 8000e64: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 8000e32: 2300 movs r3, #0 - 8000e34: 603b str r3, [r7, #0] - 8000e36: 4b09 ldr r3, [pc, #36] ; (8000e5c ) - 8000e38: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000e3a: 4a08 ldr r2, [pc, #32] ; (8000e5c ) - 8000e3c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8000e40: 6413 str r3, [r2, #64] ; 0x40 - 8000e42: 4b06 ldr r3, [pc, #24] ; (8000e5c ) - 8000e44: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000e46: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8000e4a: 603b str r3, [r7, #0] - 8000e4c: 683b ldr r3, [r7, #0] + 8000e66: 2300 movs r3, #0 + 8000e68: 603b str r3, [r7, #0] + 8000e6a: 4b09 ldr r3, [pc, #36] ; (8000e90 ) + 8000e6c: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000e6e: 4a08 ldr r2, [pc, #32] ; (8000e90 ) + 8000e70: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8000e74: 6413 str r3, [r2, #64] ; 0x40 + 8000e76: 4b06 ldr r3, [pc, #24] ; (8000e90 ) + 8000e78: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000e7a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8000e7e: 603b str r3, [r7, #0] + 8000e80: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8000e4e: bf00 nop - 8000e50: 370c adds r7, #12 - 8000e52: 46bd mov sp, r7 - 8000e54: f85d 7b04 ldr.w r7, [sp], #4 - 8000e58: 4770 bx lr - 8000e5a: bf00 nop - 8000e5c: 40023800 .word 0x40023800 + 8000e82: bf00 nop + 8000e84: 370c adds r7, #12 + 8000e86: 46bd mov sp, r7 + 8000e88: f85d 7b04 ldr.w r7, [sp], #4 + 8000e8c: 4770 bx lr + 8000e8e: bf00 nop + 8000e90: 40023800 .word 0x40023800 -08000e60 : +08000e94 : * This function configures the hardware resources used in this example * @param heth: ETH handle pointer * @retval None */ void HAL_ETH_MspInit(ETH_HandleTypeDef* heth) { - 8000e60: b580 push {r7, lr} - 8000e62: b08e sub sp, #56 ; 0x38 - 8000e64: af00 add r7, sp, #0 - 8000e66: 6078 str r0, [r7, #4] + 8000e94: b580 push {r7, lr} + 8000e96: b08e sub sp, #56 ; 0x38 + 8000e98: af00 add r7, sp, #0 + 8000e9a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000e68: f107 0324 add.w r3, r7, #36 ; 0x24 - 8000e6c: 2200 movs r2, #0 - 8000e6e: 601a str r2, [r3, #0] - 8000e70: 605a str r2, [r3, #4] - 8000e72: 609a str r2, [r3, #8] - 8000e74: 60da str r2, [r3, #12] - 8000e76: 611a str r2, [r3, #16] + 8000e9c: f107 0324 add.w r3, r7, #36 ; 0x24 + 8000ea0: 2200 movs r2, #0 + 8000ea2: 601a str r2, [r3, #0] + 8000ea4: 605a str r2, [r3, #4] + 8000ea6: 609a str r2, [r3, #8] + 8000ea8: 60da str r2, [r3, #12] + 8000eaa: 611a str r2, [r3, #16] if(heth->Instance==ETH) - 8000e78: 687b ldr r3, [r7, #4] - 8000e7a: 681b ldr r3, [r3, #0] - 8000e7c: 4a55 ldr r2, [pc, #340] ; (8000fd4 ) - 8000e7e: 4293 cmp r3, r2 - 8000e80: f040 80a4 bne.w 8000fcc + 8000eac: 687b ldr r3, [r7, #4] + 8000eae: 681b ldr r3, [r3, #0] + 8000eb0: 4a55 ldr r2, [pc, #340] ; (8001008 ) + 8000eb2: 4293 cmp r3, r2 + 8000eb4: f040 80a4 bne.w 8001000 { /* USER CODE BEGIN ETH_MspInit 0 */ /* USER CODE END ETH_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ETH_CLK_ENABLE(); - 8000e84: 2300 movs r3, #0 - 8000e86: 623b str r3, [r7, #32] - 8000e88: 4b53 ldr r3, [pc, #332] ; (8000fd8 ) - 8000e8a: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000e8c: 4a52 ldr r2, [pc, #328] ; (8000fd8 ) - 8000e8e: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 - 8000e92: 6313 str r3, [r2, #48] ; 0x30 - 8000e94: 4b50 ldr r3, [pc, #320] ; (8000fd8 ) - 8000e96: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000e98: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8000e9c: 623b str r3, [r7, #32] - 8000e9e: 6a3b ldr r3, [r7, #32] - 8000ea0: 2300 movs r3, #0 - 8000ea2: 61fb str r3, [r7, #28] - 8000ea4: 4b4c ldr r3, [pc, #304] ; (8000fd8 ) - 8000ea6: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000ea8: 4a4b ldr r2, [pc, #300] ; (8000fd8 ) - 8000eaa: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 - 8000eae: 6313 str r3, [r2, #48] ; 0x30 - 8000eb0: 4b49 ldr r3, [pc, #292] ; (8000fd8 ) - 8000eb2: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000eb4: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 - 8000eb8: 61fb str r3, [r7, #28] - 8000eba: 69fb ldr r3, [r7, #28] - 8000ebc: 2300 movs r3, #0 - 8000ebe: 61bb str r3, [r7, #24] - 8000ec0: 4b45 ldr r3, [pc, #276] ; (8000fd8 ) - 8000ec2: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000ec4: 4a44 ldr r2, [pc, #272] ; (8000fd8 ) - 8000ec6: f043 6300 orr.w r3, r3, #134217728 ; 0x8000000 - 8000eca: 6313 str r3, [r2, #48] ; 0x30 - 8000ecc: 4b42 ldr r3, [pc, #264] ; (8000fd8 ) - 8000ece: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000ed0: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8000ed4: 61bb str r3, [r7, #24] - 8000ed6: 69bb ldr r3, [r7, #24] + 8000eb8: 2300 movs r3, #0 + 8000eba: 623b str r3, [r7, #32] + 8000ebc: 4b53 ldr r3, [pc, #332] ; (800100c ) + 8000ebe: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000ec0: 4a52 ldr r2, [pc, #328] ; (800100c ) + 8000ec2: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 + 8000ec6: 6313 str r3, [r2, #48] ; 0x30 + 8000ec8: 4b50 ldr r3, [pc, #320] ; (800100c ) + 8000eca: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000ecc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8000ed0: 623b str r3, [r7, #32] + 8000ed2: 6a3b ldr r3, [r7, #32] + 8000ed4: 2300 movs r3, #0 + 8000ed6: 61fb str r3, [r7, #28] + 8000ed8: 4b4c ldr r3, [pc, #304] ; (800100c ) + 8000eda: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000edc: 4a4b ldr r2, [pc, #300] ; (800100c ) + 8000ede: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 + 8000ee2: 6313 str r3, [r2, #48] ; 0x30 + 8000ee4: 4b49 ldr r3, [pc, #292] ; (800100c ) + 8000ee6: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000ee8: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 + 8000eec: 61fb str r3, [r7, #28] + 8000eee: 69fb ldr r3, [r7, #28] + 8000ef0: 2300 movs r3, #0 + 8000ef2: 61bb str r3, [r7, #24] + 8000ef4: 4b45 ldr r3, [pc, #276] ; (800100c ) + 8000ef6: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000ef8: 4a44 ldr r2, [pc, #272] ; (800100c ) + 8000efa: f043 6300 orr.w r3, r3, #134217728 ; 0x8000000 + 8000efe: 6313 str r3, [r2, #48] ; 0x30 + 8000f00: 4b42 ldr r3, [pc, #264] ; (800100c ) + 8000f02: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f04: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8000f08: 61bb str r3, [r7, #24] + 8000f0a: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOC_CLK_ENABLE(); - 8000ed8: 2300 movs r3, #0 - 8000eda: 617b str r3, [r7, #20] - 8000edc: 4b3e ldr r3, [pc, #248] ; (8000fd8 ) - 8000ede: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000ee0: 4a3d ldr r2, [pc, #244] ; (8000fd8 ) - 8000ee2: f043 0304 orr.w r3, r3, #4 - 8000ee6: 6313 str r3, [r2, #48] ; 0x30 - 8000ee8: 4b3b ldr r3, [pc, #236] ; (8000fd8 ) - 8000eea: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000eec: f003 0304 and.w r3, r3, #4 - 8000ef0: 617b str r3, [r7, #20] - 8000ef2: 697b ldr r3, [r7, #20] + 8000f0c: 2300 movs r3, #0 + 8000f0e: 617b str r3, [r7, #20] + 8000f10: 4b3e ldr r3, [pc, #248] ; (800100c ) + 8000f12: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f14: 4a3d ldr r2, [pc, #244] ; (800100c ) + 8000f16: f043 0304 orr.w r3, r3, #4 + 8000f1a: 6313 str r3, [r2, #48] ; 0x30 + 8000f1c: 4b3b ldr r3, [pc, #236] ; (800100c ) + 8000f1e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f20: f003 0304 and.w r3, r3, #4 + 8000f24: 617b str r3, [r7, #20] + 8000f26: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000ef4: 2300 movs r3, #0 - 8000ef6: 613b str r3, [r7, #16] - 8000ef8: 4b37 ldr r3, [pc, #220] ; (8000fd8 ) - 8000efa: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000efc: 4a36 ldr r2, [pc, #216] ; (8000fd8 ) - 8000efe: f043 0301 orr.w r3, r3, #1 - 8000f02: 6313 str r3, [r2, #48] ; 0x30 - 8000f04: 4b34 ldr r3, [pc, #208] ; (8000fd8 ) - 8000f06: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000f08: f003 0301 and.w r3, r3, #1 - 8000f0c: 613b str r3, [r7, #16] - 8000f0e: 693b ldr r3, [r7, #16] + 8000f28: 2300 movs r3, #0 + 8000f2a: 613b str r3, [r7, #16] + 8000f2c: 4b37 ldr r3, [pc, #220] ; (800100c ) + 8000f2e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f30: 4a36 ldr r2, [pc, #216] ; (800100c ) + 8000f32: f043 0301 orr.w r3, r3, #1 + 8000f36: 6313 str r3, [r2, #48] ; 0x30 + 8000f38: 4b34 ldr r3, [pc, #208] ; (800100c ) + 8000f3a: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f3c: f003 0301 and.w r3, r3, #1 + 8000f40: 613b str r3, [r7, #16] + 8000f42: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8000f10: 2300 movs r3, #0 - 8000f12: 60fb str r3, [r7, #12] - 8000f14: 4b30 ldr r3, [pc, #192] ; (8000fd8 ) - 8000f16: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000f18: 4a2f ldr r2, [pc, #188] ; (8000fd8 ) - 8000f1a: f043 0302 orr.w r3, r3, #2 - 8000f1e: 6313 str r3, [r2, #48] ; 0x30 - 8000f20: 4b2d ldr r3, [pc, #180] ; (8000fd8 ) - 8000f22: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000f24: f003 0302 and.w r3, r3, #2 - 8000f28: 60fb str r3, [r7, #12] - 8000f2a: 68fb ldr r3, [r7, #12] + 8000f44: 2300 movs r3, #0 + 8000f46: 60fb str r3, [r7, #12] + 8000f48: 4b30 ldr r3, [pc, #192] ; (800100c ) + 8000f4a: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f4c: 4a2f ldr r2, [pc, #188] ; (800100c ) + 8000f4e: f043 0302 orr.w r3, r3, #2 + 8000f52: 6313 str r3, [r2, #48] ; 0x30 + 8000f54: 4b2d ldr r3, [pc, #180] ; (800100c ) + 8000f56: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f58: f003 0302 and.w r3, r3, #2 + 8000f5c: 60fb str r3, [r7, #12] + 8000f5e: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOG_CLK_ENABLE(); - 8000f2c: 2300 movs r3, #0 - 8000f2e: 60bb str r3, [r7, #8] - 8000f30: 4b29 ldr r3, [pc, #164] ; (8000fd8 ) - 8000f32: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000f34: 4a28 ldr r2, [pc, #160] ; (8000fd8 ) - 8000f36: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8000f3a: 6313 str r3, [r2, #48] ; 0x30 - 8000f3c: 4b26 ldr r3, [pc, #152] ; (8000fd8 ) - 8000f3e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000f40: f003 0340 and.w r3, r3, #64 ; 0x40 - 8000f44: 60bb str r3, [r7, #8] - 8000f46: 68bb ldr r3, [r7, #8] + 8000f60: 2300 movs r3, #0 + 8000f62: 60bb str r3, [r7, #8] + 8000f64: 4b29 ldr r3, [pc, #164] ; (800100c ) + 8000f66: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f68: 4a28 ldr r2, [pc, #160] ; (800100c ) + 8000f6a: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8000f6e: 6313 str r3, [r2, #48] ; 0x30 + 8000f70: 4b26 ldr r3, [pc, #152] ; (800100c ) + 8000f72: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000f74: f003 0340 and.w r3, r3, #64 ; 0x40 + 8000f78: 60bb str r3, [r7, #8] + 8000f7a: 68bb ldr r3, [r7, #8] PC5 ------> ETH_RXD1 PB13 ------> ETH_TXD1 PG11 ------> ETH_TX_EN PG13 ------> ETH_TXD0 */ GPIO_InitStruct.Pin = RMII_MDC_Pin|RMII_RXD0_Pin|RMII_RXD1_Pin; - 8000f48: 2332 movs r3, #50 ; 0x32 - 8000f4a: 627b str r3, [r7, #36] ; 0x24 + 8000f7c: 2332 movs r3, #50 ; 0x32 + 8000f7e: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000f4c: 2302 movs r3, #2 - 8000f4e: 62bb str r3, [r7, #40] ; 0x28 + 8000f80: 2302 movs r3, #2 + 8000f82: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000f50: 2300 movs r3, #0 - 8000f52: 62fb str r3, [r7, #44] ; 0x2c + 8000f84: 2300 movs r3, #0 + 8000f86: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000f54: 2303 movs r3, #3 - 8000f56: 633b str r3, [r7, #48] ; 0x30 + 8000f88: 2303 movs r3, #3 + 8000f8a: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8000f58: 230b movs r3, #11 - 8000f5a: 637b str r3, [r7, #52] ; 0x34 + 8000f8c: 230b movs r3, #11 + 8000f8e: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8000f5c: f107 0324 add.w r3, r7, #36 ; 0x24 - 8000f60: 4619 mov r1, r3 - 8000f62: 481e ldr r0, [pc, #120] ; (8000fdc ) - 8000f64: f000 ff08 bl 8001d78 + 8000f90: f107 0324 add.w r3, r7, #36 ; 0x24 + 8000f94: 4619 mov r1, r3 + 8000f96: 481e ldr r0, [pc, #120] ; (8001010 ) + 8000f98: f000 fe70 bl 8001c7c GPIO_InitStruct.Pin = RMII_REF_CLK_Pin|RMII_MDIO_Pin|RMII_CRS_DV_Pin; - 8000f68: 2386 movs r3, #134 ; 0x86 - 8000f6a: 627b str r3, [r7, #36] ; 0x24 + 8000f9c: 2386 movs r3, #134 ; 0x86 + 8000f9e: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000f6c: 2302 movs r3, #2 - 8000f6e: 62bb str r3, [r7, #40] ; 0x28 + 8000fa0: 2302 movs r3, #2 + 8000fa2: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000f70: 2300 movs r3, #0 - 8000f72: 62fb str r3, [r7, #44] ; 0x2c + 8000fa4: 2300 movs r3, #0 + 8000fa6: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000f74: 2303 movs r3, #3 - 8000f76: 633b str r3, [r7, #48] ; 0x30 + 8000fa8: 2303 movs r3, #3 + 8000faa: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8000f78: 230b movs r3, #11 - 8000f7a: 637b str r3, [r7, #52] ; 0x34 + 8000fac: 230b movs r3, #11 + 8000fae: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000f7c: f107 0324 add.w r3, r7, #36 ; 0x24 - 8000f80: 4619 mov r1, r3 - 8000f82: 4817 ldr r0, [pc, #92] ; (8000fe0 ) - 8000f84: f000 fef8 bl 8001d78 + 8000fb0: f107 0324 add.w r3, r7, #36 ; 0x24 + 8000fb4: 4619 mov r1, r3 + 8000fb6: 4817 ldr r0, [pc, #92] ; (8001014 ) + 8000fb8: f000 fe60 bl 8001c7c GPIO_InitStruct.Pin = RMII_TXD1_Pin; - 8000f88: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8000f8c: 627b str r3, [r7, #36] ; 0x24 + 8000fbc: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8000fc0: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000f8e: 2302 movs r3, #2 - 8000f90: 62bb str r3, [r7, #40] ; 0x28 + 8000fc2: 2302 movs r3, #2 + 8000fc4: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000f92: 2300 movs r3, #0 - 8000f94: 62fb str r3, [r7, #44] ; 0x2c + 8000fc6: 2300 movs r3, #0 + 8000fc8: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000f96: 2303 movs r3, #3 - 8000f98: 633b str r3, [r7, #48] ; 0x30 + 8000fca: 2303 movs r3, #3 + 8000fcc: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8000f9a: 230b movs r3, #11 - 8000f9c: 637b str r3, [r7, #52] ; 0x34 + 8000fce: 230b movs r3, #11 + 8000fd0: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(RMII_TXD1_GPIO_Port, &GPIO_InitStruct); - 8000f9e: f107 0324 add.w r3, r7, #36 ; 0x24 - 8000fa2: 4619 mov r1, r3 - 8000fa4: 480f ldr r0, [pc, #60] ; (8000fe4 ) - 8000fa6: f000 fee7 bl 8001d78 + 8000fd2: f107 0324 add.w r3, r7, #36 ; 0x24 + 8000fd6: 4619 mov r1, r3 + 8000fd8: 480f ldr r0, [pc, #60] ; (8001018 ) + 8000fda: f000 fe4f bl 8001c7c GPIO_InitStruct.Pin = RMII_TX_EN_Pin|RMII_TXD0_Pin; - 8000faa: f44f 5320 mov.w r3, #10240 ; 0x2800 - 8000fae: 627b str r3, [r7, #36] ; 0x24 + 8000fde: f44f 5320 mov.w r3, #10240 ; 0x2800 + 8000fe2: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000fb0: 2302 movs r3, #2 - 8000fb2: 62bb str r3, [r7, #40] ; 0x28 + 8000fe4: 2302 movs r3, #2 + 8000fe6: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000fb4: 2300 movs r3, #0 - 8000fb6: 62fb str r3, [r7, #44] ; 0x2c + 8000fe8: 2300 movs r3, #0 + 8000fea: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000fb8: 2303 movs r3, #3 - 8000fba: 633b str r3, [r7, #48] ; 0x30 + 8000fec: 2303 movs r3, #3 + 8000fee: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8000fbc: 230b movs r3, #11 - 8000fbe: 637b str r3, [r7, #52] ; 0x34 + 8000ff0: 230b movs r3, #11 + 8000ff2: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); - 8000fc0: f107 0324 add.w r3, r7, #36 ; 0x24 - 8000fc4: 4619 mov r1, r3 - 8000fc6: 4808 ldr r0, [pc, #32] ; (8000fe8 ) - 8000fc8: f000 fed6 bl 8001d78 + 8000ff4: f107 0324 add.w r3, r7, #36 ; 0x24 + 8000ff8: 4619 mov r1, r3 + 8000ffa: 4808 ldr r0, [pc, #32] ; (800101c ) + 8000ffc: f000 fe3e bl 8001c7c /* USER CODE END ETH_MspInit 1 */ } } - 8000fcc: bf00 nop - 8000fce: 3738 adds r7, #56 ; 0x38 - 8000fd0: 46bd mov sp, r7 - 8000fd2: bd80 pop {r7, pc} - 8000fd4: 40028000 .word 0x40028000 - 8000fd8: 40023800 .word 0x40023800 - 8000fdc: 40020800 .word 0x40020800 - 8000fe0: 40020000 .word 0x40020000 - 8000fe4: 40020400 .word 0x40020400 - 8000fe8: 40021800 .word 0x40021800 + 8001000: bf00 nop + 8001002: 3738 adds r7, #56 ; 0x38 + 8001004: 46bd mov sp, r7 + 8001006: bd80 pop {r7, pc} + 8001008: 40028000 .word 0x40028000 + 800100c: 40023800 .word 0x40023800 + 8001010: 40020800 .word 0x40020800 + 8001014: 40020000 .word 0x40020000 + 8001018: 40020400 .word 0x40020400 + 800101c: 40021800 .word 0x40021800 -08000fec : +08001020 : * This function configures the hardware resources used in this example * @param hrng: RNG handle pointer * @retval None */ void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng) { - 8000fec: b480 push {r7} - 8000fee: b085 sub sp, #20 - 8000ff0: af00 add r7, sp, #0 - 8000ff2: 6078 str r0, [r7, #4] + 8001020: b480 push {r7} + 8001022: b085 sub sp, #20 + 8001024: af00 add r7, sp, #0 + 8001026: 6078 str r0, [r7, #4] if(hrng->Instance==RNG) - 8000ff4: 687b ldr r3, [r7, #4] - 8000ff6: 681b ldr r3, [r3, #0] - 8000ff8: 4a0b ldr r2, [pc, #44] ; (8001028 ) - 8000ffa: 4293 cmp r3, r2 - 8000ffc: d10d bne.n 800101a + 8001028: 687b ldr r3, [r7, #4] + 800102a: 681b ldr r3, [r3, #0] + 800102c: 4a0b ldr r2, [pc, #44] ; (800105c ) + 800102e: 4293 cmp r3, r2 + 8001030: d10d bne.n 800104e { /* USER CODE BEGIN RNG_MspInit 0 */ /* USER CODE END RNG_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_RNG_CLK_ENABLE(); - 8000ffe: 2300 movs r3, #0 - 8001000: 60fb str r3, [r7, #12] - 8001002: 4b0a ldr r3, [pc, #40] ; (800102c ) - 8001004: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001006: 4a09 ldr r2, [pc, #36] ; (800102c ) - 8001008: f043 0340 orr.w r3, r3, #64 ; 0x40 - 800100c: 6353 str r3, [r2, #52] ; 0x34 - 800100e: 4b07 ldr r3, [pc, #28] ; (800102c ) - 8001010: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001012: f003 0340 and.w r3, r3, #64 ; 0x40 - 8001016: 60fb str r3, [r7, #12] - 8001018: 68fb ldr r3, [r7, #12] + 8001032: 2300 movs r3, #0 + 8001034: 60fb str r3, [r7, #12] + 8001036: 4b0a ldr r3, [pc, #40] ; (8001060 ) + 8001038: 6b5b ldr r3, [r3, #52] ; 0x34 + 800103a: 4a09 ldr r2, [pc, #36] ; (8001060 ) + 800103c: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8001040: 6353 str r3, [r2, #52] ; 0x34 + 8001042: 4b07 ldr r3, [pc, #28] ; (8001060 ) + 8001044: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001046: f003 0340 and.w r3, r3, #64 ; 0x40 + 800104a: 60fb str r3, [r7, #12] + 800104c: 68fb ldr r3, [r7, #12] /* USER CODE END RNG_MspInit 1 */ } } - 800101a: bf00 nop - 800101c: 3714 adds r7, #20 - 800101e: 46bd mov sp, r7 - 8001020: f85d 7b04 ldr.w r7, [sp], #4 - 8001024: 4770 bx lr - 8001026: bf00 nop - 8001028: 50060800 .word 0x50060800 - 800102c: 40023800 .word 0x40023800 + 800104e: bf00 nop + 8001050: 3714 adds r7, #20 + 8001052: 46bd mov sp, r7 + 8001054: f85d 7b04 ldr.w r7, [sp], #4 + 8001058: 4770 bx lr + 800105a: bf00 nop + 800105c: 50060800 .word 0x50060800 + 8001060: 40023800 .word 0x40023800 -08001030 : +08001064 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - 8001030: b580 push {r7, lr} - 8001032: b08a sub sp, #40 ; 0x28 - 8001034: af00 add r7, sp, #0 - 8001036: 6078 str r0, [r7, #4] + 8001064: b580 push {r7, lr} + 8001066: b08c sub sp, #48 ; 0x30 + 8001068: af00 add r7, sp, #0 + 800106a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001038: f107 0314 add.w r3, r7, #20 - 800103c: 2200 movs r2, #0 - 800103e: 601a str r2, [r3, #0] - 8001040: 605a str r2, [r3, #4] - 8001042: 609a str r2, [r3, #8] - 8001044: 60da str r2, [r3, #12] - 8001046: 611a str r2, [r3, #16] + 800106c: f107 031c add.w r3, r7, #28 + 8001070: 2200 movs r2, #0 + 8001072: 601a str r2, [r3, #0] + 8001074: 605a str r2, [r3, #4] + 8001076: 609a str r2, [r3, #8] + 8001078: 60da str r2, [r3, #12] + 800107a: 611a str r2, [r3, #16] if(huart->Instance==USART3) - 8001048: 687b ldr r3, [r7, #4] - 800104a: 681b ldr r3, [r3, #0] - 800104c: 4a1d ldr r2, [pc, #116] ; (80010c4 ) - 800104e: 4293 cmp r3, r2 - 8001050: d134 bne.n 80010bc + 800107c: 687b ldr r3, [r7, #4] + 800107e: 681b ldr r3, [r3, #0] + 8001080: 4a33 ldr r2, [pc, #204] ; (8001150 ) + 8001082: 4293 cmp r3, r2 + 8001084: d12d bne.n 80010e2 { /* USER CODE BEGIN USART3_MspInit 0 */ /* USER CODE END USART3_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART3_CLK_ENABLE(); - 8001052: 2300 movs r3, #0 - 8001054: 613b str r3, [r7, #16] - 8001056: 4b1c ldr r3, [pc, #112] ; (80010c8 ) - 8001058: 6c1b ldr r3, [r3, #64] ; 0x40 - 800105a: 4a1b ldr r2, [pc, #108] ; (80010c8 ) - 800105c: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8001060: 6413 str r3, [r2, #64] ; 0x40 - 8001062: 4b19 ldr r3, [pc, #100] ; (80010c8 ) - 8001064: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001066: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 800106a: 613b str r3, [r7, #16] - 800106c: 693b ldr r3, [r7, #16] + 8001086: 2300 movs r3, #0 + 8001088: 61bb str r3, [r7, #24] + 800108a: 4b32 ldr r3, [pc, #200] ; (8001154 ) + 800108c: 6c1b ldr r3, [r3, #64] ; 0x40 + 800108e: 4a31 ldr r2, [pc, #196] ; (8001154 ) + 8001090: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 8001094: 6413 str r3, [r2, #64] ; 0x40 + 8001096: 4b2f ldr r3, [pc, #188] ; (8001154 ) + 8001098: 6c1b ldr r3, [r3, #64] ; 0x40 + 800109a: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 800109e: 61bb str r3, [r7, #24] + 80010a0: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); - 800106e: 2300 movs r3, #0 - 8001070: 60fb str r3, [r7, #12] - 8001072: 4b15 ldr r3, [pc, #84] ; (80010c8 ) - 8001074: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001076: 4a14 ldr r2, [pc, #80] ; (80010c8 ) - 8001078: f043 0308 orr.w r3, r3, #8 - 800107c: 6313 str r3, [r2, #48] ; 0x30 - 800107e: 4b12 ldr r3, [pc, #72] ; (80010c8 ) - 8001080: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001082: f003 0308 and.w r3, r3, #8 - 8001086: 60fb str r3, [r7, #12] - 8001088: 68fb ldr r3, [r7, #12] + 80010a2: 2300 movs r3, #0 + 80010a4: 617b str r3, [r7, #20] + 80010a6: 4b2b ldr r3, [pc, #172] ; (8001154 ) + 80010a8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80010aa: 4a2a ldr r2, [pc, #168] ; (8001154 ) + 80010ac: f043 0308 orr.w r3, r3, #8 + 80010b0: 6313 str r3, [r2, #48] ; 0x30 + 80010b2: 4b28 ldr r3, [pc, #160] ; (8001154 ) + 80010b4: 6b1b ldr r3, [r3, #48] ; 0x30 + 80010b6: f003 0308 and.w r3, r3, #8 + 80010ba: 617b str r3, [r7, #20] + 80010bc: 697b ldr r3, [r7, #20] /**USART3 GPIO Configuration PD8 ------> USART3_TX PD9 ------> USART3_RX */ GPIO_InitStruct.Pin = STLK_RX_Pin|STLK_TX_Pin; - 800108a: f44f 7340 mov.w r3, #768 ; 0x300 - 800108e: 617b str r3, [r7, #20] + 80010be: f44f 7340 mov.w r3, #768 ; 0x300 + 80010c2: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8001090: 2302 movs r3, #2 - 8001092: 61bb str r3, [r7, #24] + 80010c4: 2302 movs r3, #2 + 80010c6: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001094: 2300 movs r3, #0 - 8001096: 61fb str r3, [r7, #28] + 80010c8: 2300 movs r3, #0 + 80010ca: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8001098: 2303 movs r3, #3 - 800109a: 623b str r3, [r7, #32] + 80010cc: 2303 movs r3, #3 + 80010ce: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - 800109c: 2307 movs r3, #7 - 800109e: 627b str r3, [r7, #36] ; 0x24 + 80010d0: 2307 movs r3, #7 + 80010d2: 62fb str r3, [r7, #44] ; 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 80010a0: f107 0314 add.w r3, r7, #20 - 80010a4: 4619 mov r1, r3 - 80010a6: 4809 ldr r0, [pc, #36] ; (80010cc ) - 80010a8: f000 fe66 bl 8001d78 - - /* USART3 interrupt Init */ - HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); - 80010ac: 2200 movs r2, #0 - 80010ae: 2100 movs r1, #0 - 80010b0: 2027 movs r0, #39 ; 0x27 - 80010b2: f000 fa48 bl 8001546 - HAL_NVIC_EnableIRQ(USART3_IRQn); - 80010b6: 2027 movs r0, #39 ; 0x27 - 80010b8: f000 fa61 bl 800157e - - /* USER CODE END USART3_MspInit 1 */ + 80010d4: f107 031c add.w r3, r7, #28 + 80010d8: 4619 mov r1, r3 + 80010da: 481f ldr r0, [pc, #124] ; (8001158 ) + 80010dc: f000 fdce bl 8001c7c + /* USER CODE BEGIN USART6_MspInit 1 */ + /* USER CODE END USART6_MspInit 1 */ } } - 80010bc: bf00 nop - 80010be: 3728 adds r7, #40 ; 0x28 - 80010c0: 46bd mov sp, r7 - 80010c2: bd80 pop {r7, pc} - 80010c4: 40004800 .word 0x40004800 - 80010c8: 40023800 .word 0x40023800 - 80010cc: 40020c00 .word 0x40020c00 + 80010e0: e031 b.n 8001146 + else if(huart->Instance==USART6) + 80010e2: 687b ldr r3, [r7, #4] + 80010e4: 681b ldr r3, [r3, #0] + 80010e6: 4a1d ldr r2, [pc, #116] ; (800115c ) + 80010e8: 4293 cmp r3, r2 + 80010ea: d12c bne.n 8001146 + __HAL_RCC_USART6_CLK_ENABLE(); + 80010ec: 2300 movs r3, #0 + 80010ee: 613b str r3, [r7, #16] + 80010f0: 4b18 ldr r3, [pc, #96] ; (8001154 ) + 80010f2: 6c5b ldr r3, [r3, #68] ; 0x44 + 80010f4: 4a17 ldr r2, [pc, #92] ; (8001154 ) + 80010f6: f043 0320 orr.w r3, r3, #32 + 80010fa: 6453 str r3, [r2, #68] ; 0x44 + 80010fc: 4b15 ldr r3, [pc, #84] ; (8001154 ) + 80010fe: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001100: f003 0320 and.w r3, r3, #32 + 8001104: 613b str r3, [r7, #16] + 8001106: 693b ldr r3, [r7, #16] + __HAL_RCC_GPIOG_CLK_ENABLE(); + 8001108: 2300 movs r3, #0 + 800110a: 60fb str r3, [r7, #12] + 800110c: 4b11 ldr r3, [pc, #68] ; (8001154 ) + 800110e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001110: 4a10 ldr r2, [pc, #64] ; (8001154 ) + 8001112: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8001116: 6313 str r3, [r2, #48] ; 0x30 + 8001118: 4b0e ldr r3, [pc, #56] ; (8001154 ) + 800111a: 6b1b ldr r3, [r3, #48] ; 0x30 + 800111c: f003 0340 and.w r3, r3, #64 ; 0x40 + 8001120: 60fb str r3, [r7, #12] + 8001122: 68fb ldr r3, [r7, #12] + GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_14; + 8001124: f44f 4384 mov.w r3, #16896 ; 0x4200 + 8001128: 61fb str r3, [r7, #28] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 800112a: 2302 movs r3, #2 + 800112c: 623b str r3, [r7, #32] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 800112e: 2300 movs r3, #0 + 8001130: 627b str r3, [r7, #36] ; 0x24 + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + 8001132: 2303 movs r3, #3 + 8001134: 62bb str r3, [r7, #40] ; 0x28 + GPIO_InitStruct.Alternate = GPIO_AF8_USART6; + 8001136: 2308 movs r3, #8 + 8001138: 62fb str r3, [r7, #44] ; 0x2c + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + 800113a: f107 031c add.w r3, r7, #28 + 800113e: 4619 mov r1, r3 + 8001140: 4807 ldr r0, [pc, #28] ; (8001160 ) + 8001142: f000 fd9b bl 8001c7c +} + 8001146: bf00 nop + 8001148: 3730 adds r7, #48 ; 0x30 + 800114a: 46bd mov sp, r7 + 800114c: bd80 pop {r7, pc} + 800114e: bf00 nop + 8001150: 40004800 .word 0x40004800 + 8001154: 40023800 .word 0x40023800 + 8001158: 40020c00 .word 0x40020c00 + 800115c: 40011400 .word 0x40011400 + 8001160: 40021800 .word 0x40021800 -080010d0 : +08001164 : * This function configures the hardware resources used in this example * @param hpcd: PCD handle pointer * @retval None */ void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd) { - 80010d0: b580 push {r7, lr} - 80010d2: b08a sub sp, #40 ; 0x28 - 80010d4: af00 add r7, sp, #0 - 80010d6: 6078 str r0, [r7, #4] + 8001164: b580 push {r7, lr} + 8001166: b08a sub sp, #40 ; 0x28 + 8001168: af00 add r7, sp, #0 + 800116a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80010d8: f107 0314 add.w r3, r7, #20 - 80010dc: 2200 movs r2, #0 - 80010de: 601a str r2, [r3, #0] - 80010e0: 605a str r2, [r3, #4] - 80010e2: 609a str r2, [r3, #8] - 80010e4: 60da str r2, [r3, #12] - 80010e6: 611a str r2, [r3, #16] + 800116c: f107 0314 add.w r3, r7, #20 + 8001170: 2200 movs r2, #0 + 8001172: 601a str r2, [r3, #0] + 8001174: 605a str r2, [r3, #4] + 8001176: 609a str r2, [r3, #8] + 8001178: 60da str r2, [r3, #12] + 800117a: 611a str r2, [r3, #16] if(hpcd->Instance==USB_OTG_FS) - 80010e8: 687b ldr r3, [r7, #4] - 80010ea: 681b ldr r3, [r3, #0] - 80010ec: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80010f0: d13f bne.n 8001172 + 800117c: 687b ldr r3, [r7, #4] + 800117e: 681b ldr r3, [r3, #0] + 8001180: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 8001184: d13f bne.n 8001206 { /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ /* USER CODE END USB_OTG_FS_MspInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 80010f2: 2300 movs r3, #0 - 80010f4: 613b str r3, [r7, #16] - 80010f6: 4b21 ldr r3, [pc, #132] ; (800117c ) - 80010f8: 6b1b ldr r3, [r3, #48] ; 0x30 - 80010fa: 4a20 ldr r2, [pc, #128] ; (800117c ) - 80010fc: f043 0301 orr.w r3, r3, #1 - 8001100: 6313 str r3, [r2, #48] ; 0x30 - 8001102: 4b1e ldr r3, [pc, #120] ; (800117c ) - 8001104: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001106: f003 0301 and.w r3, r3, #1 - 800110a: 613b str r3, [r7, #16] - 800110c: 693b ldr r3, [r7, #16] + 8001186: 2300 movs r3, #0 + 8001188: 613b str r3, [r7, #16] + 800118a: 4b21 ldr r3, [pc, #132] ; (8001210 ) + 800118c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800118e: 4a20 ldr r2, [pc, #128] ; (8001210 ) + 8001190: f043 0301 orr.w r3, r3, #1 + 8001194: 6313 str r3, [r2, #48] ; 0x30 + 8001196: 4b1e ldr r3, [pc, #120] ; (8001210 ) + 8001198: 6b1b ldr r3, [r3, #48] ; 0x30 + 800119a: f003 0301 and.w r3, r3, #1 + 800119e: 613b str r3, [r7, #16] + 80011a0: 693b ldr r3, [r7, #16] PA9 ------> USB_OTG_FS_VBUS PA10 ------> USB_OTG_FS_ID PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ GPIO_InitStruct.Pin = USB_SOF_Pin|USB_ID_Pin|USB_DM_Pin|USB_DP_Pin; - 800110e: f44f 53e8 mov.w r3, #7424 ; 0x1d00 - 8001112: 617b str r3, [r7, #20] + 80011a2: f44f 53e8 mov.w r3, #7424 ; 0x1d00 + 80011a6: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8001114: 2302 movs r3, #2 - 8001116: 61bb str r3, [r7, #24] + 80011a8: 2302 movs r3, #2 + 80011aa: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001118: 2300 movs r3, #0 - 800111a: 61fb str r3, [r7, #28] + 80011ac: 2300 movs r3, #0 + 80011ae: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 800111c: 2303 movs r3, #3 - 800111e: 623b str r3, [r7, #32] + 80011b0: 2303 movs r3, #3 + 80011b2: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; - 8001120: 230a movs r3, #10 - 8001122: 627b str r3, [r7, #36] ; 0x24 + 80011b4: 230a movs r3, #10 + 80011b6: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001124: f107 0314 add.w r3, r7, #20 - 8001128: 4619 mov r1, r3 - 800112a: 4815 ldr r0, [pc, #84] ; (8001180 ) - 800112c: f000 fe24 bl 8001d78 + 80011b8: f107 0314 add.w r3, r7, #20 + 80011bc: 4619 mov r1, r3 + 80011be: 4815 ldr r0, [pc, #84] ; (8001214 ) + 80011c0: f000 fd5c bl 8001c7c GPIO_InitStruct.Pin = USB_VBUS_Pin; - 8001130: f44f 7300 mov.w r3, #512 ; 0x200 - 8001134: 617b str r3, [r7, #20] + 80011c4: f44f 7300 mov.w r3, #512 ; 0x200 + 80011c8: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8001136: 2300 movs r3, #0 - 8001138: 61bb str r3, [r7, #24] + 80011ca: 2300 movs r3, #0 + 80011cc: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800113a: 2300 movs r3, #0 - 800113c: 61fb str r3, [r7, #28] + 80011ce: 2300 movs r3, #0 + 80011d0: 61fb str r3, [r7, #28] HAL_GPIO_Init(USB_VBUS_GPIO_Port, &GPIO_InitStruct); - 800113e: f107 0314 add.w r3, r7, #20 - 8001142: 4619 mov r1, r3 - 8001144: 480e ldr r0, [pc, #56] ; (8001180 ) - 8001146: f000 fe17 bl 8001d78 + 80011d2: f107 0314 add.w r3, r7, #20 + 80011d6: 4619 mov r1, r3 + 80011d8: 480e ldr r0, [pc, #56] ; (8001214 ) + 80011da: f000 fd4f bl 8001c7c /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - 800114a: 4b0c ldr r3, [pc, #48] ; (800117c ) - 800114c: 6b5b ldr r3, [r3, #52] ; 0x34 - 800114e: 4a0b ldr r2, [pc, #44] ; (800117c ) - 8001150: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8001154: 6353 str r3, [r2, #52] ; 0x34 - 8001156: 2300 movs r3, #0 - 8001158: 60fb str r3, [r7, #12] - 800115a: 4b08 ldr r3, [pc, #32] ; (800117c ) - 800115c: 6c5b ldr r3, [r3, #68] ; 0x44 - 800115e: 4a07 ldr r2, [pc, #28] ; (800117c ) - 8001160: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8001164: 6453 str r3, [r2, #68] ; 0x44 - 8001166: 4b05 ldr r3, [pc, #20] ; (800117c ) - 8001168: 6c5b ldr r3, [r3, #68] ; 0x44 - 800116a: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 800116e: 60fb str r3, [r7, #12] - 8001170: 68fb ldr r3, [r7, #12] + 80011de: 4b0c ldr r3, [pc, #48] ; (8001210 ) + 80011e0: 6b5b ldr r3, [r3, #52] ; 0x34 + 80011e2: 4a0b ldr r2, [pc, #44] ; (8001210 ) + 80011e4: f043 0380 orr.w r3, r3, #128 ; 0x80 + 80011e8: 6353 str r3, [r2, #52] ; 0x34 + 80011ea: 2300 movs r3, #0 + 80011ec: 60fb str r3, [r7, #12] + 80011ee: 4b08 ldr r3, [pc, #32] ; (8001210 ) + 80011f0: 6c5b ldr r3, [r3, #68] ; 0x44 + 80011f2: 4a07 ldr r2, [pc, #28] ; (8001210 ) + 80011f4: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 80011f8: 6453 str r3, [r2, #68] ; 0x44 + 80011fa: 4b05 ldr r3, [pc, #20] ; (8001210 ) + 80011fc: 6c5b ldr r3, [r3, #68] ; 0x44 + 80011fe: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8001202: 60fb str r3, [r7, #12] + 8001204: 68fb ldr r3, [r7, #12] /* USER CODE END USB_OTG_FS_MspInit 1 */ } } - 8001172: bf00 nop - 8001174: 3728 adds r7, #40 ; 0x28 - 8001176: 46bd mov sp, r7 - 8001178: bd80 pop {r7, pc} - 800117a: bf00 nop - 800117c: 40023800 .word 0x40023800 - 8001180: 40020000 .word 0x40020000 + 8001206: bf00 nop + 8001208: 3728 adds r7, #40 ; 0x28 + 800120a: 46bd mov sp, r7 + 800120c: bd80 pop {r7, pc} + 800120e: bf00 nop + 8001210: 40023800 .word 0x40023800 + 8001214: 40020000 .word 0x40020000 -08001184 : +08001218 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8001184: b480 push {r7} - 8001186: af00 add r7, sp, #0 + 8001218: b480 push {r7} + 800121a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8001188: e7fe b.n 8001188 + 800121c: e7fe b.n 800121c -0800118a : +0800121e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 800118a: b480 push {r7} - 800118c: af00 add r7, sp, #0 + 800121e: b480 push {r7} + 8001220: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 800118e: e7fe b.n 800118e + 8001222: e7fe b.n 8001222 -08001190 : +08001224 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8001190: b480 push {r7} - 8001192: af00 add r7, sp, #0 + 8001224: b480 push {r7} + 8001226: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8001194: e7fe b.n 8001194 + 8001228: e7fe b.n 8001228 -08001196 : +0800122a : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 8001196: b480 push {r7} - 8001198: af00 add r7, sp, #0 + 800122a: b480 push {r7} + 800122c: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 800119a: e7fe b.n 800119a + 800122e: e7fe b.n 800122e -0800119c : +08001230 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 800119c: b480 push {r7} - 800119e: af00 add r7, sp, #0 + 8001230: b480 push {r7} + 8001232: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 80011a0: e7fe b.n 80011a0 + 8001234: e7fe b.n 8001234 -080011a2 : +08001236 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 80011a2: b480 push {r7} - 80011a4: af00 add r7, sp, #0 + 8001236: b480 push {r7} + 8001238: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 80011a6: bf00 nop - 80011a8: 46bd mov sp, r7 - 80011aa: f85d 7b04 ldr.w r7, [sp], #4 - 80011ae: 4770 bx lr + 800123a: bf00 nop + 800123c: 46bd mov sp, r7 + 800123e: f85d 7b04 ldr.w r7, [sp], #4 + 8001242: 4770 bx lr -080011b0 : +08001244 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 80011b0: b480 push {r7} - 80011b2: af00 add r7, sp, #0 + 8001244: b480 push {r7} + 8001246: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 80011b4: bf00 nop - 80011b6: 46bd mov sp, r7 - 80011b8: f85d 7b04 ldr.w r7, [sp], #4 - 80011bc: 4770 bx lr + 8001248: bf00 nop + 800124a: 46bd mov sp, r7 + 800124c: f85d 7b04 ldr.w r7, [sp], #4 + 8001250: 4770 bx lr -080011be : +08001252 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 80011be: b480 push {r7} - 80011c0: af00 add r7, sp, #0 + 8001252: b480 push {r7} + 8001254: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 80011c2: bf00 nop - 80011c4: 46bd mov sp, r7 - 80011c6: f85d 7b04 ldr.w r7, [sp], #4 - 80011ca: 4770 bx lr + 8001256: bf00 nop + 8001258: 46bd mov sp, r7 + 800125a: f85d 7b04 ldr.w r7, [sp], #4 + 800125e: 4770 bx lr -080011cc : +08001260 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 80011cc: b580 push {r7, lr} - 80011ce: af00 add r7, sp, #0 + 8001260: b580 push {r7, lr} + 8001262: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 80011d0: f000 f89a bl 8001308 + 8001264: f000 f890 bl 8001388 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 80011d4: bf00 nop - 80011d6: bd80 pop {r7, pc} + 8001268: bf00 nop + 800126a: bd80 pop {r7, pc} -080011d8 : - -/** - * @brief This function handles USART3 global interrupt. - */ -void USART3_IRQHandler(void) -{ - 80011d8: b580 push {r7, lr} - 80011da: af00 add r7, sp, #0 - /* USER CODE BEGIN USART3_IRQn 0 */ - - /* USER CODE END USART3_IRQn 0 */ - HAL_UART_IRQHandler(&huart3); - 80011dc: 4802 ldr r0, [pc, #8] ; (80011e8 ) - 80011de: f001 feed bl 8002fbc - /* USER CODE BEGIN USART3_IRQn 1 */ - - /* USER CODE END USART3_IRQn 1 */ -} - 80011e2: bf00 nop - 80011e4: bd80 pop {r7, pc} - 80011e6: bf00 nop - 80011e8: 20000b24 .word 0x20000b24 - -080011ec : +0800126c : * configuration. * @param None * @retval None */ void SystemInit(void) { - 80011ec: b480 push {r7} - 80011ee: af00 add r7, sp, #0 + 800126c: b480 push {r7} + 800126e: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 80011f0: 4b06 ldr r3, [pc, #24] ; (800120c ) - 80011f2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 80011f6: 4a05 ldr r2, [pc, #20] ; (800120c ) - 80011f8: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 80011fc: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 8001270: 4b06 ldr r3, [pc, #24] ; (800128c ) + 8001272: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8001276: 4a05 ldr r2, [pc, #20] ; (800128c ) + 8001278: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 800127c: f8c2 3088 str.w r3, [r2, #136] ; 0x88 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8001200: bf00 nop - 8001202: 46bd mov sp, r7 - 8001204: f85d 7b04 ldr.w r7, [sp], #4 - 8001208: 4770 bx lr - 800120a: bf00 nop - 800120c: e000ed00 .word 0xe000ed00 + 8001280: bf00 nop + 8001282: 46bd mov sp, r7 + 8001284: f85d 7b04 ldr.w r7, [sp], #4 + 8001288: 4770 bx lr + 800128a: bf00 nop + 800128c: e000ed00 .word 0xe000ed00 -08001210 : +08001290 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ - 8001210: f8df d034 ldr.w sp, [pc, #52] ; 8001248 + 8001290: f8df d034 ldr.w sp, [pc, #52] ; 80012c8 /* Call the clock system initialization function.*/ bl SystemInit - 8001214: f7ff ffea bl 80011ec + 8001294: f7ff ffea bl 800126c /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8001218: 480c ldr r0, [pc, #48] ; (800124c ) + 8001298: 480c ldr r0, [pc, #48] ; (80012cc ) ldr r1, =_edata - 800121a: 490d ldr r1, [pc, #52] ; (8001250 ) + 800129a: 490d ldr r1, [pc, #52] ; (80012d0 ) ldr r2, =_sidata - 800121c: 4a0d ldr r2, [pc, #52] ; (8001254 ) + 800129c: 4a0d ldr r2, [pc, #52] ; (80012d4 ) movs r3, #0 - 800121e: 2300 movs r3, #0 + 800129e: 2300 movs r3, #0 b LoopCopyDataInit - 8001220: e002 b.n 8001228 + 80012a0: e002 b.n 80012a8 -08001222 : +080012a2 : CopyDataInit: ldr r4, [r2, r3] - 8001222: 58d4 ldr r4, [r2, r3] + 80012a2: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8001224: 50c4 str r4, [r0, r3] + 80012a4: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8001226: 3304 adds r3, #4 + 80012a6: 3304 adds r3, #4 -08001228 : +080012a8 : LoopCopyDataInit: adds r4, r0, r3 - 8001228: 18c4 adds r4, r0, r3 + 80012a8: 18c4 adds r4, r0, r3 cmp r4, r1 - 800122a: 428c cmp r4, r1 + 80012aa: 428c cmp r4, r1 bcc CopyDataInit - 800122c: d3f9 bcc.n 8001222 + 80012ac: d3f9 bcc.n 80012a2 /* Zero fill the bss segment. */ ldr r2, =_sbss - 800122e: 4a0a ldr r2, [pc, #40] ; (8001258 ) + 80012ae: 4a0a ldr r2, [pc, #40] ; (80012d8 ) ldr r4, =_ebss - 8001230: 4c0a ldr r4, [pc, #40] ; (800125c ) + 80012b0: 4c0a ldr r4, [pc, #40] ; (80012dc ) movs r3, #0 - 8001232: 2300 movs r3, #0 + 80012b2: 2300 movs r3, #0 b LoopFillZerobss - 8001234: e001 b.n 800123a + 80012b4: e001 b.n 80012ba -08001236 : +080012b6 : FillZerobss: str r3, [r2] - 8001236: 6013 str r3, [r2, #0] + 80012b6: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8001238: 3204 adds r2, #4 + 80012b8: 3204 adds r2, #4 -0800123a : +080012ba : LoopFillZerobss: cmp r2, r4 - 800123a: 42a2 cmp r2, r4 + 80012ba: 42a2 cmp r2, r4 bcc FillZerobss - 800123c: d3fb bcc.n 8001236 + 80012bc: d3fb bcc.n 80012b6 /* Call static constructors */ bl __libc_init_array - 800123e: f003 f8fd bl 800443c <__libc_init_array> + 80012be: f002 fc3d bl 8003b3c <__libc_init_array> /* Call the application's entry point.*/ bl main - 8001242: f7ff fb93 bl 800096c
+ 80012c2: f7ff fb53 bl 800096c
bx lr - 8001246: 4770 bx lr + 80012c6: 4770 bx lr ldr sp, =_estack /* set stack pointer */ - 8001248: 20030000 .word 0x20030000 + 80012c8: 20030000 .word 0x20030000 ldr r0, =_sdata - 800124c: 20000000 .word 0x20000000 + 80012cc: 20000000 .word 0x20000000 ldr r1, =_edata - 8001250: 200006c8 .word 0x200006c8 + 80012d0: 200006c8 .word 0x200006c8 ldr r2, =_sidata - 8001254: 08004594 .word 0x08004594 + 80012d4: 08003c94 .word 0x08003c94 ldr r2, =_sbss - 8001258: 200006c8 .word 0x200006c8 + 80012d8: 200006c8 .word 0x200006c8 ldr r4, =_ebss - 800125c: 200011f4 .word 0x200011f4 + 80012dc: 2000123c .word 0x2000123c -08001260 : +080012e0 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8001260: e7fe b.n 8001260 + 80012e0: e7fe b.n 80012e0 ... -08001264 : +080012e4 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8001264: b580 push {r7, lr} - 8001266: af00 add r7, sp, #0 + 80012e4: b580 push {r7, lr} + 80012e6: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - 8001268: 4b0e ldr r3, [pc, #56] ; (80012a4 ) - 800126a: 681b ldr r3, [r3, #0] - 800126c: 4a0d ldr r2, [pc, #52] ; (80012a4 ) - 800126e: f443 7300 orr.w r3, r3, #512 ; 0x200 - 8001272: 6013 str r3, [r2, #0] + 80012e8: 4b0e ldr r3, [pc, #56] ; (8001324 ) + 80012ea: 681b ldr r3, [r3, #0] + 80012ec: 4a0d ldr r2, [pc, #52] ; (8001324 ) + 80012ee: f443 7300 orr.w r3, r3, #512 ; 0x200 + 80012f2: 6013 str r3, [r2, #0] #endif /* INSTRUCTION_CACHE_ENABLE */ #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); - 8001274: 4b0b ldr r3, [pc, #44] ; (80012a4 ) - 8001276: 681b ldr r3, [r3, #0] - 8001278: 4a0a ldr r2, [pc, #40] ; (80012a4 ) - 800127a: f443 6380 orr.w r3, r3, #1024 ; 0x400 - 800127e: 6013 str r3, [r2, #0] + 80012f4: 4b0b ldr r3, [pc, #44] ; (8001324 ) + 80012f6: 681b ldr r3, [r3, #0] + 80012f8: 4a0a ldr r2, [pc, #40] ; (8001324 ) + 80012fa: f443 6380 orr.w r3, r3, #1024 ; 0x400 + 80012fe: 6013 str r3, [r2, #0] #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8001280: 4b08 ldr r3, [pc, #32] ; (80012a4 ) - 8001282: 681b ldr r3, [r3, #0] - 8001284: 4a07 ldr r2, [pc, #28] ; (80012a4 ) - 8001286: f443 7380 orr.w r3, r3, #256 ; 0x100 - 800128a: 6013 str r3, [r2, #0] + 8001300: 4b08 ldr r3, [pc, #32] ; (8001324 ) + 8001302: 681b ldr r3, [r3, #0] + 8001304: 4a07 ldr r2, [pc, #28] ; (8001324 ) + 8001306: f443 7380 orr.w r3, r3, #256 ; 0x100 + 800130a: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 800128c: 2003 movs r0, #3 - 800128e: f000 f94f bl 8001530 + 800130c: 2003 movs r0, #3 + 800130e: f000 f931 bl 8001574 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 8001292: 2000 movs r0, #0 - 8001294: f000 f808 bl 80012a8 + 8001312: 2000 movs r0, #0 + 8001314: f000 f808 bl 8001328 /* Init the low level hardware */ HAL_MspInit(); - 8001298: f7ff fdba bl 8000e10 + 8001318: f7ff fd94 bl 8000e44 /* Return function status */ return HAL_OK; - 800129c: 2300 movs r3, #0 + 800131c: 2300 movs r3, #0 } - 800129e: 4618 mov r0, r3 - 80012a0: bd80 pop {r7, pc} - 80012a2: bf00 nop - 80012a4: 40023c00 .word 0x40023c00 + 800131e: 4618 mov r0, r3 + 8001320: bd80 pop {r7, pc} + 8001322: bf00 nop + 8001324: 40023c00 .word 0x40023c00 -080012a8 : +08001328 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 80012a8: b580 push {r7, lr} - 80012aa: b082 sub sp, #8 - 80012ac: af00 add r7, sp, #0 - 80012ae: 6078 str r0, [r7, #4] + 8001328: b580 push {r7, lr} + 800132a: b082 sub sp, #8 + 800132c: af00 add r7, sp, #0 + 800132e: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 80012b0: 4b12 ldr r3, [pc, #72] ; (80012fc ) - 80012b2: 681a ldr r2, [r3, #0] - 80012b4: 4b12 ldr r3, [pc, #72] ; (8001300 ) - 80012b6: 781b ldrb r3, [r3, #0] - 80012b8: 4619 mov r1, r3 - 80012ba: f44f 737a mov.w r3, #1000 ; 0x3e8 - 80012be: fbb3 f3f1 udiv r3, r3, r1 - 80012c2: fbb2 f3f3 udiv r3, r2, r3 - 80012c6: 4618 mov r0, r3 - 80012c8: f000 f967 bl 800159a - 80012cc: 4603 mov r3, r0 - 80012ce: 2b00 cmp r3, #0 - 80012d0: d001 beq.n 80012d6 + 8001330: 4b12 ldr r3, [pc, #72] ; (800137c ) + 8001332: 681a ldr r2, [r3, #0] + 8001334: 4b12 ldr r3, [pc, #72] ; (8001380 ) + 8001336: 781b ldrb r3, [r3, #0] + 8001338: 4619 mov r1, r3 + 800133a: f44f 737a mov.w r3, #1000 ; 0x3e8 + 800133e: fbb3 f3f1 udiv r3, r3, r1 + 8001342: fbb2 f3f3 udiv r3, r2, r3 + 8001346: 4618 mov r0, r3 + 8001348: f000 f93b bl 80015c2 + 800134c: 4603 mov r3, r0 + 800134e: 2b00 cmp r3, #0 + 8001350: d001 beq.n 8001356 { return HAL_ERROR; - 80012d2: 2301 movs r3, #1 - 80012d4: e00e b.n 80012f4 + 8001352: 2301 movs r3, #1 + 8001354: e00e b.n 8001374 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 80012d6: 687b ldr r3, [r7, #4] - 80012d8: 2b0f cmp r3, #15 - 80012da: d80a bhi.n 80012f2 + 8001356: 687b ldr r3, [r7, #4] + 8001358: 2b0f cmp r3, #15 + 800135a: d80a bhi.n 8001372 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 80012dc: 2200 movs r2, #0 - 80012de: 6879 ldr r1, [r7, #4] - 80012e0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 80012e4: f000 f92f bl 8001546 + 800135c: 2200 movs r2, #0 + 800135e: 6879 ldr r1, [r7, #4] + 8001360: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8001364: f000 f911 bl 800158a uwTickPrio = TickPriority; - 80012e8: 4a06 ldr r2, [pc, #24] ; (8001304 ) - 80012ea: 687b ldr r3, [r7, #4] - 80012ec: 6013 str r3, [r2, #0] + 8001368: 4a06 ldr r2, [pc, #24] ; (8001384 ) + 800136a: 687b ldr r3, [r7, #4] + 800136c: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 80012ee: 2300 movs r3, #0 - 80012f0: e000 b.n 80012f4 + 800136e: 2300 movs r3, #0 + 8001370: e000 b.n 8001374 return HAL_ERROR; - 80012f2: 2301 movs r3, #1 + 8001372: 2301 movs r3, #1 } - 80012f4: 4618 mov r0, r3 - 80012f6: 3708 adds r7, #8 - 80012f8: 46bd mov sp, r7 - 80012fa: bd80 pop {r7, pc} - 80012fc: 200006b8 .word 0x200006b8 - 8001300: 200006c0 .word 0x200006c0 - 8001304: 200006bc .word 0x200006bc + 8001374: 4618 mov r0, r3 + 8001376: 3708 adds r7, #8 + 8001378: 46bd mov sp, r7 + 800137a: bd80 pop {r7, pc} + 800137c: 200006b8 .word 0x200006b8 + 8001380: 200006c0 .word 0x200006c0 + 8001384: 200006bc .word 0x200006bc -08001308 : +08001388 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8001308: b480 push {r7} - 800130a: af00 add r7, sp, #0 + 8001388: b480 push {r7} + 800138a: af00 add r7, sp, #0 uwTick += uwTickFreq; - 800130c: 4b06 ldr r3, [pc, #24] ; (8001328 ) - 800130e: 781b ldrb r3, [r3, #0] - 8001310: 461a mov r2, r3 - 8001312: 4b06 ldr r3, [pc, #24] ; (800132c ) - 8001314: 681b ldr r3, [r3, #0] - 8001316: 4413 add r3, r2 - 8001318: 4a04 ldr r2, [pc, #16] ; (800132c ) - 800131a: 6013 str r3, [r2, #0] + 800138c: 4b06 ldr r3, [pc, #24] ; (80013a8 ) + 800138e: 781b ldrb r3, [r3, #0] + 8001390: 461a mov r2, r3 + 8001392: 4b06 ldr r3, [pc, #24] ; (80013ac ) + 8001394: 681b ldr r3, [r3, #0] + 8001396: 4413 add r3, r2 + 8001398: 4a04 ldr r2, [pc, #16] ; (80013ac ) + 800139a: 6013 str r3, [r2, #0] } - 800131c: bf00 nop - 800131e: 46bd mov sp, r7 - 8001320: f85d 7b04 ldr.w r7, [sp], #4 - 8001324: 4770 bx lr - 8001326: bf00 nop - 8001328: 200006c0 .word 0x200006c0 - 800132c: 20001058 .word 0x20001058 + 800139c: bf00 nop + 800139e: 46bd mov sp, r7 + 80013a0: f85d 7b04 ldr.w r7, [sp], #4 + 80013a4: 4770 bx lr + 80013a6: bf00 nop + 80013a8: 200006c0 .word 0x200006c0 + 80013ac: 200010a0 .word 0x200010a0 -08001330 : +080013b0 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8001330: b480 push {r7} - 8001332: af00 add r7, sp, #0 + 80013b0: b480 push {r7} + 80013b2: af00 add r7, sp, #0 return uwTick; - 8001334: 4b03 ldr r3, [pc, #12] ; (8001344 ) - 8001336: 681b ldr r3, [r3, #0] + 80013b4: 4b03 ldr r3, [pc, #12] ; (80013c4 ) + 80013b6: 681b ldr r3, [r3, #0] } - 8001338: 4618 mov r0, r3 - 800133a: 46bd mov sp, r7 - 800133c: f85d 7b04 ldr.w r7, [sp], #4 - 8001340: 4770 bx lr - 8001342: bf00 nop - 8001344: 20001058 .word 0x20001058 + 80013b8: 4618 mov r0, r3 + 80013ba: 46bd mov sp, r7 + 80013bc: f85d 7b04 ldr.w r7, [sp], #4 + 80013c0: 4770 bx lr + 80013c2: bf00 nop + 80013c4: 200010a0 .word 0x200010a0 -08001348 : +080013c8 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 8001348: b580 push {r7, lr} - 800134a: b084 sub sp, #16 - 800134c: af00 add r7, sp, #0 - 800134e: 6078 str r0, [r7, #4] + 80013c8: b580 push {r7, lr} + 80013ca: b084 sub sp, #16 + 80013cc: af00 add r7, sp, #0 + 80013ce: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8001350: f7ff ffee bl 8001330 - 8001354: 60b8 str r0, [r7, #8] + 80013d0: f7ff ffee bl 80013b0 + 80013d4: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 8001356: 687b ldr r3, [r7, #4] - 8001358: 60fb str r3, [r7, #12] + 80013d6: 687b ldr r3, [r7, #4] + 80013d8: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 800135a: 68fb ldr r3, [r7, #12] - 800135c: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff - 8001360: d005 beq.n 800136e + 80013da: 68fb ldr r3, [r7, #12] + 80013dc: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff + 80013e0: d005 beq.n 80013ee { wait += (uint32_t)(uwTickFreq); - 8001362: 4b0a ldr r3, [pc, #40] ; (800138c ) - 8001364: 781b ldrb r3, [r3, #0] - 8001366: 461a mov r2, r3 - 8001368: 68fb ldr r3, [r7, #12] - 800136a: 4413 add r3, r2 - 800136c: 60fb str r3, [r7, #12] + 80013e2: 4b0a ldr r3, [pc, #40] ; (800140c ) + 80013e4: 781b ldrb r3, [r3, #0] + 80013e6: 461a mov r2, r3 + 80013e8: 68fb ldr r3, [r7, #12] + 80013ea: 4413 add r3, r2 + 80013ec: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) - 800136e: bf00 nop - 8001370: f7ff ffde bl 8001330 - 8001374: 4602 mov r2, r0 - 8001376: 68bb ldr r3, [r7, #8] - 8001378: 1ad3 subs r3, r2, r3 - 800137a: 68fa ldr r2, [r7, #12] - 800137c: 429a cmp r2, r3 - 800137e: d8f7 bhi.n 8001370 + 80013ee: bf00 nop + 80013f0: f7ff ffde bl 80013b0 + 80013f4: 4602 mov r2, r0 + 80013f6: 68bb ldr r3, [r7, #8] + 80013f8: 1ad3 subs r3, r2, r3 + 80013fa: 68fa ldr r2, [r7, #12] + 80013fc: 429a cmp r2, r3 + 80013fe: d8f7 bhi.n 80013f0 { } } - 8001380: bf00 nop - 8001382: bf00 nop - 8001384: 3710 adds r7, #16 - 8001386: 46bd mov sp, r7 - 8001388: bd80 pop {r7, pc} - 800138a: bf00 nop - 800138c: 200006c0 .word 0x200006c0 + 8001400: bf00 nop + 8001402: bf00 nop + 8001404: 3710 adds r7, #16 + 8001406: 46bd mov sp, r7 + 8001408: bd80 pop {r7, pc} + 800140a: bf00 nop + 800140c: 200006c0 .word 0x200006c0 -08001390 <__NVIC_SetPriorityGrouping>: +08001410 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8001390: b480 push {r7} - 8001392: b085 sub sp, #20 - 8001394: af00 add r7, sp, #0 - 8001396: 6078 str r0, [r7, #4] + 8001410: b480 push {r7} + 8001412: b085 sub sp, #20 + 8001414: af00 add r7, sp, #0 + 8001416: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8001398: 687b ldr r3, [r7, #4] - 800139a: f003 0307 and.w r3, r3, #7 - 800139e: 60fb str r3, [r7, #12] + 8001418: 687b ldr r3, [r7, #4] + 800141a: f003 0307 and.w r3, r3, #7 + 800141e: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 80013a0: 4b0c ldr r3, [pc, #48] ; (80013d4 <__NVIC_SetPriorityGrouping+0x44>) - 80013a2: 68db ldr r3, [r3, #12] - 80013a4: 60bb str r3, [r7, #8] + 8001420: 4b0c ldr r3, [pc, #48] ; (8001454 <__NVIC_SetPriorityGrouping+0x44>) + 8001422: 68db ldr r3, [r3, #12] + 8001424: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 80013a6: 68ba ldr r2, [r7, #8] - 80013a8: f64f 03ff movw r3, #63743 ; 0xf8ff - 80013ac: 4013 ands r3, r2 - 80013ae: 60bb str r3, [r7, #8] + 8001426: 68ba ldr r2, [r7, #8] + 8001428: f64f 03ff movw r3, #63743 ; 0xf8ff + 800142c: 4013 ands r3, r2 + 800142e: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 80013b0: 68fb ldr r3, [r7, #12] - 80013b2: 021a lsls r2, r3, #8 + 8001430: 68fb ldr r3, [r7, #12] + 8001432: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 80013b4: 68bb ldr r3, [r7, #8] - 80013b6: 4313 orrs r3, r2 + 8001434: 68bb ldr r3, [r7, #8] + 8001436: 4313 orrs r3, r2 reg_value = (reg_value | - 80013b8: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 - 80013bc: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80013c0: 60bb str r3, [r7, #8] + 8001438: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 + 800143c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8001440: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 80013c2: 4a04 ldr r2, [pc, #16] ; (80013d4 <__NVIC_SetPriorityGrouping+0x44>) - 80013c4: 68bb ldr r3, [r7, #8] - 80013c6: 60d3 str r3, [r2, #12] + 8001442: 4a04 ldr r2, [pc, #16] ; (8001454 <__NVIC_SetPriorityGrouping+0x44>) + 8001444: 68bb ldr r3, [r7, #8] + 8001446: 60d3 str r3, [r2, #12] } - 80013c8: bf00 nop - 80013ca: 3714 adds r7, #20 - 80013cc: 46bd mov sp, r7 - 80013ce: f85d 7b04 ldr.w r7, [sp], #4 - 80013d2: 4770 bx lr - 80013d4: e000ed00 .word 0xe000ed00 + 8001448: bf00 nop + 800144a: 3714 adds r7, #20 + 800144c: 46bd mov sp, r7 + 800144e: f85d 7b04 ldr.w r7, [sp], #4 + 8001452: 4770 bx lr + 8001454: e000ed00 .word 0xe000ed00 -080013d8 <__NVIC_GetPriorityGrouping>: +08001458 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 80013d8: b480 push {r7} - 80013da: af00 add r7, sp, #0 + 8001458: b480 push {r7} + 800145a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 80013dc: 4b04 ldr r3, [pc, #16] ; (80013f0 <__NVIC_GetPriorityGrouping+0x18>) - 80013de: 68db ldr r3, [r3, #12] - 80013e0: 0a1b lsrs r3, r3, #8 - 80013e2: f003 0307 and.w r3, r3, #7 + 800145c: 4b04 ldr r3, [pc, #16] ; (8001470 <__NVIC_GetPriorityGrouping+0x18>) + 800145e: 68db ldr r3, [r3, #12] + 8001460: 0a1b lsrs r3, r3, #8 + 8001462: f003 0307 and.w r3, r3, #7 } - 80013e6: 4618 mov r0, r3 - 80013e8: 46bd mov sp, r7 - 80013ea: f85d 7b04 ldr.w r7, [sp], #4 - 80013ee: 4770 bx lr - 80013f0: e000ed00 .word 0xe000ed00 + 8001466: 4618 mov r0, r3 + 8001468: 46bd mov sp, r7 + 800146a: f85d 7b04 ldr.w r7, [sp], #4 + 800146e: 4770 bx lr + 8001470: e000ed00 .word 0xe000ed00 -080013f4 <__NVIC_EnableIRQ>: - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 80013f4: b480 push {r7} - 80013f6: b083 sub sp, #12 - 80013f8: af00 add r7, sp, #0 - 80013fa: 4603 mov r3, r0 - 80013fc: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 80013fe: f997 3007 ldrsb.w r3, [r7, #7] - 8001402: 2b00 cmp r3, #0 - 8001404: db0b blt.n 800141e <__NVIC_EnableIRQ+0x2a> - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8001406: 79fb ldrb r3, [r7, #7] - 8001408: f003 021f and.w r2, r3, #31 - 800140c: 4907 ldr r1, [pc, #28] ; (800142c <__NVIC_EnableIRQ+0x38>) - 800140e: f997 3007 ldrsb.w r3, [r7, #7] - 8001412: 095b lsrs r3, r3, #5 - 8001414: 2001 movs r0, #1 - 8001416: fa00 f202 lsl.w r2, r0, r2 - 800141a: f841 2023 str.w r2, [r1, r3, lsl #2] - __COMPILER_BARRIER(); - } -} - 800141e: bf00 nop - 8001420: 370c adds r7, #12 - 8001422: 46bd mov sp, r7 - 8001424: f85d 7b04 ldr.w r7, [sp], #4 - 8001428: 4770 bx lr - 800142a: bf00 nop - 800142c: e000e100 .word 0xe000e100 - -08001430 <__NVIC_SetPriority>: +08001474 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8001430: b480 push {r7} - 8001432: b083 sub sp, #12 - 8001434: af00 add r7, sp, #0 - 8001436: 4603 mov r3, r0 - 8001438: 6039 str r1, [r7, #0] - 800143a: 71fb strb r3, [r7, #7] + 8001474: b480 push {r7} + 8001476: b083 sub sp, #12 + 8001478: af00 add r7, sp, #0 + 800147a: 4603 mov r3, r0 + 800147c: 6039 str r1, [r7, #0] + 800147e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 800143c: f997 3007 ldrsb.w r3, [r7, #7] - 8001440: 2b00 cmp r3, #0 - 8001442: db0a blt.n 800145a <__NVIC_SetPriority+0x2a> + 8001480: f997 3007 ldrsb.w r3, [r7, #7] + 8001484: 2b00 cmp r3, #0 + 8001486: db0a blt.n 800149e <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8001444: 683b ldr r3, [r7, #0] - 8001446: b2da uxtb r2, r3 - 8001448: 490c ldr r1, [pc, #48] ; (800147c <__NVIC_SetPriority+0x4c>) - 800144a: f997 3007 ldrsb.w r3, [r7, #7] - 800144e: 0112 lsls r2, r2, #4 - 8001450: b2d2 uxtb r2, r2 - 8001452: 440b add r3, r1 - 8001454: f883 2300 strb.w r2, [r3, #768] ; 0x300 + 8001488: 683b ldr r3, [r7, #0] + 800148a: b2da uxtb r2, r3 + 800148c: 490c ldr r1, [pc, #48] ; (80014c0 <__NVIC_SetPriority+0x4c>) + 800148e: f997 3007 ldrsb.w r3, [r7, #7] + 8001492: 0112 lsls r2, r2, #4 + 8001494: b2d2 uxtb r2, r2 + 8001496: 440b add r3, r1 + 8001498: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8001458: e00a b.n 8001470 <__NVIC_SetPriority+0x40> + 800149c: e00a b.n 80014b4 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 800145a: 683b ldr r3, [r7, #0] - 800145c: b2da uxtb r2, r3 - 800145e: 4908 ldr r1, [pc, #32] ; (8001480 <__NVIC_SetPriority+0x50>) - 8001460: 79fb ldrb r3, [r7, #7] - 8001462: f003 030f and.w r3, r3, #15 - 8001466: 3b04 subs r3, #4 - 8001468: 0112 lsls r2, r2, #4 - 800146a: b2d2 uxtb r2, r2 - 800146c: 440b add r3, r1 - 800146e: 761a strb r2, [r3, #24] + 800149e: 683b ldr r3, [r7, #0] + 80014a0: b2da uxtb r2, r3 + 80014a2: 4908 ldr r1, [pc, #32] ; (80014c4 <__NVIC_SetPriority+0x50>) + 80014a4: 79fb ldrb r3, [r7, #7] + 80014a6: f003 030f and.w r3, r3, #15 + 80014aa: 3b04 subs r3, #4 + 80014ac: 0112 lsls r2, r2, #4 + 80014ae: b2d2 uxtb r2, r2 + 80014b0: 440b add r3, r1 + 80014b2: 761a strb r2, [r3, #24] } - 8001470: bf00 nop - 8001472: 370c adds r7, #12 - 8001474: 46bd mov sp, r7 - 8001476: f85d 7b04 ldr.w r7, [sp], #4 - 800147a: 4770 bx lr - 800147c: e000e100 .word 0xe000e100 - 8001480: e000ed00 .word 0xe000ed00 + 80014b4: bf00 nop + 80014b6: 370c adds r7, #12 + 80014b8: 46bd mov sp, r7 + 80014ba: f85d 7b04 ldr.w r7, [sp], #4 + 80014be: 4770 bx lr + 80014c0: e000e100 .word 0xe000e100 + 80014c4: e000ed00 .word 0xe000ed00 -08001484 : +080014c8 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8001484: b480 push {r7} - 8001486: b089 sub sp, #36 ; 0x24 - 8001488: af00 add r7, sp, #0 - 800148a: 60f8 str r0, [r7, #12] - 800148c: 60b9 str r1, [r7, #8] - 800148e: 607a str r2, [r7, #4] + 80014c8: b480 push {r7} + 80014ca: b089 sub sp, #36 ; 0x24 + 80014cc: af00 add r7, sp, #0 + 80014ce: 60f8 str r0, [r7, #12] + 80014d0: 60b9 str r1, [r7, #8] + 80014d2: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8001490: 68fb ldr r3, [r7, #12] - 8001492: f003 0307 and.w r3, r3, #7 - 8001496: 61fb str r3, [r7, #28] + 80014d4: 68fb ldr r3, [r7, #12] + 80014d6: f003 0307 and.w r3, r3, #7 + 80014da: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8001498: 69fb ldr r3, [r7, #28] - 800149a: f1c3 0307 rsb r3, r3, #7 - 800149e: 2b04 cmp r3, #4 - 80014a0: bf28 it cs - 80014a2: 2304 movcs r3, #4 - 80014a4: 61bb str r3, [r7, #24] + 80014dc: 69fb ldr r3, [r7, #28] + 80014de: f1c3 0307 rsb r3, r3, #7 + 80014e2: 2b04 cmp r3, #4 + 80014e4: bf28 it cs + 80014e6: 2304 movcs r3, #4 + 80014e8: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 80014a6: 69fb ldr r3, [r7, #28] - 80014a8: 3304 adds r3, #4 - 80014aa: 2b06 cmp r3, #6 - 80014ac: d902 bls.n 80014b4 - 80014ae: 69fb ldr r3, [r7, #28] - 80014b0: 3b03 subs r3, #3 - 80014b2: e000 b.n 80014b6 - 80014b4: 2300 movs r3, #0 - 80014b6: 617b str r3, [r7, #20] + 80014ea: 69fb ldr r3, [r7, #28] + 80014ec: 3304 adds r3, #4 + 80014ee: 2b06 cmp r3, #6 + 80014f0: d902 bls.n 80014f8 + 80014f2: 69fb ldr r3, [r7, #28] + 80014f4: 3b03 subs r3, #3 + 80014f6: e000 b.n 80014fa + 80014f8: 2300 movs r3, #0 + 80014fa: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 80014b8: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff - 80014bc: 69bb ldr r3, [r7, #24] - 80014be: fa02 f303 lsl.w r3, r2, r3 - 80014c2: 43da mvns r2, r3 - 80014c4: 68bb ldr r3, [r7, #8] - 80014c6: 401a ands r2, r3 - 80014c8: 697b ldr r3, [r7, #20] - 80014ca: 409a lsls r2, r3 + 80014fc: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff + 8001500: 69bb ldr r3, [r7, #24] + 8001502: fa02 f303 lsl.w r3, r2, r3 + 8001506: 43da mvns r2, r3 + 8001508: 68bb ldr r3, [r7, #8] + 800150a: 401a ands r2, r3 + 800150c: 697b ldr r3, [r7, #20] + 800150e: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 80014cc: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff - 80014d0: 697b ldr r3, [r7, #20] - 80014d2: fa01 f303 lsl.w r3, r1, r3 - 80014d6: 43d9 mvns r1, r3 - 80014d8: 687b ldr r3, [r7, #4] - 80014da: 400b ands r3, r1 + 8001510: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff + 8001514: 697b ldr r3, [r7, #20] + 8001516: fa01 f303 lsl.w r3, r1, r3 + 800151a: 43d9 mvns r1, r3 + 800151c: 687b ldr r3, [r7, #4] + 800151e: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 80014dc: 4313 orrs r3, r2 + 8001520: 4313 orrs r3, r2 ); } - 80014de: 4618 mov r0, r3 - 80014e0: 3724 adds r7, #36 ; 0x24 - 80014e2: 46bd mov sp, r7 - 80014e4: f85d 7b04 ldr.w r7, [sp], #4 - 80014e8: 4770 bx lr + 8001522: 4618 mov r0, r3 + 8001524: 3724 adds r7, #36 ; 0x24 + 8001526: 46bd mov sp, r7 + 8001528: f85d 7b04 ldr.w r7, [sp], #4 + 800152c: 4770 bx lr ... -080014ec : +08001530 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 80014ec: b580 push {r7, lr} - 80014ee: b082 sub sp, #8 - 80014f0: af00 add r7, sp, #0 - 80014f2: 6078 str r0, [r7, #4] + 8001530: b580 push {r7, lr} + 8001532: b082 sub sp, #8 + 8001534: af00 add r7, sp, #0 + 8001536: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 80014f4: 687b ldr r3, [r7, #4] - 80014f6: 3b01 subs r3, #1 - 80014f8: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 80014fc: d301 bcc.n 8001502 + 8001538: 687b ldr r3, [r7, #4] + 800153a: 3b01 subs r3, #1 + 800153c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8001540: d301 bcc.n 8001546 { return (1UL); /* Reload value impossible */ - 80014fe: 2301 movs r3, #1 - 8001500: e00f b.n 8001522 + 8001542: 2301 movs r3, #1 + 8001544: e00f b.n 8001566 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8001502: 4a0a ldr r2, [pc, #40] ; (800152c ) - 8001504: 687b ldr r3, [r7, #4] - 8001506: 3b01 subs r3, #1 - 8001508: 6053 str r3, [r2, #4] + 8001546: 4a0a ldr r2, [pc, #40] ; (8001570 ) + 8001548: 687b ldr r3, [r7, #4] + 800154a: 3b01 subs r3, #1 + 800154c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 800150a: 210f movs r1, #15 - 800150c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 8001510: f7ff ff8e bl 8001430 <__NVIC_SetPriority> + 800154e: 210f movs r1, #15 + 8001550: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8001554: f7ff ff8e bl 8001474 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8001514: 4b05 ldr r3, [pc, #20] ; (800152c ) - 8001516: 2200 movs r2, #0 - 8001518: 609a str r2, [r3, #8] + 8001558: 4b05 ldr r3, [pc, #20] ; (8001570 ) + 800155a: 2200 movs r2, #0 + 800155c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 800151a: 4b04 ldr r3, [pc, #16] ; (800152c ) - 800151c: 2207 movs r2, #7 - 800151e: 601a str r2, [r3, #0] + 800155e: 4b04 ldr r3, [pc, #16] ; (8001570 ) + 8001560: 2207 movs r2, #7 + 8001562: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8001520: 2300 movs r3, #0 + 8001564: 2300 movs r3, #0 } - 8001522: 4618 mov r0, r3 - 8001524: 3708 adds r7, #8 - 8001526: 46bd mov sp, r7 - 8001528: bd80 pop {r7, pc} - 800152a: bf00 nop - 800152c: e000e010 .word 0xe000e010 + 8001566: 4618 mov r0, r3 + 8001568: 3708 adds r7, #8 + 800156a: 46bd mov sp, r7 + 800156c: bd80 pop {r7, pc} + 800156e: bf00 nop + 8001570: e000e010 .word 0xe000e010 -08001530 : +08001574 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8001530: b580 push {r7, lr} - 8001532: b082 sub sp, #8 - 8001534: af00 add r7, sp, #0 - 8001536: 6078 str r0, [r7, #4] + 8001574: b580 push {r7, lr} + 8001576: b082 sub sp, #8 + 8001578: af00 add r7, sp, #0 + 800157a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8001538: 6878 ldr r0, [r7, #4] - 800153a: f7ff ff29 bl 8001390 <__NVIC_SetPriorityGrouping> + 800157c: 6878 ldr r0, [r7, #4] + 800157e: f7ff ff47 bl 8001410 <__NVIC_SetPriorityGrouping> } - 800153e: bf00 nop - 8001540: 3708 adds r7, #8 - 8001542: 46bd mov sp, r7 - 8001544: bd80 pop {r7, pc} + 8001582: bf00 nop + 8001584: 3708 adds r7, #8 + 8001586: 46bd mov sp, r7 + 8001588: bd80 pop {r7, pc} -08001546 : +0800158a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8001546: b580 push {r7, lr} - 8001548: b086 sub sp, #24 - 800154a: af00 add r7, sp, #0 - 800154c: 4603 mov r3, r0 - 800154e: 60b9 str r1, [r7, #8] - 8001550: 607a str r2, [r7, #4] - 8001552: 73fb strb r3, [r7, #15] + 800158a: b580 push {r7, lr} + 800158c: b086 sub sp, #24 + 800158e: af00 add r7, sp, #0 + 8001590: 4603 mov r3, r0 + 8001592: 60b9 str r1, [r7, #8] + 8001594: 607a str r2, [r7, #4] + 8001596: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8001554: 2300 movs r3, #0 - 8001556: 617b str r3, [r7, #20] + 8001598: 2300 movs r3, #0 + 800159a: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8001558: f7ff ff3e bl 80013d8 <__NVIC_GetPriorityGrouping> - 800155c: 6178 str r0, [r7, #20] + 800159c: f7ff ff5c bl 8001458 <__NVIC_GetPriorityGrouping> + 80015a0: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 800155e: 687a ldr r2, [r7, #4] - 8001560: 68b9 ldr r1, [r7, #8] - 8001562: 6978 ldr r0, [r7, #20] - 8001564: f7ff ff8e bl 8001484 - 8001568: 4602 mov r2, r0 - 800156a: f997 300f ldrsb.w r3, [r7, #15] - 800156e: 4611 mov r1, r2 - 8001570: 4618 mov r0, r3 - 8001572: f7ff ff5d bl 8001430 <__NVIC_SetPriority> + 80015a2: 687a ldr r2, [r7, #4] + 80015a4: 68b9 ldr r1, [r7, #8] + 80015a6: 6978 ldr r0, [r7, #20] + 80015a8: f7ff ff8e bl 80014c8 + 80015ac: 4602 mov r2, r0 + 80015ae: f997 300f ldrsb.w r3, [r7, #15] + 80015b2: 4611 mov r1, r2 + 80015b4: 4618 mov r0, r3 + 80015b6: f7ff ff5d bl 8001474 <__NVIC_SetPriority> } - 8001576: bf00 nop - 8001578: 3718 adds r7, #24 - 800157a: 46bd mov sp, r7 - 800157c: bd80 pop {r7, pc} + 80015ba: bf00 nop + 80015bc: 3718 adds r7, #24 + 80015be: 46bd mov sp, r7 + 80015c0: bd80 pop {r7, pc} -0800157e : - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h)) - * @retval None - */ -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 800157e: b580 push {r7, lr} - 8001580: b082 sub sp, #8 - 8001582: af00 add r7, sp, #0 - 8001584: 4603 mov r3, r0 - 8001586: 71fb strb r3, [r7, #7] - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Enable interrupt */ - NVIC_EnableIRQ(IRQn); - 8001588: f997 3007 ldrsb.w r3, [r7, #7] - 800158c: 4618 mov r0, r3 - 800158e: f7ff ff31 bl 80013f4 <__NVIC_EnableIRQ> -} - 8001592: bf00 nop - 8001594: 3708 adds r7, #8 - 8001596: 46bd mov sp, r7 - 8001598: bd80 pop {r7, pc} - -0800159a : +080015c2 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 800159a: b580 push {r7, lr} - 800159c: b082 sub sp, #8 - 800159e: af00 add r7, sp, #0 - 80015a0: 6078 str r0, [r7, #4] + 80015c2: b580 push {r7, lr} + 80015c4: b082 sub sp, #8 + 80015c6: af00 add r7, sp, #0 + 80015c8: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 80015a2: 6878 ldr r0, [r7, #4] - 80015a4: f7ff ffa2 bl 80014ec - 80015a8: 4603 mov r3, r0 + 80015ca: 6878 ldr r0, [r7, #4] + 80015cc: f7ff ffb0 bl 8001530 + 80015d0: 4603 mov r3, r0 } - 80015aa: 4618 mov r0, r3 - 80015ac: 3708 adds r7, #8 - 80015ae: 46bd mov sp, r7 - 80015b0: bd80 pop {r7, pc} - -080015b2 : - * and the Stream will be effectively disabled only after the transfer of - * this single data is finished. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) -{ - 80015b2: b580 push {r7, lr} - 80015b4: b084 sub sp, #16 - 80015b6: af00 add r7, sp, #0 - 80015b8: 6078 str r0, [r7, #4] - /* calculate DMA base and stream number */ - DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 80015ba: 687b ldr r3, [r7, #4] - 80015bc: 6d9b ldr r3, [r3, #88] ; 0x58 - 80015be: 60fb str r3, [r7, #12] - - uint32_t tickstart = HAL_GetTick(); - 80015c0: f7ff feb6 bl 8001330 - 80015c4: 60b8 str r0, [r7, #8] - - if(hdma->State != HAL_DMA_STATE_BUSY) - 80015c6: 687b ldr r3, [r7, #4] - 80015c8: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 80015cc: b2db uxtb r3, r3 - 80015ce: 2b02 cmp r3, #2 - 80015d0: d008 beq.n 80015e4 - { - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80015d2: 687b ldr r3, [r7, #4] - 80015d4: 2280 movs r2, #128 ; 0x80 - 80015d6: 655a str r2, [r3, #84] ; 0x54 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 80015d8: 687b ldr r3, [r7, #4] - 80015da: 2200 movs r2, #0 - 80015dc: f883 2034 strb.w r2, [r3, #52] ; 0x34 - - return HAL_ERROR; - 80015e0: 2301 movs r3, #1 - 80015e2: e052 b.n 800168a - } - else - { - /* Disable all the transfer interrupts */ - hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME); - 80015e4: 687b ldr r3, [r7, #4] - 80015e6: 681b ldr r3, [r3, #0] - 80015e8: 681a ldr r2, [r3, #0] - 80015ea: 687b ldr r3, [r7, #4] - 80015ec: 681b ldr r3, [r3, #0] - 80015ee: f022 0216 bic.w r2, r2, #22 - 80015f2: 601a str r2, [r3, #0] - hdma->Instance->FCR &= ~(DMA_IT_FE); - 80015f4: 687b ldr r3, [r7, #4] - 80015f6: 681b ldr r3, [r3, #0] - 80015f8: 695a ldr r2, [r3, #20] - 80015fa: 687b ldr r3, [r7, #4] - 80015fc: 681b ldr r3, [r3, #0] - 80015fe: f022 0280 bic.w r2, r2, #128 ; 0x80 - 8001602: 615a str r2, [r3, #20] - - if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) - 8001604: 687b ldr r3, [r7, #4] - 8001606: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001608: 2b00 cmp r3, #0 - 800160a: d103 bne.n 8001614 - 800160c: 687b ldr r3, [r7, #4] - 800160e: 6c9b ldr r3, [r3, #72] ; 0x48 - 8001610: 2b00 cmp r3, #0 - 8001612: d007 beq.n 8001624 - { - hdma->Instance->CR &= ~(DMA_IT_HT); - 8001614: 687b ldr r3, [r7, #4] - 8001616: 681b ldr r3, [r3, #0] - 8001618: 681a ldr r2, [r3, #0] - 800161a: 687b ldr r3, [r7, #4] - 800161c: 681b ldr r3, [r3, #0] - 800161e: f022 0208 bic.w r2, r2, #8 - 8001622: 601a str r2, [r3, #0] - } - - /* Disable the stream */ - __HAL_DMA_DISABLE(hdma); - 8001624: 687b ldr r3, [r7, #4] - 8001626: 681b ldr r3, [r3, #0] - 8001628: 681a ldr r2, [r3, #0] - 800162a: 687b ldr r3, [r7, #4] - 800162c: 681b ldr r3, [r3, #0] - 800162e: f022 0201 bic.w r2, r2, #1 - 8001632: 601a str r2, [r3, #0] - - /* Check if the DMA Stream is effectively disabled */ - while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) - 8001634: e013 b.n 800165e - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) - 8001636: f7ff fe7b bl 8001330 - 800163a: 4602 mov r2, r0 - 800163c: 68bb ldr r3, [r7, #8] - 800163e: 1ad3 subs r3, r2, r3 - 8001640: 2b05 cmp r3, #5 - 8001642: d90c bls.n 800165e - { - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - 8001644: 687b ldr r3, [r7, #4] - 8001646: 2220 movs r2, #32 - 8001648: 655a str r2, [r3, #84] ; 0x54 - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_TIMEOUT; - 800164a: 687b ldr r3, [r7, #4] - 800164c: 2203 movs r2, #3 - 800164e: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8001652: 687b ldr r3, [r7, #4] - 8001654: 2200 movs r2, #0 - 8001656: f883 2034 strb.w r2, [r3, #52] ; 0x34 - - return HAL_TIMEOUT; - 800165a: 2303 movs r3, #3 - 800165c: e015 b.n 800168a - while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) - 800165e: 687b ldr r3, [r7, #4] - 8001660: 681b ldr r3, [r3, #0] - 8001662: 681b ldr r3, [r3, #0] - 8001664: f003 0301 and.w r3, r3, #1 - 8001668: 2b00 cmp r3, #0 - 800166a: d1e4 bne.n 8001636 - } - } - - /* Clear all interrupt flags at correct offset within the register */ - regs->IFCR = 0x3FU << hdma->StreamIndex; - 800166c: 687b ldr r3, [r7, #4] - 800166e: 6ddb ldr r3, [r3, #92] ; 0x5c - 8001670: 223f movs r2, #63 ; 0x3f - 8001672: 409a lsls r2, r3 - 8001674: 68fb ldr r3, [r7, #12] - 8001676: 609a str r2, [r3, #8] - - /* Change the DMA state*/ - hdma->State = HAL_DMA_STATE_READY; - 8001678: 687b ldr r3, [r7, #4] - 800167a: 2201 movs r2, #1 - 800167c: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8001680: 687b ldr r3, [r7, #4] - 8001682: 2200 movs r2, #0 - 8001684: f883 2034 strb.w r2, [r3, #52] ; 0x34 - } - return HAL_OK; - 8001688: 2300 movs r3, #0 -} - 800168a: 4618 mov r0, r3 - 800168c: 3710 adds r7, #16 - 800168e: 46bd mov sp, r7 - 8001690: bd80 pop {r7, pc} - -08001692 : - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) -{ - 8001692: b480 push {r7} - 8001694: b083 sub sp, #12 - 8001696: af00 add r7, sp, #0 - 8001698: 6078 str r0, [r7, #4] - if(hdma->State != HAL_DMA_STATE_BUSY) - 800169a: 687b ldr r3, [r7, #4] - 800169c: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 80016a0: b2db uxtb r3, r3 - 80016a2: 2b02 cmp r3, #2 - 80016a4: d004 beq.n 80016b0 - { - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80016a6: 687b ldr r3, [r7, #4] - 80016a8: 2280 movs r2, #128 ; 0x80 - 80016aa: 655a str r2, [r3, #84] ; 0x54 - return HAL_ERROR; - 80016ac: 2301 movs r3, #1 - 80016ae: e00c b.n 80016ca - } - else - { - /* Set Abort State */ - hdma->State = HAL_DMA_STATE_ABORT; - 80016b0: 687b ldr r3, [r7, #4] - 80016b2: 2205 movs r2, #5 - 80016b4: f883 2035 strb.w r2, [r3, #53] ; 0x35 - - /* Disable the stream */ - __HAL_DMA_DISABLE(hdma); - 80016b8: 687b ldr r3, [r7, #4] - 80016ba: 681b ldr r3, [r3, #0] - 80016bc: 681a ldr r2, [r3, #0] - 80016be: 687b ldr r3, [r7, #4] - 80016c0: 681b ldr r3, [r3, #0] - 80016c2: f022 0201 bic.w r2, r2, #1 - 80016c6: 601a str r2, [r3, #0] - } - - return HAL_OK; - 80016c8: 2300 movs r3, #0 -} - 80016ca: 4618 mov r0, r3 - 80016cc: 370c adds r7, #12 - 80016ce: 46bd mov sp, r7 - 80016d0: f85d 7b04 ldr.w r7, [sp], #4 - 80016d4: 4770 bx lr + 80015d2: 4618 mov r0, r3 + 80015d4: 3708 adds r7, #8 + 80015d6: 46bd mov sp, r7 + 80015d8: bd80 pop {r7, pc} ... -080016d8 : +080015dc : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) { - 80016d8: b580 push {r7, lr} - 80016da: b084 sub sp, #16 - 80016dc: af00 add r7, sp, #0 - 80016de: 6078 str r0, [r7, #4] + 80015dc: b580 push {r7, lr} + 80015de: b084 sub sp, #16 + 80015e0: af00 add r7, sp, #0 + 80015e2: 6078 str r0, [r7, #4] uint32_t tickstart; if (heth == NULL) - 80016e0: 687b ldr r3, [r7, #4] - 80016e2: 2b00 cmp r3, #0 - 80016e4: d101 bne.n 80016ea + 80015e4: 687b ldr r3, [r7, #4] + 80015e6: 2b00 cmp r3, #0 + 80015e8: d101 bne.n 80015ee { return HAL_ERROR; - 80016e6: 2301 movs r3, #1 - 80016e8: e08a b.n 8001800 + 80015ea: 2301 movs r3, #1 + 80015ec: e08a b.n 8001704 } if (heth->gState == HAL_ETH_STATE_RESET) - 80016ea: 687b ldr r3, [r7, #4] - 80016ec: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 80016f0: 2b00 cmp r3, #0 - 80016f2: d106 bne.n 8001702 + 80015ee: 687b ldr r3, [r7, #4] + 80015f0: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 80015f4: 2b00 cmp r3, #0 + 80015f6: d106 bne.n 8001606 { heth->gState = HAL_ETH_STATE_BUSY; - 80016f4: 687b ldr r3, [r7, #4] - 80016f6: 2220 movs r2, #32 - 80016f8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80015f8: 687b ldr r3, [r7, #4] + 80015fa: 2220 movs r2, #32 + 80015fc: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Init the low level hardware */ heth->MspInitCallback(heth); #else /* Init the low level hardware : GPIO, CLOCK, NVIC. */ HAL_ETH_MspInit(heth); - 80016fc: 6878 ldr r0, [r7, #4] - 80016fe: f7ff fbaf bl 8000e60 + 8001600: 6878 ldr r0, [r7, #4] + 8001602: f7ff fc47 bl 8000e94 #endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */ } __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8001702: 2300 movs r3, #0 - 8001704: 60bb str r3, [r7, #8] - 8001706: 4b40 ldr r3, [pc, #256] ; (8001808 ) - 8001708: 6c5b ldr r3, [r3, #68] ; 0x44 - 800170a: 4a3f ldr r2, [pc, #252] ; (8001808 ) - 800170c: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8001710: 6453 str r3, [r2, #68] ; 0x44 - 8001712: 4b3d ldr r3, [pc, #244] ; (8001808 ) - 8001714: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001716: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 800171a: 60bb str r3, [r7, #8] - 800171c: 68bb ldr r3, [r7, #8] + 8001606: 2300 movs r3, #0 + 8001608: 60bb str r3, [r7, #8] + 800160a: 4b40 ldr r3, [pc, #256] ; (800170c ) + 800160c: 6c5b ldr r3, [r3, #68] ; 0x44 + 800160e: 4a3f ldr r2, [pc, #252] ; (800170c ) + 8001610: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8001614: 6453 str r3, [r2, #68] ; 0x44 + 8001616: 4b3d ldr r3, [pc, #244] ; (800170c ) + 8001618: 6c5b ldr r3, [r3, #68] ; 0x44 + 800161a: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 800161e: 60bb str r3, [r7, #8] + 8001620: 68bb ldr r3, [r7, #8] /* Select MII or RMII Mode*/ SYSCFG->PMC &= ~(SYSCFG_PMC_MII_RMII_SEL); - 800171e: 4b3b ldr r3, [pc, #236] ; (800180c ) - 8001720: 685b ldr r3, [r3, #4] - 8001722: 4a3a ldr r2, [pc, #232] ; (800180c ) - 8001724: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 - 8001728: 6053 str r3, [r2, #4] + 8001622: 4b3b ldr r3, [pc, #236] ; (8001710 ) + 8001624: 685b ldr r3, [r3, #4] + 8001626: 4a3a ldr r2, [pc, #232] ; (8001710 ) + 8001628: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 + 800162c: 6053 str r3, [r2, #4] SYSCFG->PMC |= (uint32_t)heth->Init.MediaInterface; - 800172a: 4b38 ldr r3, [pc, #224] ; (800180c ) - 800172c: 685a ldr r2, [r3, #4] - 800172e: 687b ldr r3, [r7, #4] - 8001730: 689b ldr r3, [r3, #8] - 8001732: 4936 ldr r1, [pc, #216] ; (800180c ) - 8001734: 4313 orrs r3, r2 - 8001736: 604b str r3, [r1, #4] + 800162e: 4b38 ldr r3, [pc, #224] ; (8001710 ) + 8001630: 685a ldr r2, [r3, #4] + 8001632: 687b ldr r3, [r7, #4] + 8001634: 689b ldr r3, [r3, #8] + 8001636: 4936 ldr r1, [pc, #216] ; (8001710 ) + 8001638: 4313 orrs r3, r2 + 800163a: 604b str r3, [r1, #4] /* Dummy read to sync SYSCFG with ETH */ (void)SYSCFG->PMC; - 8001738: 4b34 ldr r3, [pc, #208] ; (800180c ) - 800173a: 685b ldr r3, [r3, #4] + 800163c: 4b34 ldr r3, [pc, #208] ; (8001710 ) + 800163e: 685b ldr r3, [r3, #4] /* Ethernet Software reset */ /* Set the SWR bit: resets all MAC subsystem internal registers and logic */ /* After reset all the registers holds their respective reset values */ SET_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR); - 800173c: 687b ldr r3, [r7, #4] - 800173e: 681b ldr r3, [r3, #0] - 8001740: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001744: 681b ldr r3, [r3, #0] - 8001746: 687a ldr r2, [r7, #4] - 8001748: 6812 ldr r2, [r2, #0] - 800174a: f043 0301 orr.w r3, r3, #1 - 800174e: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 8001752: 6013 str r3, [r2, #0] + 8001640: 687b ldr r3, [r7, #4] + 8001642: 681b ldr r3, [r3, #0] + 8001644: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 8001648: 681b ldr r3, [r3, #0] + 800164a: 687a ldr r2, [r7, #4] + 800164c: 6812 ldr r2, [r2, #0] + 800164e: f043 0301 orr.w r3, r3, #1 + 8001652: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 8001656: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); - 8001754: f7ff fdec bl 8001330 - 8001758: 60f8 str r0, [r7, #12] + 8001658: f7ff feaa bl 80013b0 + 800165c: 60f8 str r0, [r7, #12] /* Wait for software reset */ while (READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR) > 0U) - 800175a: e011 b.n 8001780 + 800165e: e011 b.n 8001684 { if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT)) - 800175c: f7ff fde8 bl 8001330 - 8001760: 4602 mov r2, r0 - 8001762: 68fb ldr r3, [r7, #12] - 8001764: 1ad3 subs r3, r2, r3 - 8001766: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 - 800176a: d909 bls.n 8001780 + 8001660: f7ff fea6 bl 80013b0 + 8001664: 4602 mov r2, r0 + 8001666: 68fb ldr r3, [r7, #12] + 8001668: 1ad3 subs r3, r2, r3 + 800166a: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 + 800166e: d909 bls.n 8001684 { /* Set Error Code */ heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT; - 800176c: 687b ldr r3, [r7, #4] - 800176e: 2204 movs r2, #4 - 8001770: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8001670: 687b ldr r3, [r7, #4] + 8001672: 2204 movs r2, #4 + 8001674: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Set State as Error */ heth->gState = HAL_ETH_STATE_ERROR; - 8001774: 687b ldr r3, [r7, #4] - 8001776: 22e0 movs r2, #224 ; 0xe0 - 8001778: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8001678: 687b ldr r3, [r7, #4] + 800167a: 22e0 movs r2, #224 ; 0xe0 + 800167c: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Return Error */ return HAL_ERROR; - 800177c: 2301 movs r3, #1 - 800177e: e03f b.n 8001800 + 8001680: 2301 movs r3, #1 + 8001682: e03f b.n 8001704 while (READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR) > 0U) - 8001780: 687b ldr r3, [r7, #4] - 8001782: 681b ldr r3, [r3, #0] - 8001784: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001788: 681b ldr r3, [r3, #0] - 800178a: f003 0301 and.w r3, r3, #1 - 800178e: 2b00 cmp r3, #0 - 8001790: d1e4 bne.n 800175c + 8001684: 687b ldr r3, [r7, #4] + 8001686: 681b ldr r3, [r3, #0] + 8001688: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 800168c: 681b ldr r3, [r3, #0] + 800168e: f003 0301 and.w r3, r3, #1 + 8001692: 2b00 cmp r3, #0 + 8001694: d1e4 bne.n 8001660 } } /*------------------ MAC, MTL and DMA default Configuration ----------------*/ ETH_MACDMAConfig(heth); - 8001792: 6878 ldr r0, [r7, #4] - 8001794: f000 f97a bl 8001a8c + 8001696: 6878 ldr r0, [r7, #4] + 8001698: f000 f97a bl 8001990 /*------------------ DMA Tx Descriptors Configuration ----------------------*/ ETH_DMATxDescListInit(heth); - 8001798: 6878 ldr r0, [r7, #4] - 800179a: f000 fa25 bl 8001be8 + 800169c: 6878 ldr r0, [r7, #4] + 800169e: f000 fa25 bl 8001aec /*------------------ DMA Rx Descriptors Configuration ----------------------*/ ETH_DMARxDescListInit(heth); - 800179e: 6878 ldr r0, [r7, #4] - 80017a0: f000 fa7b bl 8001c9a + 80016a2: 6878 ldr r0, [r7, #4] + 80016a4: f000 fa7b bl 8001b9e /*--------------------- ETHERNET MAC Address Configuration ------------------*/ ETH_MACAddressConfig(heth, ETH_MAC_ADDRESS0, heth->Init.MACAddr); - 80017a4: 687b ldr r3, [r7, #4] - 80017a6: 685b ldr r3, [r3, #4] - 80017a8: 461a mov r2, r3 - 80017aa: 2100 movs r1, #0 - 80017ac: 6878 ldr r0, [r7, #4] - 80017ae: f000 f9e3 bl 8001b78 + 80016a8: 687b ldr r3, [r7, #4] + 80016aa: 685b ldr r3, [r3, #4] + 80016ac: 461a mov r2, r3 + 80016ae: 2100 movs r1, #0 + 80016b0: 6878 ldr r0, [r7, #4] + 80016b2: f000 f9e3 bl 8001a7c /* Disable MMC Interrupts */ SET_BIT(heth->Instance->MACIMR, ETH_MACIMR_TSTIM | ETH_MACIMR_PMTIM); - 80017b2: 687b ldr r3, [r7, #4] - 80017b4: 681b ldr r3, [r3, #0] - 80017b6: 6bda ldr r2, [r3, #60] ; 0x3c - 80017b8: 687b ldr r3, [r7, #4] - 80017ba: 681b ldr r3, [r3, #0] - 80017bc: f442 7202 orr.w r2, r2, #520 ; 0x208 - 80017c0: 63da str r2, [r3, #60] ; 0x3c + 80016b6: 687b ldr r3, [r7, #4] + 80016b8: 681b ldr r3, [r3, #0] + 80016ba: 6bda ldr r2, [r3, #60] ; 0x3c + 80016bc: 687b ldr r3, [r7, #4] + 80016be: 681b ldr r3, [r3, #0] + 80016c0: f442 7202 orr.w r2, r2, #520 ; 0x208 + 80016c4: 63da str r2, [r3, #60] ; 0x3c /* Disable Rx MMC Interrupts */ SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RGUFM | ETH_MMCRIMR_RFAEM | \ - 80017c2: 687b ldr r3, [r7, #4] - 80017c4: 681b ldr r3, [r3, #0] - 80017c6: f8d3 310c ldr.w r3, [r3, #268] ; 0x10c - 80017ca: 687a ldr r2, [r7, #4] - 80017cc: 6812 ldr r2, [r2, #0] - 80017ce: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80017d2: f043 0360 orr.w r3, r3, #96 ; 0x60 - 80017d6: f8c2 310c str.w r3, [r2, #268] ; 0x10c + 80016c6: 687b ldr r3, [r7, #4] + 80016c8: 681b ldr r3, [r3, #0] + 80016ca: f8d3 310c ldr.w r3, [r3, #268] ; 0x10c + 80016ce: 687a ldr r2, [r7, #4] + 80016d0: 6812 ldr r2, [r2, #0] + 80016d2: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 80016d6: f043 0360 orr.w r3, r3, #96 ; 0x60 + 80016da: f8c2 310c str.w r3, [r2, #268] ; 0x10c ETH_MMCRIMR_RFCEM); /* Disable Tx MMC Interrupts */ SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TGFM | ETH_MMCTIMR_TGFMSCM | \ - 80017da: 687b ldr r3, [r7, #4] - 80017dc: 681b ldr r3, [r3, #0] - 80017de: f8d3 2110 ldr.w r2, [r3, #272] ; 0x110 - 80017e2: 687b ldr r3, [r7, #4] - 80017e4: 681b ldr r3, [r3, #0] - 80017e6: f442 1203 orr.w r2, r2, #2146304 ; 0x20c000 - 80017ea: f8c3 2110 str.w r2, [r3, #272] ; 0x110 + 80016de: 687b ldr r3, [r7, #4] + 80016e0: 681b ldr r3, [r3, #0] + 80016e2: f8d3 2110 ldr.w r2, [r3, #272] ; 0x110 + 80016e6: 687b ldr r3, [r7, #4] + 80016e8: 681b ldr r3, [r3, #0] + 80016ea: f442 1203 orr.w r2, r2, #2146304 ; 0x20c000 + 80016ee: f8c3 2110 str.w r2, [r3, #272] ; 0x110 ETH_MMCTIMR_TGFSCM); heth->ErrorCode = HAL_ETH_ERROR_NONE; - 80017ee: 687b ldr r3, [r7, #4] - 80017f0: 2200 movs r2, #0 - 80017f2: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 80016f2: 687b ldr r3, [r7, #4] + 80016f4: 2200 movs r2, #0 + 80016f6: f8c3 2088 str.w r2, [r3, #136] ; 0x88 heth->gState = HAL_ETH_STATE_READY; - 80017f6: 687b ldr r3, [r7, #4] - 80017f8: 2210 movs r2, #16 - 80017fa: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80016fa: 687b ldr r3, [r7, #4] + 80016fc: 2210 movs r2, #16 + 80016fe: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_OK; - 80017fe: 2300 movs r3, #0 + 8001702: 2300 movs r3, #0 } - 8001800: 4618 mov r0, r3 - 8001802: 3710 adds r7, #16 - 8001804: 46bd mov sp, r7 - 8001806: bd80 pop {r7, pc} - 8001808: 40023800 .word 0x40023800 - 800180c: 40013800 .word 0x40013800 + 8001704: 4618 mov r0, r3 + 8001706: 3710 adds r7, #16 + 8001708: 46bd mov sp, r7 + 800170a: bd80 pop {r7, pc} + 800170c: 40023800 .word 0x40023800 + 8001710: 40013800 .word 0x40013800 -08001810 : +08001714 : HAL_Delay(ETH_REG_WRITE_DELAY); (heth->Instance)->DMAOMR = tmpreg; } static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf) { - 8001810: b580 push {r7, lr} - 8001812: b084 sub sp, #16 - 8001814: af00 add r7, sp, #0 - 8001816: 6078 str r0, [r7, #4] - 8001818: 6039 str r1, [r7, #0] + 8001714: b580 push {r7, lr} + 8001716: b084 sub sp, #16 + 8001718: af00 add r7, sp, #0 + 800171a: 6078 str r0, [r7, #4] + 800171c: 6039 str r1, [r7, #0] uint32_t tmpreg1; /*------------------------ ETHERNET MACCR Configuration --------------------*/ /* Get the ETHERNET MACCR value */ tmpreg1 = (heth->Instance)->MACCR; - 800181a: 687b ldr r3, [r7, #4] - 800181c: 681b ldr r3, [r3, #0] - 800181e: 681b ldr r3, [r3, #0] - 8001820: 60fb str r3, [r7, #12] + 800171e: 687b ldr r3, [r7, #4] + 8001720: 681b ldr r3, [r3, #0] + 8001722: 681b ldr r3, [r3, #0] + 8001724: 60fb str r3, [r7, #12] /* Clear CSTF, WD, PCE, PS, TE and RE bits */ tmpreg1 &= ETH_MACCR_CLEAR_MASK; - 8001822: 68fa ldr r2, [r7, #12] - 8001824: 4b53 ldr r3, [pc, #332] ; (8001974 ) - 8001826: 4013 ands r3, r2 - 8001828: 60fb str r3, [r7, #12] + 8001726: 68fa ldr r2, [r7, #12] + 8001728: 4b53 ldr r3, [pc, #332] ; (8001878 ) + 800172a: 4013 ands r3, r2 + 800172c: 60fb str r3, [r7, #12] tmpreg1 |= (uint32_t)(((uint32_t)macconf->CRCStripTypePacket << 25U) | - 800182a: 683b ldr r3, [r7, #0] - 800182c: 7b9b ldrb r3, [r3, #14] - 800182e: 065b lsls r3, r3, #25 + 800172e: 683b ldr r3, [r7, #0] + 8001730: 7b9b ldrb r3, [r3, #14] + 8001732: 065b lsls r3, r3, #25 ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 23U) | - 8001830: 683a ldr r2, [r7, #0] - 8001832: 7c12 ldrb r2, [r2, #16] - 8001834: 2a00 cmp r2, #0 - 8001836: d102 bne.n 800183e - 8001838: f44f 0200 mov.w r2, #8388608 ; 0x800000 - 800183c: e000 b.n 8001840 - 800183e: 2200 movs r2, #0 + 8001734: 683a ldr r2, [r7, #0] + 8001736: 7c12 ldrb r2, [r2, #16] + 8001738: 2a00 cmp r2, #0 + 800173a: d102 bne.n 8001742 + 800173c: f44f 0200 mov.w r2, #8388608 ; 0x800000 + 8001740: e000 b.n 8001744 + 8001742: 2200 movs r2, #0 tmpreg1 |= (uint32_t)(((uint32_t)macconf->CRCStripTypePacket << 25U) | - 8001840: 4313 orrs r3, r2 + 8001744: 4313 orrs r3, r2 ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 22U) | - 8001842: 683a ldr r2, [r7, #0] - 8001844: 7c52 ldrb r2, [r2, #17] - 8001846: 2a00 cmp r2, #0 - 8001848: d102 bne.n 8001850 - 800184a: f44f 0280 mov.w r2, #4194304 ; 0x400000 - 800184e: e000 b.n 8001852 - 8001850: 2200 movs r2, #0 + 8001746: 683a ldr r2, [r7, #0] + 8001748: 7c52 ldrb r2, [r2, #17] + 800174a: 2a00 cmp r2, #0 + 800174c: d102 bne.n 8001754 + 800174e: f44f 0280 mov.w r2, #4194304 ; 0x400000 + 8001752: e000 b.n 8001756 + 8001754: 2200 movs r2, #0 ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 23U) | - 8001852: 431a orrs r2, r3 + 8001756: 431a orrs r2, r3 (uint32_t)macconf->InterPacketGapVal | - 8001854: 683b ldr r3, [r7, #0] - 8001856: 689b ldr r3, [r3, #8] + 8001758: 683b ldr r3, [r7, #0] + 800175a: 689b ldr r3, [r3, #8] ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 22U) | - 8001858: 431a orrs r2, r3 + 800175c: 431a orrs r2, r3 ((uint32_t)macconf->CarrierSenseDuringTransmit << 16U) | - 800185a: 683b ldr r3, [r7, #0] - 800185c: 7fdb ldrb r3, [r3, #31] - 800185e: 041b lsls r3, r3, #16 + 800175e: 683b ldr r3, [r7, #0] + 8001760: 7fdb ldrb r3, [r3, #31] + 8001762: 041b lsls r3, r3, #16 (uint32_t)macconf->InterPacketGapVal | - 8001860: 431a orrs r2, r3 + 8001764: 431a orrs r2, r3 macconf->Speed | - 8001862: 683b ldr r3, [r7, #0] - 8001864: 695b ldr r3, [r3, #20] + 8001766: 683b ldr r3, [r7, #0] + 8001768: 695b ldr r3, [r3, #20] ((uint32_t)macconf->CarrierSenseDuringTransmit << 16U) | - 8001866: 4313 orrs r3, r2 + 800176a: 4313 orrs r3, r2 ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 13U) | - 8001868: 683a ldr r2, [r7, #0] - 800186a: 7f92 ldrb r2, [r2, #30] - 800186c: 2a00 cmp r2, #0 - 800186e: d102 bne.n 8001876 - 8001870: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8001874: e000 b.n 8001878 - 8001876: 2200 movs r2, #0 + 800176c: 683a ldr r2, [r7, #0] + 800176e: 7f92 ldrb r2, [r2, #30] + 8001770: 2a00 cmp r2, #0 + 8001772: d102 bne.n 800177a + 8001774: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8001778: e000 b.n 800177c + 800177a: 2200 movs r2, #0 macconf->Speed | - 8001878: 431a orrs r2, r3 + 800177c: 431a orrs r2, r3 ((uint32_t)macconf->LoopbackMode << 12U) | - 800187a: 683b ldr r3, [r7, #0] - 800187c: 7f1b ldrb r3, [r3, #28] - 800187e: 031b lsls r3, r3, #12 + 800177e: 683b ldr r3, [r7, #0] + 8001780: 7f1b ldrb r3, [r3, #28] + 8001782: 031b lsls r3, r3, #12 ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 13U) | - 8001880: 431a orrs r2, r3 + 8001784: 431a orrs r2, r3 macconf->DuplexMode | - 8001882: 683b ldr r3, [r7, #0] - 8001884: 699b ldr r3, [r3, #24] + 8001786: 683b ldr r3, [r7, #0] + 8001788: 699b ldr r3, [r3, #24] ((uint32_t)macconf->LoopbackMode << 12U) | - 8001886: 431a orrs r2, r3 + 800178a: 431a orrs r2, r3 ((uint32_t)macconf->ChecksumOffload << 10U) | - 8001888: 683b ldr r3, [r7, #0] - 800188a: 791b ldrb r3, [r3, #4] - 800188c: 029b lsls r3, r3, #10 + 800178c: 683b ldr r3, [r7, #0] + 800178e: 791b ldrb r3, [r3, #4] + 8001790: 029b lsls r3, r3, #10 macconf->DuplexMode | - 800188e: 4313 orrs r3, r2 + 8001792: 4313 orrs r3, r2 ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 9U) | - 8001890: 683a ldr r2, [r7, #0] - 8001892: f892 2020 ldrb.w r2, [r2, #32] - 8001896: 2a00 cmp r2, #0 - 8001898: d102 bne.n 80018a0 - 800189a: f44f 7200 mov.w r2, #512 ; 0x200 - 800189e: e000 b.n 80018a2 - 80018a0: 2200 movs r2, #0 + 8001794: 683a ldr r2, [r7, #0] + 8001796: f892 2020 ldrb.w r2, [r2, #32] + 800179a: 2a00 cmp r2, #0 + 800179c: d102 bne.n 80017a4 + 800179e: f44f 7200 mov.w r2, #512 ; 0x200 + 80017a2: e000 b.n 80017a6 + 80017a4: 2200 movs r2, #0 ((uint32_t)macconf->ChecksumOffload << 10U) | - 80018a2: 431a orrs r2, r3 + 80017a6: 431a orrs r2, r3 ((uint32_t)macconf->AutomaticPadCRCStrip << 7U) | - 80018a4: 683b ldr r3, [r7, #0] - 80018a6: 7bdb ldrb r3, [r3, #15] - 80018a8: 01db lsls r3, r3, #7 + 80017a8: 683b ldr r3, [r7, #0] + 80017aa: 7bdb ldrb r3, [r3, #15] + 80017ac: 01db lsls r3, r3, #7 ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 9U) | - 80018aa: 431a orrs r2, r3 + 80017ae: 431a orrs r2, r3 macconf->BackOffLimit | - 80018ac: 683b ldr r3, [r7, #0] - 80018ae: 6a5b ldr r3, [r3, #36] ; 0x24 + 80017b0: 683b ldr r3, [r7, #0] + 80017b2: 6a5b ldr r3, [r3, #36] ; 0x24 ((uint32_t)macconf->AutomaticPadCRCStrip << 7U) | - 80018b0: 431a orrs r2, r3 + 80017b4: 431a orrs r2, r3 ((uint32_t)macconf->DeferralCheck << 4U)); - 80018b2: 683b ldr r3, [r7, #0] - 80018b4: f893 3028 ldrb.w r3, [r3, #40] ; 0x28 - 80018b8: 011b lsls r3, r3, #4 + 80017b6: 683b ldr r3, [r7, #0] + 80017b8: f893 3028 ldrb.w r3, [r3, #40] ; 0x28 + 80017bc: 011b lsls r3, r3, #4 tmpreg1 |= (uint32_t)(((uint32_t)macconf->CRCStripTypePacket << 25U) | - 80018ba: 4313 orrs r3, r2 - 80018bc: 68fa ldr r2, [r7, #12] - 80018be: 4313 orrs r3, r2 - 80018c0: 60fb str r3, [r7, #12] + 80017be: 4313 orrs r3, r2 + 80017c0: 68fa ldr r2, [r7, #12] + 80017c2: 4313 orrs r3, r2 + 80017c4: 60fb str r3, [r7, #12] /* Write to ETHERNET MACCR */ (heth->Instance)->MACCR = (uint32_t)tmpreg1; - 80018c2: 687b ldr r3, [r7, #4] - 80018c4: 681b ldr r3, [r3, #0] - 80018c6: 68fa ldr r2, [r7, #12] - 80018c8: 601a str r2, [r3, #0] + 80017c6: 687b ldr r3, [r7, #4] + 80017c8: 681b ldr r3, [r3, #0] + 80017ca: 68fa ldr r2, [r7, #12] + 80017cc: 601a str r2, [r3, #0] /* Wait until the write operation will be taken into account : at least four TX_CLK/RX_CLK clock cycles */ tmpreg1 = (heth->Instance)->MACCR; - 80018ca: 687b ldr r3, [r7, #4] - 80018cc: 681b ldr r3, [r3, #0] - 80018ce: 681b ldr r3, [r3, #0] - 80018d0: 60fb str r3, [r7, #12] + 80017ce: 687b ldr r3, [r7, #4] + 80017d0: 681b ldr r3, [r3, #0] + 80017d2: 681b ldr r3, [r3, #0] + 80017d4: 60fb str r3, [r7, #12] HAL_Delay(ETH_REG_WRITE_DELAY); - 80018d2: 2001 movs r0, #1 - 80018d4: f7ff fd38 bl 8001348 + 80017d6: 2001 movs r0, #1 + 80017d8: f7ff fdf6 bl 80013c8 (heth->Instance)->MACCR = tmpreg1; - 80018d8: 687b ldr r3, [r7, #4] - 80018da: 681b ldr r3, [r3, #0] - 80018dc: 68fa ldr r2, [r7, #12] - 80018de: 601a str r2, [r3, #0] + 80017dc: 687b ldr r3, [r7, #4] + 80017de: 681b ldr r3, [r3, #0] + 80017e0: 68fa ldr r2, [r7, #12] + 80017e2: 601a str r2, [r3, #0] /*----------------------- ETHERNET MACFCR Configuration --------------------*/ /* Get the ETHERNET MACFCR value */ tmpreg1 = (heth->Instance)->MACFCR; - 80018e0: 687b ldr r3, [r7, #4] - 80018e2: 681b ldr r3, [r3, #0] - 80018e4: 699b ldr r3, [r3, #24] - 80018e6: 60fb str r3, [r7, #12] + 80017e4: 687b ldr r3, [r7, #4] + 80017e6: 681b ldr r3, [r3, #0] + 80017e8: 699b ldr r3, [r3, #24] + 80017ea: 60fb str r3, [r7, #12] /* Clear xx bits */ tmpreg1 &= ETH_MACFCR_CLEAR_MASK; - 80018e8: 68fa ldr r2, [r7, #12] - 80018ea: f64f 7341 movw r3, #65345 ; 0xff41 - 80018ee: 4013 ands r3, r2 - 80018f0: 60fb str r3, [r7, #12] + 80017ec: 68fa ldr r2, [r7, #12] + 80017ee: f64f 7341 movw r3, #65345 ; 0xff41 + 80017f2: 4013 ands r3, r2 + 80017f4: 60fb str r3, [r7, #12] tmpreg1 |= (uint32_t)((macconf->PauseTime << 16U) | - 80018f2: 683b ldr r3, [r7, #0] - 80018f4: 6c9b ldr r3, [r3, #72] ; 0x48 - 80018f6: 041b lsls r3, r3, #16 + 80017f6: 683b ldr r3, [r7, #0] + 80017f8: 6c9b ldr r3, [r3, #72] ; 0x48 + 80017fa: 041b lsls r3, r3, #16 ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7U) | - 80018f8: 683a ldr r2, [r7, #0] - 80018fa: f892 204c ldrb.w r2, [r2, #76] ; 0x4c - 80018fe: 2a00 cmp r2, #0 - 8001900: d101 bne.n 8001906 - 8001902: 2280 movs r2, #128 ; 0x80 - 8001904: e000 b.n 8001908 - 8001906: 2200 movs r2, #0 + 80017fc: 683a ldr r2, [r7, #0] + 80017fe: f892 204c ldrb.w r2, [r2, #76] ; 0x4c + 8001802: 2a00 cmp r2, #0 + 8001804: d101 bne.n 800180a + 8001806: 2280 movs r2, #128 ; 0x80 + 8001808: e000 b.n 800180c + 800180a: 2200 movs r2, #0 tmpreg1 |= (uint32_t)((macconf->PauseTime << 16U) | - 8001908: 431a orrs r2, r3 + 800180c: 431a orrs r2, r3 macconf->PauseLowThreshold | - 800190a: 683b ldr r3, [r7, #0] - 800190c: 6d1b ldr r3, [r3, #80] ; 0x50 + 800180e: 683b ldr r3, [r7, #0] + 8001810: 6d1b ldr r3, [r3, #80] ; 0x50 ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7U) | - 800190e: 4313 orrs r3, r2 + 8001812: 4313 orrs r3, r2 ((uint32_t)((macconf->UnicastPausePacketDetect == ENABLE) ? 1U : 0U) << 3U) | - 8001910: 683a ldr r2, [r7, #0] - 8001912: f892 2055 ldrb.w r2, [r2, #85] ; 0x55 - 8001916: 2a01 cmp r2, #1 - 8001918: d101 bne.n 800191e - 800191a: 2208 movs r2, #8 - 800191c: e000 b.n 8001920 - 800191e: 2200 movs r2, #0 + 8001814: 683a ldr r2, [r7, #0] + 8001816: f892 2055 ldrb.w r2, [r2, #85] ; 0x55 + 800181a: 2a01 cmp r2, #1 + 800181c: d101 bne.n 8001822 + 800181e: 2208 movs r2, #8 + 8001820: e000 b.n 8001824 + 8001822: 2200 movs r2, #0 macconf->PauseLowThreshold | - 8001920: 4313 orrs r3, r2 + 8001824: 4313 orrs r3, r2 ((uint32_t)((macconf->ReceiveFlowControl == ENABLE) ? 1U : 0U) << 2U) | - 8001922: 683a ldr r2, [r7, #0] - 8001924: f892 2056 ldrb.w r2, [r2, #86] ; 0x56 - 8001928: 2a01 cmp r2, #1 - 800192a: d101 bne.n 8001930 - 800192c: 2204 movs r2, #4 - 800192e: e000 b.n 8001932 - 8001930: 2200 movs r2, #0 + 8001826: 683a ldr r2, [r7, #0] + 8001828: f892 2056 ldrb.w r2, [r2, #86] ; 0x56 + 800182c: 2a01 cmp r2, #1 + 800182e: d101 bne.n 8001834 + 8001830: 2204 movs r2, #4 + 8001832: e000 b.n 8001836 + 8001834: 2200 movs r2, #0 ((uint32_t)((macconf->UnicastPausePacketDetect == ENABLE) ? 1U : 0U) << 3U) | - 8001932: 4313 orrs r3, r2 + 8001836: 4313 orrs r3, r2 ((uint32_t)((macconf->TransmitFlowControl == ENABLE) ? 1U : 0U) << 1U)); - 8001934: 683a ldr r2, [r7, #0] - 8001936: f892 2054 ldrb.w r2, [r2, #84] ; 0x54 - 800193a: 2a01 cmp r2, #1 - 800193c: d101 bne.n 8001942 - 800193e: 2202 movs r2, #2 - 8001940: e000 b.n 8001944 - 8001942: 2200 movs r2, #0 + 8001838: 683a ldr r2, [r7, #0] + 800183a: f892 2054 ldrb.w r2, [r2, #84] ; 0x54 + 800183e: 2a01 cmp r2, #1 + 8001840: d101 bne.n 8001846 + 8001842: 2202 movs r2, #2 + 8001844: e000 b.n 8001848 + 8001846: 2200 movs r2, #0 tmpreg1 |= (uint32_t)((macconf->PauseTime << 16U) | - 8001944: 4313 orrs r3, r2 - 8001946: 68fa ldr r2, [r7, #12] - 8001948: 4313 orrs r3, r2 - 800194a: 60fb str r3, [r7, #12] + 8001848: 4313 orrs r3, r2 + 800184a: 68fa ldr r2, [r7, #12] + 800184c: 4313 orrs r3, r2 + 800184e: 60fb str r3, [r7, #12] /* Write to ETHERNET MACFCR */ (heth->Instance)->MACFCR = (uint32_t)tmpreg1; - 800194c: 687b ldr r3, [r7, #4] - 800194e: 681b ldr r3, [r3, #0] - 8001950: 68fa ldr r2, [r7, #12] - 8001952: 619a str r2, [r3, #24] + 8001850: 687b ldr r3, [r7, #4] + 8001852: 681b ldr r3, [r3, #0] + 8001854: 68fa ldr r2, [r7, #12] + 8001856: 619a str r2, [r3, #24] /* Wait until the write operation will be taken into account : at least four TX_CLK/RX_CLK clock cycles */ tmpreg1 = (heth->Instance)->MACFCR; - 8001954: 687b ldr r3, [r7, #4] - 8001956: 681b ldr r3, [r3, #0] - 8001958: 699b ldr r3, [r3, #24] - 800195a: 60fb str r3, [r7, #12] + 8001858: 687b ldr r3, [r7, #4] + 800185a: 681b ldr r3, [r3, #0] + 800185c: 699b ldr r3, [r3, #24] + 800185e: 60fb str r3, [r7, #12] HAL_Delay(ETH_REG_WRITE_DELAY); - 800195c: 2001 movs r0, #1 - 800195e: f7ff fcf3 bl 8001348 + 8001860: 2001 movs r0, #1 + 8001862: f7ff fdb1 bl 80013c8 (heth->Instance)->MACFCR = tmpreg1; - 8001962: 687b ldr r3, [r7, #4] - 8001964: 681b ldr r3, [r3, #0] - 8001966: 68fa ldr r2, [r7, #12] - 8001968: 619a str r2, [r3, #24] + 8001866: 687b ldr r3, [r7, #4] + 8001868: 681b ldr r3, [r3, #0] + 800186a: 68fa ldr r2, [r7, #12] + 800186c: 619a str r2, [r3, #24] } - 800196a: bf00 nop - 800196c: 3710 adds r7, #16 - 800196e: 46bd mov sp, r7 - 8001970: bd80 pop {r7, pc} - 8001972: bf00 nop - 8001974: fd20810f .word 0xfd20810f + 800186e: bf00 nop + 8001870: 3710 adds r7, #16 + 8001872: 46bd mov sp, r7 + 8001874: bd80 pop {r7, pc} + 8001876: bf00 nop + 8001878: fd20810f .word 0xfd20810f -08001978 : +0800187c : static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf) { - 8001978: b580 push {r7, lr} - 800197a: b084 sub sp, #16 - 800197c: af00 add r7, sp, #0 - 800197e: 6078 str r0, [r7, #4] - 8001980: 6039 str r1, [r7, #0] + 800187c: b580 push {r7, lr} + 800187e: b084 sub sp, #16 + 8001880: af00 add r7, sp, #0 + 8001882: 6078 str r0, [r7, #4] + 8001884: 6039 str r1, [r7, #0] uint32_t tmpreg1; /*----------------------- ETHERNET DMAOMR Configuration --------------------*/ /* Get the ETHERNET DMAOMR value */ tmpreg1 = (heth->Instance)->DMAOMR; - 8001982: 687b ldr r3, [r7, #4] - 8001984: 681b ldr r3, [r3, #0] - 8001986: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 800198a: 699b ldr r3, [r3, #24] - 800198c: 60fb str r3, [r7, #12] + 8001886: 687b ldr r3, [r7, #4] + 8001888: 681b ldr r3, [r3, #0] + 800188a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 800188e: 699b ldr r3, [r3, #24] + 8001890: 60fb str r3, [r7, #12] /* Clear xx bits */ tmpreg1 &= ETH_DMAOMR_CLEAR_MASK; - 800198e: 68fa ldr r2, [r7, #12] - 8001990: 4b3d ldr r3, [pc, #244] ; (8001a88 ) - 8001992: 4013 ands r3, r2 - 8001994: 60fb str r3, [r7, #12] + 8001892: 68fa ldr r2, [r7, #12] + 8001894: 4b3d ldr r3, [pc, #244] ; (800198c ) + 8001896: 4013 ands r3, r2 + 8001898: 60fb str r3, [r7, #12] tmpreg1 |= (uint32_t)(((uint32_t)((dmaconf->DropTCPIPChecksumErrorFrame == DISABLE) ? 1U : 0U) << 26U) | - 8001996: 683b ldr r3, [r7, #0] - 8001998: 7b1b ldrb r3, [r3, #12] - 800199a: 2b00 cmp r3, #0 - 800199c: d102 bne.n 80019a4 - 800199e: f04f 6280 mov.w r2, #67108864 ; 0x4000000 - 80019a2: e000 b.n 80019a6 - 80019a4: 2200 movs r2, #0 + 800189a: 683b ldr r3, [r7, #0] + 800189c: 7b1b ldrb r3, [r3, #12] + 800189e: 2b00 cmp r3, #0 + 80018a0: d102 bne.n 80018a8 + 80018a2: f04f 6280 mov.w r2, #67108864 ; 0x4000000 + 80018a6: e000 b.n 80018aa + 80018a8: 2200 movs r2, #0 ((uint32_t)dmaconf->ReceiveStoreForward << 25U) | - 80019a6: 683b ldr r3, [r7, #0] - 80019a8: 7b5b ldrb r3, [r3, #13] - 80019aa: 065b lsls r3, r3, #25 + 80018aa: 683b ldr r3, [r7, #0] + 80018ac: 7b5b ldrb r3, [r3, #13] + 80018ae: 065b lsls r3, r3, #25 tmpreg1 |= (uint32_t)(((uint32_t)((dmaconf->DropTCPIPChecksumErrorFrame == DISABLE) ? 1U : 0U) << 26U) | - 80019ac: 4313 orrs r3, r2 + 80018b0: 4313 orrs r3, r2 ((uint32_t)((dmaconf->FlushRxPacket == DISABLE) ? 1U : 0U) << 20U) | - 80019ae: 683a ldr r2, [r7, #0] - 80019b0: 7f52 ldrb r2, [r2, #29] - 80019b2: 2a00 cmp r2, #0 - 80019b4: d102 bne.n 80019bc - 80019b6: f44f 1280 mov.w r2, #1048576 ; 0x100000 - 80019ba: e000 b.n 80019be - 80019bc: 2200 movs r2, #0 + 80018b2: 683a ldr r2, [r7, #0] + 80018b4: 7f52 ldrb r2, [r2, #29] + 80018b6: 2a00 cmp r2, #0 + 80018b8: d102 bne.n 80018c0 + 80018ba: f44f 1280 mov.w r2, #1048576 ; 0x100000 + 80018be: e000 b.n 80018c2 + 80018c0: 2200 movs r2, #0 ((uint32_t)dmaconf->ReceiveStoreForward << 25U) | - 80019be: 431a orrs r2, r3 + 80018c2: 431a orrs r2, r3 ((uint32_t)dmaconf->TransmitStoreForward << 21U) | - 80019c0: 683b ldr r3, [r7, #0] - 80019c2: 7b9b ldrb r3, [r3, #14] - 80019c4: 055b lsls r3, r3, #21 + 80018c4: 683b ldr r3, [r7, #0] + 80018c6: 7b9b ldrb r3, [r3, #14] + 80018c8: 055b lsls r3, r3, #21 ((uint32_t)((dmaconf->FlushRxPacket == DISABLE) ? 1U : 0U) << 20U) | - 80019c6: 431a orrs r2, r3 + 80018ca: 431a orrs r2, r3 dmaconf->TransmitThresholdControl | - 80019c8: 683b ldr r3, [r7, #0] - 80019ca: 695b ldr r3, [r3, #20] + 80018cc: 683b ldr r3, [r7, #0] + 80018ce: 695b ldr r3, [r3, #20] ((uint32_t)dmaconf->TransmitStoreForward << 21U) | - 80019cc: 431a orrs r2, r3 + 80018d0: 431a orrs r2, r3 ((uint32_t)dmaconf->ForwardErrorFrames << 7U) | - 80019ce: 683b ldr r3, [r7, #0] - 80019d0: 7f1b ldrb r3, [r3, #28] - 80019d2: 01db lsls r3, r3, #7 + 80018d2: 683b ldr r3, [r7, #0] + 80018d4: 7f1b ldrb r3, [r3, #28] + 80018d6: 01db lsls r3, r3, #7 dmaconf->TransmitThresholdControl | - 80019d4: 431a orrs r2, r3 + 80018d8: 431a orrs r2, r3 ((uint32_t)dmaconf->ForwardUndersizedGoodFrames << 6U) | - 80019d6: 683b ldr r3, [r7, #0] - 80019d8: 7f9b ldrb r3, [r3, #30] - 80019da: 019b lsls r3, r3, #6 + 80018da: 683b ldr r3, [r7, #0] + 80018dc: 7f9b ldrb r3, [r3, #30] + 80018de: 019b lsls r3, r3, #6 ((uint32_t)dmaconf->ForwardErrorFrames << 7U) | - 80019dc: 431a orrs r2, r3 + 80018e0: 431a orrs r2, r3 dmaconf->ReceiveThresholdControl | - 80019de: 683b ldr r3, [r7, #0] - 80019e0: 6a1b ldr r3, [r3, #32] + 80018e2: 683b ldr r3, [r7, #0] + 80018e4: 6a1b ldr r3, [r3, #32] ((uint32_t)dmaconf->ForwardUndersizedGoodFrames << 6U) | - 80019e2: 431a orrs r2, r3 + 80018e6: 431a orrs r2, r3 ((uint32_t)dmaconf->SecondFrameOperate << 2U)); - 80019e4: 683b ldr r3, [r7, #0] - 80019e6: f893 3024 ldrb.w r3, [r3, #36] ; 0x24 - 80019ea: 009b lsls r3, r3, #2 + 80018e8: 683b ldr r3, [r7, #0] + 80018ea: f893 3024 ldrb.w r3, [r3, #36] ; 0x24 + 80018ee: 009b lsls r3, r3, #2 tmpreg1 |= (uint32_t)(((uint32_t)((dmaconf->DropTCPIPChecksumErrorFrame == DISABLE) ? 1U : 0U) << 26U) | - 80019ec: 4313 orrs r3, r2 - 80019ee: 68fa ldr r2, [r7, #12] - 80019f0: 4313 orrs r3, r2 - 80019f2: 60fb str r3, [r7, #12] + 80018f0: 4313 orrs r3, r2 + 80018f2: 68fa ldr r2, [r7, #12] + 80018f4: 4313 orrs r3, r2 + 80018f6: 60fb str r3, [r7, #12] /* Write to ETHERNET DMAOMR */ (heth->Instance)->DMAOMR = (uint32_t)tmpreg1; - 80019f4: 687b ldr r3, [r7, #4] - 80019f6: 681b ldr r3, [r3, #0] - 80019f8: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 80019fc: 461a mov r2, r3 - 80019fe: 68fb ldr r3, [r7, #12] - 8001a00: 6193 str r3, [r2, #24] + 80018f8: 687b ldr r3, [r7, #4] + 80018fa: 681b ldr r3, [r3, #0] + 80018fc: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 8001900: 461a mov r2, r3 + 8001902: 68fb ldr r3, [r7, #12] + 8001904: 6193 str r3, [r2, #24] /* Wait until the write operation will be taken into account: at least four TX_CLK/RX_CLK clock cycles */ tmpreg1 = (heth->Instance)->DMAOMR; - 8001a02: 687b ldr r3, [r7, #4] - 8001a04: 681b ldr r3, [r3, #0] - 8001a06: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001a0a: 699b ldr r3, [r3, #24] - 8001a0c: 60fb str r3, [r7, #12] + 8001906: 687b ldr r3, [r7, #4] + 8001908: 681b ldr r3, [r3, #0] + 800190a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 800190e: 699b ldr r3, [r3, #24] + 8001910: 60fb str r3, [r7, #12] HAL_Delay(ETH_REG_WRITE_DELAY); - 8001a0e: 2001 movs r0, #1 - 8001a10: f7ff fc9a bl 8001348 + 8001912: 2001 movs r0, #1 + 8001914: f7ff fd58 bl 80013c8 (heth->Instance)->DMAOMR = tmpreg1; - 8001a14: 687b ldr r3, [r7, #4] - 8001a16: 681b ldr r3, [r3, #0] - 8001a18: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001a1c: 461a mov r2, r3 - 8001a1e: 68fb ldr r3, [r7, #12] - 8001a20: 6193 str r3, [r2, #24] + 8001918: 687b ldr r3, [r7, #4] + 800191a: 681b ldr r3, [r3, #0] + 800191c: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 8001920: 461a mov r2, r3 + 8001922: 68fb ldr r3, [r7, #12] + 8001924: 6193 str r3, [r2, #24] /*----------------------- ETHERNET DMABMR Configuration --------------------*/ (heth->Instance)->DMABMR = (uint32_t)(((uint32_t)dmaconf->AddressAlignedBeats << 25U) | - 8001a22: 683b ldr r3, [r7, #0] - 8001a24: 791b ldrb r3, [r3, #4] - 8001a26: 065a lsls r2, r3, #25 + 8001926: 683b ldr r3, [r7, #0] + 8001928: 791b ldrb r3, [r3, #4] + 800192a: 065a lsls r2, r3, #25 dmaconf->BurstMode | - 8001a28: 683b ldr r3, [r7, #0] - 8001a2a: 689b ldr r3, [r3, #8] + 800192c: 683b ldr r3, [r7, #0] + 800192e: 689b ldr r3, [r3, #8] (heth->Instance)->DMABMR = (uint32_t)(((uint32_t)dmaconf->AddressAlignedBeats << 25U) | - 8001a2c: 431a orrs r2, r3 + 8001930: 431a orrs r2, r3 dmaconf->RxDMABurstLength | /* !! if 4xPBL is selected for Tx or - 8001a2e: 683b ldr r3, [r7, #0] - 8001a30: 699b ldr r3, [r3, #24] + 8001932: 683b ldr r3, [r7, #0] + 8001934: 699b ldr r3, [r3, #24] dmaconf->BurstMode | - 8001a32: 431a orrs r2, r3 + 8001936: 431a orrs r2, r3 Rx it is applied for the other */ dmaconf->TxDMABurstLength | - 8001a34: 683b ldr r3, [r7, #0] - 8001a36: 691b ldr r3, [r3, #16] + 8001938: 683b ldr r3, [r7, #0] + 800193a: 691b ldr r3, [r3, #16] dmaconf->RxDMABurstLength | /* !! if 4xPBL is selected for Tx or - 8001a38: 431a orrs r2, r3 + 800193c: 431a orrs r2, r3 ((uint32_t)dmaconf->EnhancedDescriptorFormat << 7U) | - 8001a3a: 683b ldr r3, [r7, #0] - 8001a3c: f893 3025 ldrb.w r3, [r3, #37] ; 0x25 - 8001a40: 01db lsls r3, r3, #7 + 800193e: 683b ldr r3, [r7, #0] + 8001940: f893 3025 ldrb.w r3, [r3, #37] ; 0x25 + 8001944: 01db lsls r3, r3, #7 dmaconf->TxDMABurstLength | - 8001a42: 431a orrs r2, r3 + 8001946: 431a orrs r2, r3 (dmaconf->DescriptorSkipLength << 2U) | - 8001a44: 683b ldr r3, [r7, #0] - 8001a46: 6a9b ldr r3, [r3, #40] ; 0x28 - 8001a48: 009b lsls r3, r3, #2 + 8001948: 683b ldr r3, [r7, #0] + 800194a: 6a9b ldr r3, [r3, #40] ; 0x28 + 800194c: 009b lsls r3, r3, #2 ((uint32_t)dmaconf->EnhancedDescriptorFormat << 7U) | - 8001a4a: 431a orrs r2, r3 + 800194e: 431a orrs r2, r3 dmaconf->DMAArbitration | - 8001a4c: 683b ldr r3, [r7, #0] - 8001a4e: 681b ldr r3, [r3, #0] + 8001950: 683b ldr r3, [r7, #0] + 8001952: 681b ldr r3, [r3, #0] (dmaconf->DescriptorSkipLength << 2U) | - 8001a50: 4313 orrs r3, r2 + 8001954: 4313 orrs r3, r2 (heth->Instance)->DMABMR = (uint32_t)(((uint32_t)dmaconf->AddressAlignedBeats << 25U) | - 8001a52: 687a ldr r2, [r7, #4] - 8001a54: 6812 ldr r2, [r2, #0] - 8001a56: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 - 8001a5a: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 8001a5e: 6013 str r3, [r2, #0] + 8001956: 687a ldr r2, [r7, #4] + 8001958: 6812 ldr r2, [r2, #0] + 800195a: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 + 800195e: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 8001962: 6013 str r3, [r2, #0] ETH_DMABMR_USP); /* Enable use of separate PBL for Rx and Tx */ /* Wait until the write operation will be taken into account: at least four TX_CLK/RX_CLK clock cycles */ tmpreg1 = (heth->Instance)->DMABMR; - 8001a60: 687b ldr r3, [r7, #4] - 8001a62: 681b ldr r3, [r3, #0] - 8001a64: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001a68: 681b ldr r3, [r3, #0] - 8001a6a: 60fb str r3, [r7, #12] + 8001964: 687b ldr r3, [r7, #4] + 8001966: 681b ldr r3, [r3, #0] + 8001968: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 800196c: 681b ldr r3, [r3, #0] + 800196e: 60fb str r3, [r7, #12] HAL_Delay(ETH_REG_WRITE_DELAY); - 8001a6c: 2001 movs r0, #1 - 8001a6e: f7ff fc6b bl 8001348 + 8001970: 2001 movs r0, #1 + 8001972: f7ff fd29 bl 80013c8 (heth->Instance)->DMABMR = tmpreg1; - 8001a72: 687b ldr r3, [r7, #4] - 8001a74: 681b ldr r3, [r3, #0] - 8001a76: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001a7a: 461a mov r2, r3 - 8001a7c: 68fb ldr r3, [r7, #12] - 8001a7e: 6013 str r3, [r2, #0] + 8001976: 687b ldr r3, [r7, #4] + 8001978: 681b ldr r3, [r3, #0] + 800197a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 800197e: 461a mov r2, r3 + 8001980: 68fb ldr r3, [r7, #12] + 8001982: 6013 str r3, [r2, #0] } - 8001a80: bf00 nop - 8001a82: 3710 adds r7, #16 - 8001a84: 46bd mov sp, r7 - 8001a86: bd80 pop {r7, pc} - 8001a88: f8de3f23 .word 0xf8de3f23 + 8001984: bf00 nop + 8001986: 3710 adds r7, #16 + 8001988: 46bd mov sp, r7 + 800198a: bd80 pop {r7, pc} + 800198c: f8de3f23 .word 0xf8de3f23 -08001a8c : +08001990 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth) { - 8001a8c: b580 push {r7, lr} - 8001a8e: b0a6 sub sp, #152 ; 0x98 - 8001a90: af00 add r7, sp, #0 - 8001a92: 6078 str r0, [r7, #4] + 8001990: b580 push {r7, lr} + 8001992: b0a6 sub sp, #152 ; 0x98 + 8001994: af00 add r7, sp, #0 + 8001996: 6078 str r0, [r7, #4] ETH_MACConfigTypeDef macDefaultConf; ETH_DMAConfigTypeDef dmaDefaultConf; /*--------------- ETHERNET MAC registers default Configuration --------------*/ macDefaultConf.Watchdog = ENABLE; - 8001a94: 2301 movs r3, #1 - 8001a96: f887 3044 strb.w r3, [r7, #68] ; 0x44 + 8001998: 2301 movs r3, #1 + 800199a: f887 3044 strb.w r3, [r7, #68] ; 0x44 macDefaultConf.Jabber = ENABLE; - 8001a9a: 2301 movs r3, #1 - 8001a9c: f887 3045 strb.w r3, [r7, #69] ; 0x45 + 800199e: 2301 movs r3, #1 + 80019a0: f887 3045 strb.w r3, [r7, #69] ; 0x45 macDefaultConf.InterPacketGapVal = ETH_INTERFRAMEGAP_96BIT; - 8001aa0: 2300 movs r3, #0 - 8001aa2: 63fb str r3, [r7, #60] ; 0x3c + 80019a4: 2300 movs r3, #0 + 80019a6: 63fb str r3, [r7, #60] ; 0x3c macDefaultConf.CarrierSenseDuringTransmit = DISABLE; - 8001aa4: 2300 movs r3, #0 - 8001aa6: f887 3053 strb.w r3, [r7, #83] ; 0x53 + 80019a8: 2300 movs r3, #0 + 80019aa: f887 3053 strb.w r3, [r7, #83] ; 0x53 macDefaultConf.ReceiveOwn = ENABLE; - 8001aaa: 2301 movs r3, #1 - 8001aac: f887 3052 strb.w r3, [r7, #82] ; 0x52 + 80019ae: 2301 movs r3, #1 + 80019b0: f887 3052 strb.w r3, [r7, #82] ; 0x52 macDefaultConf.LoopbackMode = DISABLE; - 8001ab0: 2300 movs r3, #0 - 8001ab2: f887 3050 strb.w r3, [r7, #80] ; 0x50 + 80019b4: 2300 movs r3, #0 + 80019b6: f887 3050 strb.w r3, [r7, #80] ; 0x50 macDefaultConf.CRCStripTypePacket = ENABLE; - 8001ab6: 2301 movs r3, #1 - 8001ab8: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 80019ba: 2301 movs r3, #1 + 80019bc: f887 3042 strb.w r3, [r7, #66] ; 0x42 macDefaultConf.ChecksumOffload = ENABLE; - 8001abc: 2301 movs r3, #1 - 8001abe: f887 3038 strb.w r3, [r7, #56] ; 0x38 + 80019c0: 2301 movs r3, #1 + 80019c2: f887 3038 strb.w r3, [r7, #56] ; 0x38 macDefaultConf.RetryTransmission = DISABLE; - 8001ac2: 2300 movs r3, #0 - 8001ac4: f887 3054 strb.w r3, [r7, #84] ; 0x54 + 80019c6: 2300 movs r3, #0 + 80019c8: f887 3054 strb.w r3, [r7, #84] ; 0x54 macDefaultConf.AutomaticPadCRCStrip = DISABLE; - 8001ac8: 2300 movs r3, #0 - 8001aca: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80019cc: 2300 movs r3, #0 + 80019ce: f887 3043 strb.w r3, [r7, #67] ; 0x43 macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10; - 8001ace: 2300 movs r3, #0 - 8001ad0: 65bb str r3, [r7, #88] ; 0x58 + 80019d2: 2300 movs r3, #0 + 80019d4: 65bb str r3, [r7, #88] ; 0x58 macDefaultConf.DeferralCheck = DISABLE; - 8001ad2: 2300 movs r3, #0 - 8001ad4: f887 305c strb.w r3, [r7, #92] ; 0x5c + 80019d6: 2300 movs r3, #0 + 80019d8: f887 305c strb.w r3, [r7, #92] ; 0x5c macDefaultConf.PauseTime = 0x0U; - 8001ad8: 2300 movs r3, #0 - 8001ada: 67fb str r3, [r7, #124] ; 0x7c + 80019dc: 2300 movs r3, #0 + 80019de: 67fb str r3, [r7, #124] ; 0x7c macDefaultConf.ZeroQuantaPause = DISABLE; - 8001adc: 2300 movs r3, #0 - 8001ade: f887 3080 strb.w r3, [r7, #128] ; 0x80 + 80019e0: 2300 movs r3, #0 + 80019e2: f887 3080 strb.w r3, [r7, #128] ; 0x80 macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS4; - 8001ae2: 2300 movs r3, #0 - 8001ae4: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 80019e6: 2300 movs r3, #0 + 80019e8: f8c7 3084 str.w r3, [r7, #132] ; 0x84 macDefaultConf.ReceiveFlowControl = DISABLE; - 8001ae8: 2300 movs r3, #0 - 8001aea: f887 308a strb.w r3, [r7, #138] ; 0x8a + 80019ec: 2300 movs r3, #0 + 80019ee: f887 308a strb.w r3, [r7, #138] ; 0x8a macDefaultConf.TransmitFlowControl = DISABLE; - 8001aee: 2300 movs r3, #0 - 8001af0: f887 3088 strb.w r3, [r7, #136] ; 0x88 + 80019f2: 2300 movs r3, #0 + 80019f4: f887 3088 strb.w r3, [r7, #136] ; 0x88 macDefaultConf.Speed = ETH_SPEED_100M; - 8001af4: f44f 4380 mov.w r3, #16384 ; 0x4000 - 8001af8: 64bb str r3, [r7, #72] ; 0x48 + 80019f8: f44f 4380 mov.w r3, #16384 ; 0x4000 + 80019fc: 64bb str r3, [r7, #72] ; 0x48 macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE; - 8001afa: f44f 6300 mov.w r3, #2048 ; 0x800 - 8001afe: 64fb str r3, [r7, #76] ; 0x4c + 80019fe: f44f 6300 mov.w r3, #2048 ; 0x800 + 8001a02: 64fb str r3, [r7, #76] ; 0x4c macDefaultConf.UnicastPausePacketDetect = DISABLE; - 8001b00: 2300 movs r3, #0 - 8001b02: f887 3089 strb.w r3, [r7, #137] ; 0x89 + 8001a04: 2300 movs r3, #0 + 8001a06: f887 3089 strb.w r3, [r7, #137] ; 0x89 /* MAC default configuration */ ETH_SetMACConfig(heth, &macDefaultConf); - 8001b06: f107 0334 add.w r3, r7, #52 ; 0x34 - 8001b0a: 4619 mov r1, r3 - 8001b0c: 6878 ldr r0, [r7, #4] - 8001b0e: f7ff fe7f bl 8001810 + 8001a0a: f107 0334 add.w r3, r7, #52 ; 0x34 + 8001a0e: 4619 mov r1, r3 + 8001a10: 6878 ldr r0, [r7, #4] + 8001a12: f7ff fe7f bl 8001714 /*--------------- ETHERNET DMA registers default Configuration --------------*/ dmaDefaultConf.DropTCPIPChecksumErrorFrame = ENABLE; - 8001b12: 2301 movs r3, #1 - 8001b14: 753b strb r3, [r7, #20] + 8001a16: 2301 movs r3, #1 + 8001a18: 753b strb r3, [r7, #20] dmaDefaultConf.ReceiveStoreForward = ENABLE; - 8001b16: 2301 movs r3, #1 - 8001b18: 757b strb r3, [r7, #21] + 8001a1a: 2301 movs r3, #1 + 8001a1c: 757b strb r3, [r7, #21] dmaDefaultConf.FlushRxPacket = ENABLE; - 8001b1a: 2301 movs r3, #1 - 8001b1c: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8001a1e: 2301 movs r3, #1 + 8001a20: f887 3025 strb.w r3, [r7, #37] ; 0x25 dmaDefaultConf.TransmitStoreForward = ENABLE; - 8001b20: 2301 movs r3, #1 - 8001b22: 75bb strb r3, [r7, #22] + 8001a24: 2301 movs r3, #1 + 8001a26: 75bb strb r3, [r7, #22] dmaDefaultConf.TransmitThresholdControl = ETH_TRANSMITTHRESHOLDCONTROL_64BYTES; - 8001b24: 2300 movs r3, #0 - 8001b26: 61fb str r3, [r7, #28] + 8001a28: 2300 movs r3, #0 + 8001a2a: 61fb str r3, [r7, #28] dmaDefaultConf.ForwardErrorFrames = DISABLE; - 8001b28: 2300 movs r3, #0 - 8001b2a: f887 3024 strb.w r3, [r7, #36] ; 0x24 + 8001a2c: 2300 movs r3, #0 + 8001a2e: f887 3024 strb.w r3, [r7, #36] ; 0x24 dmaDefaultConf.ForwardUndersizedGoodFrames = DISABLE; - 8001b2e: 2300 movs r3, #0 - 8001b30: f887 3026 strb.w r3, [r7, #38] ; 0x26 + 8001a32: 2300 movs r3, #0 + 8001a34: f887 3026 strb.w r3, [r7, #38] ; 0x26 dmaDefaultConf.ReceiveThresholdControl = ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES; - 8001b34: 2300 movs r3, #0 - 8001b36: 62bb str r3, [r7, #40] ; 0x28 + 8001a38: 2300 movs r3, #0 + 8001a3a: 62bb str r3, [r7, #40] ; 0x28 dmaDefaultConf.SecondFrameOperate = ENABLE; - 8001b38: 2301 movs r3, #1 - 8001b3a: f887 302c strb.w r3, [r7, #44] ; 0x2c + 8001a3c: 2301 movs r3, #1 + 8001a3e: f887 302c strb.w r3, [r7, #44] ; 0x2c dmaDefaultConf.AddressAlignedBeats = ENABLE; - 8001b3e: 2301 movs r3, #1 - 8001b40: 733b strb r3, [r7, #12] + 8001a42: 2301 movs r3, #1 + 8001a44: 733b strb r3, [r7, #12] dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED; - 8001b42: f44f 3380 mov.w r3, #65536 ; 0x10000 - 8001b46: 613b str r3, [r7, #16] + 8001a46: f44f 3380 mov.w r3, #65536 ; 0x10000 + 8001a4a: 613b str r3, [r7, #16] dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT; - 8001b48: f44f 0380 mov.w r3, #4194304 ; 0x400000 - 8001b4c: 623b str r3, [r7, #32] + 8001a4c: f44f 0380 mov.w r3, #4194304 ; 0x400000 + 8001a50: 623b str r3, [r7, #32] dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT; - 8001b4e: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8001b52: 61bb str r3, [r7, #24] + 8001a52: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8001a56: 61bb str r3, [r7, #24] dmaDefaultConf.EnhancedDescriptorFormat = ENABLE; - 8001b54: 2301 movs r3, #1 - 8001b56: f887 302d strb.w r3, [r7, #45] ; 0x2d + 8001a58: 2301 movs r3, #1 + 8001a5a: f887 302d strb.w r3, [r7, #45] ; 0x2d dmaDefaultConf.DescriptorSkipLength = 0x0U; - 8001b5a: 2300 movs r3, #0 - 8001b5c: 633b str r3, [r7, #48] ; 0x30 + 8001a5e: 2300 movs r3, #0 + 8001a60: 633b str r3, [r7, #48] ; 0x30 dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1; - 8001b5e: 2300 movs r3, #0 - 8001b60: 60bb str r3, [r7, #8] + 8001a62: 2300 movs r3, #0 + 8001a64: 60bb str r3, [r7, #8] /* DMA default configuration */ ETH_SetDMAConfig(heth, &dmaDefaultConf); - 8001b62: f107 0308 add.w r3, r7, #8 - 8001b66: 4619 mov r1, r3 - 8001b68: 6878 ldr r0, [r7, #4] - 8001b6a: f7ff ff05 bl 8001978 + 8001a66: f107 0308 add.w r3, r7, #8 + 8001a6a: 4619 mov r1, r3 + 8001a6c: 6878 ldr r0, [r7, #4] + 8001a6e: f7ff ff05 bl 800187c } - 8001b6e: bf00 nop - 8001b70: 3798 adds r7, #152 ; 0x98 - 8001b72: 46bd mov sp, r7 - 8001b74: bd80 pop {r7, pc} + 8001a72: bf00 nop + 8001a74: 3798 adds r7, #152 ; 0x98 + 8001a76: 46bd mov sp, r7 + 8001a78: bd80 pop {r7, pc} ... -08001b78 : +08001a7c : * @arg ETH_MAC_Address3: MAC Address3 * @param Addr Pointer to MAC address buffer data (6 bytes) * @retval HAL status */ static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr) { - 8001b78: b480 push {r7} - 8001b7a: b087 sub sp, #28 - 8001b7c: af00 add r7, sp, #0 - 8001b7e: 60f8 str r0, [r7, #12] - 8001b80: 60b9 str r1, [r7, #8] - 8001b82: 607a str r2, [r7, #4] + 8001a7c: b480 push {r7} + 8001a7e: b087 sub sp, #28 + 8001a80: af00 add r7, sp, #0 + 8001a82: 60f8 str r0, [r7, #12] + 8001a84: 60b9 str r1, [r7, #8] + 8001a86: 607a str r2, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* Calculate the selected MAC address high register */ tmpreg1 = ((uint32_t)Addr[5U] << 8U) | (uint32_t)Addr[4U]; - 8001b84: 687b ldr r3, [r7, #4] - 8001b86: 3305 adds r3, #5 - 8001b88: 781b ldrb r3, [r3, #0] - 8001b8a: 021b lsls r3, r3, #8 - 8001b8c: 687a ldr r2, [r7, #4] - 8001b8e: 3204 adds r2, #4 - 8001b90: 7812 ldrb r2, [r2, #0] - 8001b92: 4313 orrs r3, r2 - 8001b94: 617b str r3, [r7, #20] + 8001a88: 687b ldr r3, [r7, #4] + 8001a8a: 3305 adds r3, #5 + 8001a8c: 781b ldrb r3, [r3, #0] + 8001a8e: 021b lsls r3, r3, #8 + 8001a90: 687a ldr r2, [r7, #4] + 8001a92: 3204 adds r2, #4 + 8001a94: 7812 ldrb r2, [r2, #0] + 8001a96: 4313 orrs r3, r2 + 8001a98: 617b str r3, [r7, #20] /* Load the selected MAC address high register */ (*(__IO uint32_t *)((uint32_t)(ETH_MAC_ADDR_HBASE + MacAddr))) = tmpreg1; - 8001b96: 68ba ldr r2, [r7, #8] - 8001b98: 4b11 ldr r3, [pc, #68] ; (8001be0 ) - 8001b9a: 4413 add r3, r2 - 8001b9c: 461a mov r2, r3 - 8001b9e: 697b ldr r3, [r7, #20] - 8001ba0: 6013 str r3, [r2, #0] + 8001a9a: 68ba ldr r2, [r7, #8] + 8001a9c: 4b11 ldr r3, [pc, #68] ; (8001ae4 ) + 8001a9e: 4413 add r3, r2 + 8001aa0: 461a mov r2, r3 + 8001aa2: 697b ldr r3, [r7, #20] + 8001aa4: 6013 str r3, [r2, #0] /* Calculate the selected MAC address low register */ tmpreg1 = ((uint32_t)Addr[3U] << 24U) | ((uint32_t)Addr[2U] << 16U) | ((uint32_t)Addr[1U] << 8U) | Addr[0U]; - 8001ba2: 687b ldr r3, [r7, #4] - 8001ba4: 3303 adds r3, #3 - 8001ba6: 781b ldrb r3, [r3, #0] - 8001ba8: 061a lsls r2, r3, #24 - 8001baa: 687b ldr r3, [r7, #4] - 8001bac: 3302 adds r3, #2 - 8001bae: 781b ldrb r3, [r3, #0] - 8001bb0: 041b lsls r3, r3, #16 - 8001bb2: 431a orrs r2, r3 - 8001bb4: 687b ldr r3, [r7, #4] - 8001bb6: 3301 adds r3, #1 - 8001bb8: 781b ldrb r3, [r3, #0] - 8001bba: 021b lsls r3, r3, #8 - 8001bbc: 4313 orrs r3, r2 - 8001bbe: 687a ldr r2, [r7, #4] - 8001bc0: 7812 ldrb r2, [r2, #0] - 8001bc2: 4313 orrs r3, r2 - 8001bc4: 617b str r3, [r7, #20] + 8001aa6: 687b ldr r3, [r7, #4] + 8001aa8: 3303 adds r3, #3 + 8001aaa: 781b ldrb r3, [r3, #0] + 8001aac: 061a lsls r2, r3, #24 + 8001aae: 687b ldr r3, [r7, #4] + 8001ab0: 3302 adds r3, #2 + 8001ab2: 781b ldrb r3, [r3, #0] + 8001ab4: 041b lsls r3, r3, #16 + 8001ab6: 431a orrs r2, r3 + 8001ab8: 687b ldr r3, [r7, #4] + 8001aba: 3301 adds r3, #1 + 8001abc: 781b ldrb r3, [r3, #0] + 8001abe: 021b lsls r3, r3, #8 + 8001ac0: 4313 orrs r3, r2 + 8001ac2: 687a ldr r2, [r7, #4] + 8001ac4: 7812 ldrb r2, [r2, #0] + 8001ac6: 4313 orrs r3, r2 + 8001ac8: 617b str r3, [r7, #20] /* Load the selected MAC address low register */ (*(__IO uint32_t *)((uint32_t)(ETH_MAC_ADDR_LBASE + MacAddr))) = tmpreg1; - 8001bc6: 68ba ldr r2, [r7, #8] - 8001bc8: 4b06 ldr r3, [pc, #24] ; (8001be4 ) - 8001bca: 4413 add r3, r2 - 8001bcc: 461a mov r2, r3 - 8001bce: 697b ldr r3, [r7, #20] - 8001bd0: 6013 str r3, [r2, #0] + 8001aca: 68ba ldr r2, [r7, #8] + 8001acc: 4b06 ldr r3, [pc, #24] ; (8001ae8 ) + 8001ace: 4413 add r3, r2 + 8001ad0: 461a mov r2, r3 + 8001ad2: 697b ldr r3, [r7, #20] + 8001ad4: 6013 str r3, [r2, #0] } - 8001bd2: bf00 nop - 8001bd4: 371c adds r7, #28 - 8001bd6: 46bd mov sp, r7 - 8001bd8: f85d 7b04 ldr.w r7, [sp], #4 - 8001bdc: 4770 bx lr - 8001bde: bf00 nop - 8001be0: 40028040 .word 0x40028040 - 8001be4: 40028044 .word 0x40028044 + 8001ad6: bf00 nop + 8001ad8: 371c adds r7, #28 + 8001ada: 46bd mov sp, r7 + 8001adc: f85d 7b04 ldr.w r7, [sp], #4 + 8001ae0: 4770 bx lr + 8001ae2: bf00 nop + 8001ae4: 40028040 .word 0x40028040 + 8001ae8: 40028044 .word 0x40028044 -08001be8 : +08001aec : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth) { - 8001be8: b480 push {r7} - 8001bea: b085 sub sp, #20 - 8001bec: af00 add r7, sp, #0 - 8001bee: 6078 str r0, [r7, #4] + 8001aec: b480 push {r7} + 8001aee: b085 sub sp, #20 + 8001af0: af00 add r7, sp, #0 + 8001af2: 6078 str r0, [r7, #4] ETH_DMADescTypeDef *dmatxdesc; uint32_t i; /* Fill each DMATxDesc descriptor with the right values */ for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++) - 8001bf0: 2300 movs r3, #0 - 8001bf2: 60fb str r3, [r7, #12] - 8001bf4: e03e b.n 8001c74 + 8001af4: 2300 movs r3, #0 + 8001af6: 60fb str r3, [r7, #12] + 8001af8: e03e b.n 8001b78 { dmatxdesc = heth->Init.TxDesc + i; - 8001bf6: 687b ldr r3, [r7, #4] - 8001bf8: 68d9 ldr r1, [r3, #12] - 8001bfa: 68fa ldr r2, [r7, #12] - 8001bfc: 4613 mov r3, r2 - 8001bfe: 009b lsls r3, r3, #2 - 8001c00: 4413 add r3, r2 - 8001c02: 00db lsls r3, r3, #3 - 8001c04: 440b add r3, r1 - 8001c06: 60bb str r3, [r7, #8] + 8001afa: 687b ldr r3, [r7, #4] + 8001afc: 68d9 ldr r1, [r3, #12] + 8001afe: 68fa ldr r2, [r7, #12] + 8001b00: 4613 mov r3, r2 + 8001b02: 009b lsls r3, r3, #2 + 8001b04: 4413 add r3, r2 + 8001b06: 00db lsls r3, r3, #3 + 8001b08: 440b add r3, r1 + 8001b0a: 60bb str r3, [r7, #8] WRITE_REG(dmatxdesc->DESC0, 0x0U); - 8001c08: 68bb ldr r3, [r7, #8] - 8001c0a: 2200 movs r2, #0 - 8001c0c: 601a str r2, [r3, #0] + 8001b0c: 68bb ldr r3, [r7, #8] + 8001b0e: 2200 movs r2, #0 + 8001b10: 601a str r2, [r3, #0] WRITE_REG(dmatxdesc->DESC1, 0x0U); - 8001c0e: 68bb ldr r3, [r7, #8] - 8001c10: 2200 movs r2, #0 - 8001c12: 605a str r2, [r3, #4] + 8001b12: 68bb ldr r3, [r7, #8] + 8001b14: 2200 movs r2, #0 + 8001b16: 605a str r2, [r3, #4] WRITE_REG(dmatxdesc->DESC2, 0x0U); - 8001c14: 68bb ldr r3, [r7, #8] - 8001c16: 2200 movs r2, #0 - 8001c18: 609a str r2, [r3, #8] + 8001b18: 68bb ldr r3, [r7, #8] + 8001b1a: 2200 movs r2, #0 + 8001b1c: 609a str r2, [r3, #8] WRITE_REG(dmatxdesc->DESC3, 0x0U); - 8001c1a: 68bb ldr r3, [r7, #8] - 8001c1c: 2200 movs r2, #0 - 8001c1e: 60da str r2, [r3, #12] + 8001b1e: 68bb ldr r3, [r7, #8] + 8001b20: 2200 movs r2, #0 + 8001b22: 60da str r2, [r3, #12] WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc); - 8001c20: 68b9 ldr r1, [r7, #8] - 8001c22: 687b ldr r3, [r7, #4] - 8001c24: 68fa ldr r2, [r7, #12] - 8001c26: 3206 adds r2, #6 - 8001c28: f843 1022 str.w r1, [r3, r2, lsl #2] + 8001b24: 68b9 ldr r1, [r7, #8] + 8001b26: 687b ldr r3, [r7, #4] + 8001b28: 68fa ldr r2, [r7, #12] + 8001b2a: 3206 adds r2, #6 + 8001b2c: f843 1022 str.w r1, [r3, r2, lsl #2] /* Set Second Address Chained bit */ SET_BIT(dmatxdesc->DESC0, ETH_DMATXDESC_TCH); - 8001c2c: 68bb ldr r3, [r7, #8] - 8001c2e: 681b ldr r3, [r3, #0] - 8001c30: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 - 8001c34: 68bb ldr r3, [r7, #8] - 8001c36: 601a str r2, [r3, #0] + 8001b30: 68bb ldr r3, [r7, #8] + 8001b32: 681b ldr r3, [r3, #0] + 8001b34: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 + 8001b38: 68bb ldr r3, [r7, #8] + 8001b3a: 601a str r2, [r3, #0] if (i < ((uint32_t)ETH_TX_DESC_CNT - 1U)) - 8001c38: 68fb ldr r3, [r7, #12] - 8001c3a: 2b02 cmp r3, #2 - 8001c3c: d80c bhi.n 8001c58 + 8001b3c: 68fb ldr r3, [r7, #12] + 8001b3e: 2b02 cmp r3, #2 + 8001b40: d80c bhi.n 8001b5c { WRITE_REG(dmatxdesc->DESC3, (uint32_t)(heth->Init.TxDesc + i + 1U)); - 8001c3e: 687b ldr r3, [r7, #4] - 8001c40: 68d9 ldr r1, [r3, #12] - 8001c42: 68fb ldr r3, [r7, #12] - 8001c44: 1c5a adds r2, r3, #1 - 8001c46: 4613 mov r3, r2 - 8001c48: 009b lsls r3, r3, #2 - 8001c4a: 4413 add r3, r2 - 8001c4c: 00db lsls r3, r3, #3 - 8001c4e: 440b add r3, r1 - 8001c50: 461a mov r2, r3 - 8001c52: 68bb ldr r3, [r7, #8] - 8001c54: 60da str r2, [r3, #12] - 8001c56: e004 b.n 8001c62 + 8001b42: 687b ldr r3, [r7, #4] + 8001b44: 68d9 ldr r1, [r3, #12] + 8001b46: 68fb ldr r3, [r7, #12] + 8001b48: 1c5a adds r2, r3, #1 + 8001b4a: 4613 mov r3, r2 + 8001b4c: 009b lsls r3, r3, #2 + 8001b4e: 4413 add r3, r2 + 8001b50: 00db lsls r3, r3, #3 + 8001b52: 440b add r3, r1 + 8001b54: 461a mov r2, r3 + 8001b56: 68bb ldr r3, [r7, #8] + 8001b58: 60da str r2, [r3, #12] + 8001b5a: e004 b.n 8001b66 } else { WRITE_REG(dmatxdesc->DESC3, (uint32_t)(heth->Init.TxDesc)); - 8001c58: 687b ldr r3, [r7, #4] - 8001c5a: 68db ldr r3, [r3, #12] - 8001c5c: 461a mov r2, r3 - 8001c5e: 68bb ldr r3, [r7, #8] - 8001c60: 60da str r2, [r3, #12] + 8001b5c: 687b ldr r3, [r7, #4] + 8001b5e: 68db ldr r3, [r3, #12] + 8001b60: 461a mov r2, r3 + 8001b62: 68bb ldr r3, [r7, #8] + 8001b64: 60da str r2, [r3, #12] } /* Set the DMA Tx descriptors checksum insertion */ SET_BIT(dmatxdesc->DESC0, ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL); - 8001c62: 68bb ldr r3, [r7, #8] - 8001c64: 681b ldr r3, [r3, #0] - 8001c66: f443 0240 orr.w r2, r3, #12582912 ; 0xc00000 - 8001c6a: 68bb ldr r3, [r7, #8] - 8001c6c: 601a str r2, [r3, #0] + 8001b66: 68bb ldr r3, [r7, #8] + 8001b68: 681b ldr r3, [r3, #0] + 8001b6a: f443 0240 orr.w r2, r3, #12582912 ; 0xc00000 + 8001b6e: 68bb ldr r3, [r7, #8] + 8001b70: 601a str r2, [r3, #0] for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++) - 8001c6e: 68fb ldr r3, [r7, #12] - 8001c70: 3301 adds r3, #1 - 8001c72: 60fb str r3, [r7, #12] - 8001c74: 68fb ldr r3, [r7, #12] - 8001c76: 2b03 cmp r3, #3 - 8001c78: d9bd bls.n 8001bf6 + 8001b72: 68fb ldr r3, [r7, #12] + 8001b74: 3301 adds r3, #1 + 8001b76: 60fb str r3, [r7, #12] + 8001b78: 68fb ldr r3, [r7, #12] + 8001b7a: 2b03 cmp r3, #3 + 8001b7c: d9bd bls.n 8001afa } heth->TxDescList.CurTxDesc = 0; - 8001c7a: 687b ldr r3, [r7, #4] - 8001c7c: 2200 movs r2, #0 - 8001c7e: 629a str r2, [r3, #40] ; 0x28 + 8001b7e: 687b ldr r3, [r7, #4] + 8001b80: 2200 movs r2, #0 + 8001b82: 629a str r2, [r3, #40] ; 0x28 /* Set Transmit Descriptor List Address */ WRITE_REG(heth->Instance->DMATDLAR, (uint32_t) heth->Init.TxDesc); - 8001c80: 687b ldr r3, [r7, #4] - 8001c82: 68da ldr r2, [r3, #12] - 8001c84: 687b ldr r3, [r7, #4] - 8001c86: 681b ldr r3, [r3, #0] - 8001c88: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001c8c: 611a str r2, [r3, #16] + 8001b84: 687b ldr r3, [r7, #4] + 8001b86: 68da ldr r2, [r3, #12] + 8001b88: 687b ldr r3, [r7, #4] + 8001b8a: 681b ldr r3, [r3, #0] + 8001b8c: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 8001b90: 611a str r2, [r3, #16] } - 8001c8e: bf00 nop - 8001c90: 3714 adds r7, #20 - 8001c92: 46bd mov sp, r7 - 8001c94: f85d 7b04 ldr.w r7, [sp], #4 - 8001c98: 4770 bx lr + 8001b92: bf00 nop + 8001b94: 3714 adds r7, #20 + 8001b96: 46bd mov sp, r7 + 8001b98: f85d 7b04 ldr.w r7, [sp], #4 + 8001b9c: 4770 bx lr -08001c9a : +08001b9e : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) { - 8001c9a: b480 push {r7} - 8001c9c: b085 sub sp, #20 - 8001c9e: af00 add r7, sp, #0 - 8001ca0: 6078 str r0, [r7, #4] + 8001b9e: b480 push {r7} + 8001ba0: b085 sub sp, #20 + 8001ba2: af00 add r7, sp, #0 + 8001ba4: 6078 str r0, [r7, #4] ETH_DMADescTypeDef *dmarxdesc; uint32_t i; for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++) - 8001ca2: 2300 movs r3, #0 - 8001ca4: 60fb str r3, [r7, #12] - 8001ca6: e048 b.n 8001d3a + 8001ba6: 2300 movs r3, #0 + 8001ba8: 60fb str r3, [r7, #12] + 8001baa: e048 b.n 8001c3e { dmarxdesc = heth->Init.RxDesc + i; - 8001ca8: 687b ldr r3, [r7, #4] - 8001caa: 6919 ldr r1, [r3, #16] - 8001cac: 68fa ldr r2, [r7, #12] - 8001cae: 4613 mov r3, r2 - 8001cb0: 009b lsls r3, r3, #2 - 8001cb2: 4413 add r3, r2 - 8001cb4: 00db lsls r3, r3, #3 - 8001cb6: 440b add r3, r1 - 8001cb8: 60bb str r3, [r7, #8] + 8001bac: 687b ldr r3, [r7, #4] + 8001bae: 6919 ldr r1, [r3, #16] + 8001bb0: 68fa ldr r2, [r7, #12] + 8001bb2: 4613 mov r3, r2 + 8001bb4: 009b lsls r3, r3, #2 + 8001bb6: 4413 add r3, r2 + 8001bb8: 00db lsls r3, r3, #3 + 8001bba: 440b add r3, r1 + 8001bbc: 60bb str r3, [r7, #8] WRITE_REG(dmarxdesc->DESC0, 0x0U); - 8001cba: 68bb ldr r3, [r7, #8] - 8001cbc: 2200 movs r2, #0 - 8001cbe: 601a str r2, [r3, #0] + 8001bbe: 68bb ldr r3, [r7, #8] + 8001bc0: 2200 movs r2, #0 + 8001bc2: 601a str r2, [r3, #0] WRITE_REG(dmarxdesc->DESC1, 0x0U); - 8001cc0: 68bb ldr r3, [r7, #8] - 8001cc2: 2200 movs r2, #0 - 8001cc4: 605a str r2, [r3, #4] + 8001bc4: 68bb ldr r3, [r7, #8] + 8001bc6: 2200 movs r2, #0 + 8001bc8: 605a str r2, [r3, #4] WRITE_REG(dmarxdesc->DESC2, 0x0U); - 8001cc6: 68bb ldr r3, [r7, #8] - 8001cc8: 2200 movs r2, #0 - 8001cca: 609a str r2, [r3, #8] + 8001bca: 68bb ldr r3, [r7, #8] + 8001bcc: 2200 movs r2, #0 + 8001bce: 609a str r2, [r3, #8] WRITE_REG(dmarxdesc->DESC3, 0x0U); - 8001ccc: 68bb ldr r3, [r7, #8] - 8001cce: 2200 movs r2, #0 - 8001cd0: 60da str r2, [r3, #12] + 8001bd0: 68bb ldr r3, [r7, #8] + 8001bd2: 2200 movs r2, #0 + 8001bd4: 60da str r2, [r3, #12] WRITE_REG(dmarxdesc->BackupAddr0, 0x0U); - 8001cd2: 68bb ldr r3, [r7, #8] - 8001cd4: 2200 movs r2, #0 - 8001cd6: 621a str r2, [r3, #32] + 8001bd6: 68bb ldr r3, [r7, #8] + 8001bd8: 2200 movs r2, #0 + 8001bda: 621a str r2, [r3, #32] WRITE_REG(dmarxdesc->BackupAddr1, 0x0U); - 8001cd8: 68bb ldr r3, [r7, #8] - 8001cda: 2200 movs r2, #0 - 8001cdc: 625a str r2, [r3, #36] ; 0x24 + 8001bdc: 68bb ldr r3, [r7, #8] + 8001bde: 2200 movs r2, #0 + 8001be0: 625a str r2, [r3, #36] ; 0x24 /* Set Own bit of the Rx descriptor Status */ dmarxdesc->DESC0 = ETH_DMARXDESC_OWN; - 8001cde: 68bb ldr r3, [r7, #8] - 8001ce0: f04f 4200 mov.w r2, #2147483648 ; 0x80000000 - 8001ce4: 601a str r2, [r3, #0] + 8001be2: 68bb ldr r3, [r7, #8] + 8001be4: f04f 4200 mov.w r2, #2147483648 ; 0x80000000 + 8001be8: 601a str r2, [r3, #0] /* Set Buffer1 size and Second Address Chained bit */ dmarxdesc->DESC1 = heth->Init.RxBuffLen | ETH_DMARXDESC_RCH; - 8001ce6: 687b ldr r3, [r7, #4] - 8001ce8: 695b ldr r3, [r3, #20] - 8001cea: f443 4280 orr.w r2, r3, #16384 ; 0x4000 - 8001cee: 68bb ldr r3, [r7, #8] - 8001cf0: 605a str r2, [r3, #4] + 8001bea: 687b ldr r3, [r7, #4] + 8001bec: 695b ldr r3, [r3, #20] + 8001bee: f443 4280 orr.w r2, r3, #16384 ; 0x4000 + 8001bf2: 68bb ldr r3, [r7, #8] + 8001bf4: 605a str r2, [r3, #4] /* Enable Ethernet DMA Rx Descriptor interrupt */ dmarxdesc->DESC1 &= ~ETH_DMARXDESC_DIC; - 8001cf2: 68bb ldr r3, [r7, #8] - 8001cf4: 685b ldr r3, [r3, #4] - 8001cf6: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 8001cfa: 68bb ldr r3, [r7, #8] - 8001cfc: 605a str r2, [r3, #4] + 8001bf6: 68bb ldr r3, [r7, #8] + 8001bf8: 685b ldr r3, [r3, #4] + 8001bfa: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 8001bfe: 68bb ldr r3, [r7, #8] + 8001c00: 605a str r2, [r3, #4] /* Set Rx descritors addresses */ WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc); - 8001cfe: 68b9 ldr r1, [r7, #8] - 8001d00: 687b ldr r3, [r7, #4] - 8001d02: 68fa ldr r2, [r7, #12] - 8001d04: 3212 adds r2, #18 - 8001d06: f843 1022 str.w r1, [r3, r2, lsl #2] + 8001c02: 68b9 ldr r1, [r7, #8] + 8001c04: 687b ldr r3, [r7, #4] + 8001c06: 68fa ldr r2, [r7, #12] + 8001c08: 3212 adds r2, #18 + 8001c0a: f843 1022 str.w r1, [r3, r2, lsl #2] if (i < ((uint32_t)ETH_RX_DESC_CNT - 1U)) - 8001d0a: 68fb ldr r3, [r7, #12] - 8001d0c: 2b02 cmp r3, #2 - 8001d0e: d80c bhi.n 8001d2a + 8001c0e: 68fb ldr r3, [r7, #12] + 8001c10: 2b02 cmp r3, #2 + 8001c12: d80c bhi.n 8001c2e { WRITE_REG(dmarxdesc->DESC3, (uint32_t)(heth->Init.RxDesc + i + 1U)); - 8001d10: 687b ldr r3, [r7, #4] - 8001d12: 6919 ldr r1, [r3, #16] - 8001d14: 68fb ldr r3, [r7, #12] - 8001d16: 1c5a adds r2, r3, #1 - 8001d18: 4613 mov r3, r2 - 8001d1a: 009b lsls r3, r3, #2 - 8001d1c: 4413 add r3, r2 - 8001d1e: 00db lsls r3, r3, #3 - 8001d20: 440b add r3, r1 - 8001d22: 461a mov r2, r3 - 8001d24: 68bb ldr r3, [r7, #8] - 8001d26: 60da str r2, [r3, #12] - 8001d28: e004 b.n 8001d34 + 8001c14: 687b ldr r3, [r7, #4] + 8001c16: 6919 ldr r1, [r3, #16] + 8001c18: 68fb ldr r3, [r7, #12] + 8001c1a: 1c5a adds r2, r3, #1 + 8001c1c: 4613 mov r3, r2 + 8001c1e: 009b lsls r3, r3, #2 + 8001c20: 4413 add r3, r2 + 8001c22: 00db lsls r3, r3, #3 + 8001c24: 440b add r3, r1 + 8001c26: 461a mov r2, r3 + 8001c28: 68bb ldr r3, [r7, #8] + 8001c2a: 60da str r2, [r3, #12] + 8001c2c: e004 b.n 8001c38 } else { WRITE_REG(dmarxdesc->DESC3, (uint32_t)(heth->Init.RxDesc)); - 8001d2a: 687b ldr r3, [r7, #4] - 8001d2c: 691b ldr r3, [r3, #16] - 8001d2e: 461a mov r2, r3 - 8001d30: 68bb ldr r3, [r7, #8] - 8001d32: 60da str r2, [r3, #12] + 8001c2e: 687b ldr r3, [r7, #4] + 8001c30: 691b ldr r3, [r3, #16] + 8001c32: 461a mov r2, r3 + 8001c34: 68bb ldr r3, [r7, #8] + 8001c36: 60da str r2, [r3, #12] for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++) - 8001d34: 68fb ldr r3, [r7, #12] - 8001d36: 3301 adds r3, #1 - 8001d38: 60fb str r3, [r7, #12] - 8001d3a: 68fb ldr r3, [r7, #12] - 8001d3c: 2b03 cmp r3, #3 - 8001d3e: d9b3 bls.n 8001ca8 + 8001c38: 68fb ldr r3, [r7, #12] + 8001c3a: 3301 adds r3, #1 + 8001c3c: 60fb str r3, [r7, #12] + 8001c3e: 68fb ldr r3, [r7, #12] + 8001c40: 2b03 cmp r3, #3 + 8001c42: d9b3 bls.n 8001bac } } WRITE_REG(heth->RxDescList.RxDescIdx, 0U); - 8001d40: 687b ldr r3, [r7, #4] - 8001d42: 2200 movs r2, #0 - 8001d44: 65da str r2, [r3, #92] ; 0x5c + 8001c44: 687b ldr r3, [r7, #4] + 8001c46: 2200 movs r2, #0 + 8001c48: 65da str r2, [r3, #92] ; 0x5c WRITE_REG(heth->RxDescList.RxDescCnt, 0U); - 8001d46: 687b ldr r3, [r7, #4] - 8001d48: 2200 movs r2, #0 - 8001d4a: 661a str r2, [r3, #96] ; 0x60 + 8001c4a: 687b ldr r3, [r7, #4] + 8001c4c: 2200 movs r2, #0 + 8001c4e: 661a str r2, [r3, #96] ; 0x60 WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U); - 8001d4c: 687b ldr r3, [r7, #4] - 8001d4e: 2200 movs r2, #0 - 8001d50: 669a str r2, [r3, #104] ; 0x68 + 8001c50: 687b ldr r3, [r7, #4] + 8001c52: 2200 movs r2, #0 + 8001c54: 669a str r2, [r3, #104] ; 0x68 WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U); - 8001d52: 687b ldr r3, [r7, #4] - 8001d54: 2200 movs r2, #0 - 8001d56: 66da str r2, [r3, #108] ; 0x6c + 8001c56: 687b ldr r3, [r7, #4] + 8001c58: 2200 movs r2, #0 + 8001c5a: 66da str r2, [r3, #108] ; 0x6c WRITE_REG(heth->RxDescList.ItMode, 0U); - 8001d58: 687b ldr r3, [r7, #4] - 8001d5a: 2200 movs r2, #0 - 8001d5c: 659a str r2, [r3, #88] ; 0x58 + 8001c5c: 687b ldr r3, [r7, #4] + 8001c5e: 2200 movs r2, #0 + 8001c60: 659a str r2, [r3, #88] ; 0x58 /* Set Receive Descriptor List Address */ WRITE_REG(heth->Instance->DMARDLAR, (uint32_t) heth->Init.RxDesc); - 8001d5e: 687b ldr r3, [r7, #4] - 8001d60: 691a ldr r2, [r3, #16] - 8001d62: 687b ldr r3, [r7, #4] - 8001d64: 681b ldr r3, [r3, #0] - 8001d66: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 8001d6a: 60da str r2, [r3, #12] + 8001c62: 687b ldr r3, [r7, #4] + 8001c64: 691a ldr r2, [r3, #16] + 8001c66: 687b ldr r3, [r7, #4] + 8001c68: 681b ldr r3, [r3, #0] + 8001c6a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 8001c6e: 60da str r2, [r3, #12] } - 8001d6c: bf00 nop - 8001d6e: 3714 adds r7, #20 - 8001d70: 46bd mov sp, r7 - 8001d72: f85d 7b04 ldr.w r7, [sp], #4 - 8001d76: 4770 bx lr + 8001c70: bf00 nop + 8001c72: 3714 adds r7, #20 + 8001c74: 46bd mov sp, r7 + 8001c76: f85d 7b04 ldr.w r7, [sp], #4 + 8001c7a: 4770 bx lr -08001d78 : +08001c7c : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8001d78: b480 push {r7} - 8001d7a: b089 sub sp, #36 ; 0x24 - 8001d7c: af00 add r7, sp, #0 - 8001d7e: 6078 str r0, [r7, #4] - 8001d80: 6039 str r1, [r7, #0] + 8001c7c: b480 push {r7} + 8001c7e: b089 sub sp, #36 ; 0x24 + 8001c80: af00 add r7, sp, #0 + 8001c82: 6078 str r0, [r7, #4] + 8001c84: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; - 8001d82: 2300 movs r3, #0 - 8001d84: 617b str r3, [r7, #20] + 8001c86: 2300 movs r3, #0 + 8001c88: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; - 8001d86: 2300 movs r3, #0 - 8001d88: 613b str r3, [r7, #16] + 8001c8a: 2300 movs r3, #0 + 8001c8c: 613b str r3, [r7, #16] uint32_t temp = 0x00U; - 8001d8a: 2300 movs r3, #0 - 8001d8c: 61bb str r3, [r7, #24] + 8001c8e: 2300 movs r3, #0 + 8001c90: 61bb str r3, [r7, #24] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) - 8001d8e: 2300 movs r3, #0 - 8001d90: 61fb str r3, [r7, #28] - 8001d92: e177 b.n 8002084 + 8001c92: 2300 movs r3, #0 + 8001c94: 61fb str r3, [r7, #28] + 8001c96: e177 b.n 8001f88 { /* Get the IO position */ ioposition = 0x01U << position; - 8001d94: 2201 movs r2, #1 - 8001d96: 69fb ldr r3, [r7, #28] - 8001d98: fa02 f303 lsl.w r3, r2, r3 - 8001d9c: 617b str r3, [r7, #20] + 8001c98: 2201 movs r2, #1 + 8001c9a: 69fb ldr r3, [r7, #28] + 8001c9c: fa02 f303 lsl.w r3, r2, r3 + 8001ca0: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 8001d9e: 683b ldr r3, [r7, #0] - 8001da0: 681b ldr r3, [r3, #0] - 8001da2: 697a ldr r2, [r7, #20] - 8001da4: 4013 ands r3, r2 - 8001da6: 613b str r3, [r7, #16] + 8001ca2: 683b ldr r3, [r7, #0] + 8001ca4: 681b ldr r3, [r3, #0] + 8001ca6: 697a ldr r2, [r7, #20] + 8001ca8: 4013 ands r3, r2 + 8001caa: 613b str r3, [r7, #16] if(iocurrent == ioposition) - 8001da8: 693a ldr r2, [r7, #16] - 8001daa: 697b ldr r3, [r7, #20] - 8001dac: 429a cmp r2, r3 - 8001dae: f040 8166 bne.w 800207e + 8001cac: 693a ldr r2, [r7, #16] + 8001cae: 697b ldr r3, [r7, #20] + 8001cb0: 429a cmp r2, r3 + 8001cb2: f040 8166 bne.w 8001f82 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ - 8001db2: 683b ldr r3, [r7, #0] - 8001db4: 685b ldr r3, [r3, #4] - 8001db6: f003 0303 and.w r3, r3, #3 - 8001dba: 2b01 cmp r3, #1 - 8001dbc: d005 beq.n 8001dca + 8001cb6: 683b ldr r3, [r7, #0] + 8001cb8: 685b ldr r3, [r3, #4] + 8001cba: f003 0303 and.w r3, r3, #3 + 8001cbe: 2b01 cmp r3, #1 + 8001cc0: d005 beq.n 8001cce (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8001dbe: 683b ldr r3, [r7, #0] - 8001dc0: 685b ldr r3, [r3, #4] - 8001dc2: f003 0303 and.w r3, r3, #3 + 8001cc2: 683b ldr r3, [r7, #0] + 8001cc4: 685b ldr r3, [r3, #4] + 8001cc6: f003 0303 and.w r3, r3, #3 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ - 8001dc6: 2b02 cmp r3, #2 - 8001dc8: d130 bne.n 8001e2c + 8001cca: 2b02 cmp r3, #2 + 8001ccc: d130 bne.n 8001d30 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8001dca: 687b ldr r3, [r7, #4] - 8001dcc: 689b ldr r3, [r3, #8] - 8001dce: 61bb str r3, [r7, #24] + 8001cce: 687b ldr r3, [r7, #4] + 8001cd0: 689b ldr r3, [r3, #8] + 8001cd2: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); - 8001dd0: 69fb ldr r3, [r7, #28] - 8001dd2: 005b lsls r3, r3, #1 - 8001dd4: 2203 movs r2, #3 - 8001dd6: fa02 f303 lsl.w r3, r2, r3 - 8001dda: 43db mvns r3, r3 - 8001ddc: 69ba ldr r2, [r7, #24] - 8001dde: 4013 ands r3, r2 - 8001de0: 61bb str r3, [r7, #24] + 8001cd4: 69fb ldr r3, [r7, #28] + 8001cd6: 005b lsls r3, r3, #1 + 8001cd8: 2203 movs r2, #3 + 8001cda: fa02 f303 lsl.w r3, r2, r3 + 8001cde: 43db mvns r3, r3 + 8001ce0: 69ba ldr r2, [r7, #24] + 8001ce2: 4013 ands r3, r2 + 8001ce4: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); - 8001de2: 683b ldr r3, [r7, #0] - 8001de4: 68da ldr r2, [r3, #12] - 8001de6: 69fb ldr r3, [r7, #28] - 8001de8: 005b lsls r3, r3, #1 - 8001dea: fa02 f303 lsl.w r3, r2, r3 - 8001dee: 69ba ldr r2, [r7, #24] - 8001df0: 4313 orrs r3, r2 - 8001df2: 61bb str r3, [r7, #24] + 8001ce6: 683b ldr r3, [r7, #0] + 8001ce8: 68da ldr r2, [r3, #12] + 8001cea: 69fb ldr r3, [r7, #28] + 8001cec: 005b lsls r3, r3, #1 + 8001cee: fa02 f303 lsl.w r3, r2, r3 + 8001cf2: 69ba ldr r2, [r7, #24] + 8001cf4: 4313 orrs r3, r2 + 8001cf6: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; - 8001df4: 687b ldr r3, [r7, #4] - 8001df6: 69ba ldr r2, [r7, #24] - 8001df8: 609a str r2, [r3, #8] + 8001cf8: 687b ldr r3, [r7, #4] + 8001cfa: 69ba ldr r2, [r7, #24] + 8001cfc: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8001dfa: 687b ldr r3, [r7, #4] - 8001dfc: 685b ldr r3, [r3, #4] - 8001dfe: 61bb str r3, [r7, #24] + 8001cfe: 687b ldr r3, [r7, #4] + 8001d00: 685b ldr r3, [r3, #4] + 8001d02: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8001e00: 2201 movs r2, #1 - 8001e02: 69fb ldr r3, [r7, #28] - 8001e04: fa02 f303 lsl.w r3, r2, r3 - 8001e08: 43db mvns r3, r3 - 8001e0a: 69ba ldr r2, [r7, #24] - 8001e0c: 4013 ands r3, r2 - 8001e0e: 61bb str r3, [r7, #24] + 8001d04: 2201 movs r2, #1 + 8001d06: 69fb ldr r3, [r7, #28] + 8001d08: fa02 f303 lsl.w r3, r2, r3 + 8001d0c: 43db mvns r3, r3 + 8001d0e: 69ba ldr r2, [r7, #24] + 8001d10: 4013 ands r3, r2 + 8001d12: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8001e10: 683b ldr r3, [r7, #0] - 8001e12: 685b ldr r3, [r3, #4] - 8001e14: 091b lsrs r3, r3, #4 - 8001e16: f003 0201 and.w r2, r3, #1 - 8001e1a: 69fb ldr r3, [r7, #28] - 8001e1c: fa02 f303 lsl.w r3, r2, r3 - 8001e20: 69ba ldr r2, [r7, #24] - 8001e22: 4313 orrs r3, r2 - 8001e24: 61bb str r3, [r7, #24] + 8001d14: 683b ldr r3, [r7, #0] + 8001d16: 685b ldr r3, [r3, #4] + 8001d18: 091b lsrs r3, r3, #4 + 8001d1a: f003 0201 and.w r2, r3, #1 + 8001d1e: 69fb ldr r3, [r7, #28] + 8001d20: fa02 f303 lsl.w r3, r2, r3 + 8001d24: 69ba ldr r2, [r7, #24] + 8001d26: 4313 orrs r3, r2 + 8001d28: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; - 8001e26: 687b ldr r3, [r7, #4] - 8001e28: 69ba ldr r2, [r7, #24] - 8001e2a: 605a str r2, [r3, #4] + 8001d2a: 687b ldr r3, [r7, #4] + 8001d2c: 69ba ldr r2, [r7, #24] + 8001d2e: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 8001e2c: 683b ldr r3, [r7, #0] - 8001e2e: 685b ldr r3, [r3, #4] - 8001e30: f003 0303 and.w r3, r3, #3 - 8001e34: 2b03 cmp r3, #3 - 8001e36: d017 beq.n 8001e68 + 8001d30: 683b ldr r3, [r7, #0] + 8001d32: 685b ldr r3, [r3, #4] + 8001d34: f003 0303 and.w r3, r3, #3 + 8001d38: 2b03 cmp r3, #3 + 8001d3a: d017 beq.n 8001d6c { /* Check the parameters */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8001e38: 687b ldr r3, [r7, #4] - 8001e3a: 68db ldr r3, [r3, #12] - 8001e3c: 61bb str r3, [r7, #24] + 8001d3c: 687b ldr r3, [r7, #4] + 8001d3e: 68db ldr r3, [r3, #12] + 8001d40: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); - 8001e3e: 69fb ldr r3, [r7, #28] - 8001e40: 005b lsls r3, r3, #1 - 8001e42: 2203 movs r2, #3 - 8001e44: fa02 f303 lsl.w r3, r2, r3 - 8001e48: 43db mvns r3, r3 - 8001e4a: 69ba ldr r2, [r7, #24] - 8001e4c: 4013 ands r3, r2 - 8001e4e: 61bb str r3, [r7, #24] + 8001d42: 69fb ldr r3, [r7, #28] + 8001d44: 005b lsls r3, r3, #1 + 8001d46: 2203 movs r2, #3 + 8001d48: fa02 f303 lsl.w r3, r2, r3 + 8001d4c: 43db mvns r3, r3 + 8001d4e: 69ba ldr r2, [r7, #24] + 8001d50: 4013 ands r3, r2 + 8001d52: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 8001e50: 683b ldr r3, [r7, #0] - 8001e52: 689a ldr r2, [r3, #8] - 8001e54: 69fb ldr r3, [r7, #28] - 8001e56: 005b lsls r3, r3, #1 - 8001e58: fa02 f303 lsl.w r3, r2, r3 - 8001e5c: 69ba ldr r2, [r7, #24] - 8001e5e: 4313 orrs r3, r2 - 8001e60: 61bb str r3, [r7, #24] + 8001d54: 683b ldr r3, [r7, #0] + 8001d56: 689a ldr r2, [r3, #8] + 8001d58: 69fb ldr r3, [r7, #28] + 8001d5a: 005b lsls r3, r3, #1 + 8001d5c: fa02 f303 lsl.w r3, r2, r3 + 8001d60: 69ba ldr r2, [r7, #24] + 8001d62: 4313 orrs r3, r2 + 8001d64: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; - 8001e62: 687b ldr r3, [r7, #4] - 8001e64: 69ba ldr r2, [r7, #24] - 8001e66: 60da str r2, [r3, #12] + 8001d66: 687b ldr r3, [r7, #4] + 8001d68: 69ba ldr r2, [r7, #24] + 8001d6a: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8001e68: 683b ldr r3, [r7, #0] - 8001e6a: 685b ldr r3, [r3, #4] - 8001e6c: f003 0303 and.w r3, r3, #3 - 8001e70: 2b02 cmp r3, #2 - 8001e72: d123 bne.n 8001ebc + 8001d6c: 683b ldr r3, [r7, #0] + 8001d6e: 685b ldr r3, [r3, #4] + 8001d70: f003 0303 and.w r3, r3, #3 + 8001d74: 2b02 cmp r3, #2 + 8001d76: d123 bne.n 8001dc0 { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; - 8001e74: 69fb ldr r3, [r7, #28] - 8001e76: 08da lsrs r2, r3, #3 - 8001e78: 687b ldr r3, [r7, #4] - 8001e7a: 3208 adds r2, #8 - 8001e7c: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8001e80: 61bb str r3, [r7, #24] + 8001d78: 69fb ldr r3, [r7, #28] + 8001d7a: 08da lsrs r2, r3, #3 + 8001d7c: 687b ldr r3, [r7, #4] + 8001d7e: 3208 adds r2, #8 + 8001d80: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8001d84: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; - 8001e82: 69fb ldr r3, [r7, #28] - 8001e84: f003 0307 and.w r3, r3, #7 - 8001e88: 009b lsls r3, r3, #2 - 8001e8a: 220f movs r2, #15 - 8001e8c: fa02 f303 lsl.w r3, r2, r3 - 8001e90: 43db mvns r3, r3 - 8001e92: 69ba ldr r2, [r7, #24] - 8001e94: 4013 ands r3, r2 - 8001e96: 61bb str r3, [r7, #24] + 8001d86: 69fb ldr r3, [r7, #28] + 8001d88: f003 0307 and.w r3, r3, #7 + 8001d8c: 009b lsls r3, r3, #2 + 8001d8e: 220f movs r2, #15 + 8001d90: fa02 f303 lsl.w r3, r2, r3 + 8001d94: 43db mvns r3, r3 + 8001d96: 69ba ldr r2, [r7, #24] + 8001d98: 4013 ands r3, r2 + 8001d9a: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); - 8001e98: 683b ldr r3, [r7, #0] - 8001e9a: 691a ldr r2, [r3, #16] - 8001e9c: 69fb ldr r3, [r7, #28] - 8001e9e: f003 0307 and.w r3, r3, #7 - 8001ea2: 009b lsls r3, r3, #2 - 8001ea4: fa02 f303 lsl.w r3, r2, r3 - 8001ea8: 69ba ldr r2, [r7, #24] - 8001eaa: 4313 orrs r3, r2 - 8001eac: 61bb str r3, [r7, #24] + 8001d9c: 683b ldr r3, [r7, #0] + 8001d9e: 691a ldr r2, [r3, #16] + 8001da0: 69fb ldr r3, [r7, #28] + 8001da2: f003 0307 and.w r3, r3, #7 + 8001da6: 009b lsls r3, r3, #2 + 8001da8: fa02 f303 lsl.w r3, r2, r3 + 8001dac: 69ba ldr r2, [r7, #24] + 8001dae: 4313 orrs r3, r2 + 8001db0: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; - 8001eae: 69fb ldr r3, [r7, #28] - 8001eb0: 08da lsrs r2, r3, #3 - 8001eb2: 687b ldr r3, [r7, #4] - 8001eb4: 3208 adds r2, #8 - 8001eb6: 69b9 ldr r1, [r7, #24] - 8001eb8: f843 1022 str.w r1, [r3, r2, lsl #2] + 8001db2: 69fb ldr r3, [r7, #28] + 8001db4: 08da lsrs r2, r3, #3 + 8001db6: 687b ldr r3, [r7, #4] + 8001db8: 3208 adds r2, #8 + 8001dba: 69b9 ldr r1, [r7, #24] + 8001dbc: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8001ebc: 687b ldr r3, [r7, #4] - 8001ebe: 681b ldr r3, [r3, #0] - 8001ec0: 61bb str r3, [r7, #24] + 8001dc0: 687b ldr r3, [r7, #4] + 8001dc2: 681b ldr r3, [r3, #0] + 8001dc4: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); - 8001ec2: 69fb ldr r3, [r7, #28] - 8001ec4: 005b lsls r3, r3, #1 - 8001ec6: 2203 movs r2, #3 - 8001ec8: fa02 f303 lsl.w r3, r2, r3 - 8001ecc: 43db mvns r3, r3 - 8001ece: 69ba ldr r2, [r7, #24] - 8001ed0: 4013 ands r3, r2 - 8001ed2: 61bb str r3, [r7, #24] + 8001dc6: 69fb ldr r3, [r7, #28] + 8001dc8: 005b lsls r3, r3, #1 + 8001dca: 2203 movs r2, #3 + 8001dcc: fa02 f303 lsl.w r3, r2, r3 + 8001dd0: 43db mvns r3, r3 + 8001dd2: 69ba ldr r2, [r7, #24] + 8001dd4: 4013 ands r3, r2 + 8001dd6: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 8001ed4: 683b ldr r3, [r7, #0] - 8001ed6: 685b ldr r3, [r3, #4] - 8001ed8: f003 0203 and.w r2, r3, #3 - 8001edc: 69fb ldr r3, [r7, #28] - 8001ede: 005b lsls r3, r3, #1 - 8001ee0: fa02 f303 lsl.w r3, r2, r3 - 8001ee4: 69ba ldr r2, [r7, #24] - 8001ee6: 4313 orrs r3, r2 - 8001ee8: 61bb str r3, [r7, #24] + 8001dd8: 683b ldr r3, [r7, #0] + 8001dda: 685b ldr r3, [r3, #4] + 8001ddc: f003 0203 and.w r2, r3, #3 + 8001de0: 69fb ldr r3, [r7, #28] + 8001de2: 005b lsls r3, r3, #1 + 8001de4: fa02 f303 lsl.w r3, r2, r3 + 8001de8: 69ba ldr r2, [r7, #24] + 8001dea: 4313 orrs r3, r2 + 8001dec: 61bb str r3, [r7, #24] GPIOx->MODER = temp; - 8001eea: 687b ldr r3, [r7, #4] - 8001eec: 69ba ldr r2, [r7, #24] - 8001eee: 601a str r2, [r3, #0] + 8001dee: 687b ldr r3, [r7, #4] + 8001df0: 69ba ldr r2, [r7, #24] + 8001df2: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 8001ef0: 683b ldr r3, [r7, #0] - 8001ef2: 685b ldr r3, [r3, #4] - 8001ef4: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 8001ef8: 2b00 cmp r3, #0 - 8001efa: f000 80c0 beq.w 800207e + 8001df4: 683b ldr r3, [r7, #0] + 8001df6: 685b ldr r3, [r3, #4] + 8001df8: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 8001dfc: 2b00 cmp r3, #0 + 8001dfe: f000 80c0 beq.w 8001f82 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8001efe: 2300 movs r3, #0 - 8001f00: 60fb str r3, [r7, #12] - 8001f02: 4b66 ldr r3, [pc, #408] ; (800209c ) - 8001f04: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001f06: 4a65 ldr r2, [pc, #404] ; (800209c ) - 8001f08: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8001f0c: 6453 str r3, [r2, #68] ; 0x44 - 8001f0e: 4b63 ldr r3, [pc, #396] ; (800209c ) - 8001f10: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001f12: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8001f16: 60fb str r3, [r7, #12] - 8001f18: 68fb ldr r3, [r7, #12] + 8001e02: 2300 movs r3, #0 + 8001e04: 60fb str r3, [r7, #12] + 8001e06: 4b66 ldr r3, [pc, #408] ; (8001fa0 ) + 8001e08: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001e0a: 4a65 ldr r2, [pc, #404] ; (8001fa0 ) + 8001e0c: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8001e10: 6453 str r3, [r2, #68] ; 0x44 + 8001e12: 4b63 ldr r3, [pc, #396] ; (8001fa0 ) + 8001e14: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001e16: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8001e1a: 60fb str r3, [r7, #12] + 8001e1c: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; - 8001f1a: 4a61 ldr r2, [pc, #388] ; (80020a0 ) - 8001f1c: 69fb ldr r3, [r7, #28] - 8001f1e: 089b lsrs r3, r3, #2 - 8001f20: 3302 adds r3, #2 - 8001f22: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8001f26: 61bb str r3, [r7, #24] + 8001e1e: 4a61 ldr r2, [pc, #388] ; (8001fa4 ) + 8001e20: 69fb ldr r3, [r7, #28] + 8001e22: 089b lsrs r3, r3, #2 + 8001e24: 3302 adds r3, #2 + 8001e26: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8001e2a: 61bb str r3, [r7, #24] temp &= ~(0x0FU << (4U * (position & 0x03U))); - 8001f28: 69fb ldr r3, [r7, #28] - 8001f2a: f003 0303 and.w r3, r3, #3 - 8001f2e: 009b lsls r3, r3, #2 - 8001f30: 220f movs r2, #15 - 8001f32: fa02 f303 lsl.w r3, r2, r3 + 8001e2c: 69fb ldr r3, [r7, #28] + 8001e2e: f003 0303 and.w r3, r3, #3 + 8001e32: 009b lsls r3, r3, #2 + 8001e34: 220f movs r2, #15 + 8001e36: fa02 f303 lsl.w r3, r2, r3 + 8001e3a: 43db mvns r3, r3 + 8001e3c: 69ba ldr r2, [r7, #24] + 8001e3e: 4013 ands r3, r2 + 8001e40: 61bb str r3, [r7, #24] + temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); + 8001e42: 687b ldr r3, [r7, #4] + 8001e44: 4a58 ldr r2, [pc, #352] ; (8001fa8 ) + 8001e46: 4293 cmp r3, r2 + 8001e48: d037 beq.n 8001eba + 8001e4a: 687b ldr r3, [r7, #4] + 8001e4c: 4a57 ldr r2, [pc, #348] ; (8001fac ) + 8001e4e: 4293 cmp r3, r2 + 8001e50: d031 beq.n 8001eb6 + 8001e52: 687b ldr r3, [r7, #4] + 8001e54: 4a56 ldr r2, [pc, #344] ; (8001fb0 ) + 8001e56: 4293 cmp r3, r2 + 8001e58: d02b beq.n 8001eb2 + 8001e5a: 687b ldr r3, [r7, #4] + 8001e5c: 4a55 ldr r2, [pc, #340] ; (8001fb4 ) + 8001e5e: 4293 cmp r3, r2 + 8001e60: d025 beq.n 8001eae + 8001e62: 687b ldr r3, [r7, #4] + 8001e64: 4a54 ldr r2, [pc, #336] ; (8001fb8 ) + 8001e66: 4293 cmp r3, r2 + 8001e68: d01f beq.n 8001eaa + 8001e6a: 687b ldr r3, [r7, #4] + 8001e6c: 4a53 ldr r2, [pc, #332] ; (8001fbc ) + 8001e6e: 4293 cmp r3, r2 + 8001e70: d019 beq.n 8001ea6 + 8001e72: 687b ldr r3, [r7, #4] + 8001e74: 4a52 ldr r2, [pc, #328] ; (8001fc0 ) + 8001e76: 4293 cmp r3, r2 + 8001e78: d013 beq.n 8001ea2 + 8001e7a: 687b ldr r3, [r7, #4] + 8001e7c: 4a51 ldr r2, [pc, #324] ; (8001fc4 ) + 8001e7e: 4293 cmp r3, r2 + 8001e80: d00d beq.n 8001e9e + 8001e82: 687b ldr r3, [r7, #4] + 8001e84: 4a50 ldr r2, [pc, #320] ; (8001fc8 ) + 8001e86: 4293 cmp r3, r2 + 8001e88: d007 beq.n 8001e9a + 8001e8a: 687b ldr r3, [r7, #4] + 8001e8c: 4a4f ldr r2, [pc, #316] ; (8001fcc ) + 8001e8e: 4293 cmp r3, r2 + 8001e90: d101 bne.n 8001e96 + 8001e92: 2309 movs r3, #9 + 8001e94: e012 b.n 8001ebc + 8001e96: 230a movs r3, #10 + 8001e98: e010 b.n 8001ebc + 8001e9a: 2308 movs r3, #8 + 8001e9c: e00e b.n 8001ebc + 8001e9e: 2307 movs r3, #7 + 8001ea0: e00c b.n 8001ebc + 8001ea2: 2306 movs r3, #6 + 8001ea4: e00a b.n 8001ebc + 8001ea6: 2305 movs r3, #5 + 8001ea8: e008 b.n 8001ebc + 8001eaa: 2304 movs r3, #4 + 8001eac: e006 b.n 8001ebc + 8001eae: 2303 movs r3, #3 + 8001eb0: e004 b.n 8001ebc + 8001eb2: 2302 movs r3, #2 + 8001eb4: e002 b.n 8001ebc + 8001eb6: 2301 movs r3, #1 + 8001eb8: e000 b.n 8001ebc + 8001eba: 2300 movs r3, #0 + 8001ebc: 69fa ldr r2, [r7, #28] + 8001ebe: f002 0203 and.w r2, r2, #3 + 8001ec2: 0092 lsls r2, r2, #2 + 8001ec4: 4093 lsls r3, r2 + 8001ec6: 69ba ldr r2, [r7, #24] + 8001ec8: 4313 orrs r3, r2 + 8001eca: 61bb str r3, [r7, #24] + SYSCFG->EXTICR[position >> 2U] = temp; + 8001ecc: 4935 ldr r1, [pc, #212] ; (8001fa4 ) + 8001ece: 69fb ldr r3, [r7, #28] + 8001ed0: 089b lsrs r3, r3, #2 + 8001ed2: 3302 adds r3, #2 + 8001ed4: 69ba ldr r2, [r7, #24] + 8001ed6: f841 2023 str.w r2, [r1, r3, lsl #2] + + /* Clear Rising Falling edge configuration */ + temp = EXTI->RTSR; + 8001eda: 4b3d ldr r3, [pc, #244] ; (8001fd0 ) + 8001edc: 689b ldr r3, [r3, #8] + 8001ede: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8001ee0: 693b ldr r3, [r7, #16] + 8001ee2: 43db mvns r3, r3 + 8001ee4: 69ba ldr r2, [r7, #24] + 8001ee6: 4013 ands r3, r2 + 8001ee8: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) + 8001eea: 683b ldr r3, [r7, #0] + 8001eec: 685b ldr r3, [r3, #4] + 8001eee: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 8001ef2: 2b00 cmp r3, #0 + 8001ef4: d003 beq.n 8001efe + { + temp |= iocurrent; + 8001ef6: 69ba ldr r2, [r7, #24] + 8001ef8: 693b ldr r3, [r7, #16] + 8001efa: 4313 orrs r3, r2 + 8001efc: 61bb str r3, [r7, #24] + } + EXTI->RTSR = temp; + 8001efe: 4a34 ldr r2, [pc, #208] ; (8001fd0 ) + 8001f00: 69bb ldr r3, [r7, #24] + 8001f02: 6093 str r3, [r2, #8] + + temp = EXTI->FTSR; + 8001f04: 4b32 ldr r3, [pc, #200] ; (8001fd0 ) + 8001f06: 68db ldr r3, [r3, #12] + 8001f08: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8001f0a: 693b ldr r3, [r7, #16] + 8001f0c: 43db mvns r3, r3 + 8001f0e: 69ba ldr r2, [r7, #24] + 8001f10: 4013 ands r3, r2 + 8001f12: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) + 8001f14: 683b ldr r3, [r7, #0] + 8001f16: 685b ldr r3, [r3, #4] + 8001f18: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 8001f1c: 2b00 cmp r3, #0 + 8001f1e: d003 beq.n 8001f28 + { + temp |= iocurrent; + 8001f20: 69ba ldr r2, [r7, #24] + 8001f22: 693b ldr r3, [r7, #16] + 8001f24: 4313 orrs r3, r2 + 8001f26: 61bb str r3, [r7, #24] + } + EXTI->FTSR = temp; + 8001f28: 4a29 ldr r2, [pc, #164] ; (8001fd0 ) + 8001f2a: 69bb ldr r3, [r7, #24] + 8001f2c: 60d3 str r3, [r2, #12] + + temp = EXTI->EMR; + 8001f2e: 4b28 ldr r3, [pc, #160] ; (8001fd0 ) + 8001f30: 685b ldr r3, [r3, #4] + 8001f32: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8001f34: 693b ldr r3, [r7, #16] 8001f36: 43db mvns r3, r3 8001f38: 69ba ldr r2, [r7, #24] 8001f3a: 4013 ands r3, r2 8001f3c: 61bb str r3, [r7, #24] - temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); - 8001f3e: 687b ldr r3, [r7, #4] - 8001f40: 4a58 ldr r2, [pc, #352] ; (80020a4 ) - 8001f42: 4293 cmp r3, r2 - 8001f44: d037 beq.n 8001fb6 - 8001f46: 687b ldr r3, [r7, #4] - 8001f48: 4a57 ldr r2, [pc, #348] ; (80020a8 ) - 8001f4a: 4293 cmp r3, r2 - 8001f4c: d031 beq.n 8001fb2 - 8001f4e: 687b ldr r3, [r7, #4] - 8001f50: 4a56 ldr r2, [pc, #344] ; (80020ac ) - 8001f52: 4293 cmp r3, r2 - 8001f54: d02b beq.n 8001fae - 8001f56: 687b ldr r3, [r7, #4] - 8001f58: 4a55 ldr r2, [pc, #340] ; (80020b0 ) - 8001f5a: 4293 cmp r3, r2 - 8001f5c: d025 beq.n 8001faa - 8001f5e: 687b ldr r3, [r7, #4] - 8001f60: 4a54 ldr r2, [pc, #336] ; (80020b4 ) - 8001f62: 4293 cmp r3, r2 - 8001f64: d01f beq.n 8001fa6 - 8001f66: 687b ldr r3, [r7, #4] - 8001f68: 4a53 ldr r2, [pc, #332] ; (80020b8 ) - 8001f6a: 4293 cmp r3, r2 - 8001f6c: d019 beq.n 8001fa2 - 8001f6e: 687b ldr r3, [r7, #4] - 8001f70: 4a52 ldr r2, [pc, #328] ; (80020bc ) - 8001f72: 4293 cmp r3, r2 - 8001f74: d013 beq.n 8001f9e - 8001f76: 687b ldr r3, [r7, #4] - 8001f78: 4a51 ldr r2, [pc, #324] ; (80020c0 ) - 8001f7a: 4293 cmp r3, r2 - 8001f7c: d00d beq.n 8001f9a - 8001f7e: 687b ldr r3, [r7, #4] - 8001f80: 4a50 ldr r2, [pc, #320] ; (80020c4 ) - 8001f82: 4293 cmp r3, r2 - 8001f84: d007 beq.n 8001f96 - 8001f86: 687b ldr r3, [r7, #4] - 8001f88: 4a4f ldr r2, [pc, #316] ; (80020c8 ) - 8001f8a: 4293 cmp r3, r2 - 8001f8c: d101 bne.n 8001f92 - 8001f8e: 2309 movs r3, #9 - 8001f90: e012 b.n 8001fb8 - 8001f92: 230a movs r3, #10 - 8001f94: e010 b.n 8001fb8 - 8001f96: 2308 movs r3, #8 - 8001f98: e00e b.n 8001fb8 - 8001f9a: 2307 movs r3, #7 - 8001f9c: e00c b.n 8001fb8 - 8001f9e: 2306 movs r3, #6 - 8001fa0: e00a b.n 8001fb8 - 8001fa2: 2305 movs r3, #5 - 8001fa4: e008 b.n 8001fb8 - 8001fa6: 2304 movs r3, #4 - 8001fa8: e006 b.n 8001fb8 - 8001faa: 2303 movs r3, #3 - 8001fac: e004 b.n 8001fb8 - 8001fae: 2302 movs r3, #2 - 8001fb0: e002 b.n 8001fb8 - 8001fb2: 2301 movs r3, #1 - 8001fb4: e000 b.n 8001fb8 - 8001fb6: 2300 movs r3, #0 - 8001fb8: 69fa ldr r2, [r7, #28] - 8001fba: f002 0203 and.w r2, r2, #3 - 8001fbe: 0092 lsls r2, r2, #2 - 8001fc0: 4093 lsls r3, r2 - 8001fc2: 69ba ldr r2, [r7, #24] - 8001fc4: 4313 orrs r3, r2 - 8001fc6: 61bb str r3, [r7, #24] - SYSCFG->EXTICR[position >> 2U] = temp; - 8001fc8: 4935 ldr r1, [pc, #212] ; (80020a0 ) - 8001fca: 69fb ldr r3, [r7, #28] - 8001fcc: 089b lsrs r3, r3, #2 - 8001fce: 3302 adds r3, #2 - 8001fd0: 69ba ldr r2, [r7, #24] - 8001fd2: f841 2023 str.w r2, [r1, r3, lsl #2] - - /* Clear Rising Falling edge configuration */ - temp = EXTI->RTSR; - 8001fd6: 4b3d ldr r3, [pc, #244] ; (80020cc ) - 8001fd8: 689b ldr r3, [r3, #8] - 8001fda: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)iocurrent); - 8001fdc: 693b ldr r3, [r7, #16] - 8001fde: 43db mvns r3, r3 - 8001fe0: 69ba ldr r2, [r7, #24] - 8001fe2: 4013 ands r3, r2 - 8001fe4: 61bb str r3, [r7, #24] - if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 8001fe6: 683b ldr r3, [r7, #0] - 8001fe8: 685b ldr r3, [r3, #4] - 8001fea: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8001fee: 2b00 cmp r3, #0 - 8001ff0: d003 beq.n 8001ffa - { - temp |= iocurrent; - 8001ff2: 69ba ldr r2, [r7, #24] - 8001ff4: 693b ldr r3, [r7, #16] - 8001ff6: 4313 orrs r3, r2 - 8001ff8: 61bb str r3, [r7, #24] - } - EXTI->RTSR = temp; - 8001ffa: 4a34 ldr r2, [pc, #208] ; (80020cc ) - 8001ffc: 69bb ldr r3, [r7, #24] - 8001ffe: 6093 str r3, [r2, #8] - - temp = EXTI->FTSR; - 8002000: 4b32 ldr r3, [pc, #200] ; (80020cc ) - 8002002: 68db ldr r3, [r3, #12] - 8002004: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)iocurrent); - 8002006: 693b ldr r3, [r7, #16] - 8002008: 43db mvns r3, r3 - 800200a: 69ba ldr r2, [r7, #24] - 800200c: 4013 ands r3, r2 - 800200e: 61bb str r3, [r7, #24] - if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 8002010: 683b ldr r3, [r7, #0] - 8002012: 685b ldr r3, [r3, #4] - 8002014: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 8002018: 2b00 cmp r3, #0 - 800201a: d003 beq.n 8002024 - { - temp |= iocurrent; - 800201c: 69ba ldr r2, [r7, #24] - 800201e: 693b ldr r3, [r7, #16] - 8002020: 4313 orrs r3, r2 - 8002022: 61bb str r3, [r7, #24] - } - EXTI->FTSR = temp; - 8002024: 4a29 ldr r2, [pc, #164] ; (80020cc ) - 8002026: 69bb ldr r3, [r7, #24] - 8002028: 60d3 str r3, [r2, #12] - - temp = EXTI->EMR; - 800202a: 4b28 ldr r3, [pc, #160] ; (80020cc ) - 800202c: 685b ldr r3, [r3, #4] - 800202e: 61bb str r3, [r7, #24] - temp &= ~((uint32_t)iocurrent); - 8002030: 693b ldr r3, [r7, #16] - 8002032: 43db mvns r3, r3 - 8002034: 69ba ldr r2, [r7, #24] - 8002036: 4013 ands r3, r2 - 8002038: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 800203a: 683b ldr r3, [r7, #0] - 800203c: 685b ldr r3, [r3, #4] - 800203e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002042: 2b00 cmp r3, #0 - 8002044: d003 beq.n 800204e + 8001f3e: 683b ldr r3, [r7, #0] + 8001f40: 685b ldr r3, [r3, #4] + 8001f42: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8001f46: 2b00 cmp r3, #0 + 8001f48: d003 beq.n 8001f52 { temp |= iocurrent; - 8002046: 69ba ldr r2, [r7, #24] - 8002048: 693b ldr r3, [r7, #16] - 800204a: 4313 orrs r3, r2 - 800204c: 61bb str r3, [r7, #24] + 8001f4a: 69ba ldr r2, [r7, #24] + 8001f4c: 693b ldr r3, [r7, #16] + 8001f4e: 4313 orrs r3, r2 + 8001f50: 61bb str r3, [r7, #24] } EXTI->EMR = temp; - 800204e: 4a1f ldr r2, [pc, #124] ; (80020cc ) - 8002050: 69bb ldr r3, [r7, #24] - 8002052: 6053 str r3, [r2, #4] + 8001f52: 4a1f ldr r2, [pc, #124] ; (8001fd0 ) + 8001f54: 69bb ldr r3, [r7, #24] + 8001f56: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8002054: 4b1d ldr r3, [pc, #116] ; (80020cc ) - 8002056: 681b ldr r3, [r3, #0] - 8002058: 61bb str r3, [r7, #24] + 8001f58: 4b1d ldr r3, [pc, #116] ; (8001fd0 ) + 8001f5a: 681b ldr r3, [r3, #0] + 8001f5c: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 800205a: 693b ldr r3, [r7, #16] - 800205c: 43db mvns r3, r3 - 800205e: 69ba ldr r2, [r7, #24] - 8002060: 4013 ands r3, r2 - 8002062: 61bb str r3, [r7, #24] + 8001f5e: 693b ldr r3, [r7, #16] + 8001f60: 43db mvns r3, r3 + 8001f62: 69ba ldr r2, [r7, #24] + 8001f64: 4013 ands r3, r2 + 8001f66: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 8002064: 683b ldr r3, [r7, #0] - 8002066: 685b ldr r3, [r3, #4] - 8002068: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 800206c: 2b00 cmp r3, #0 - 800206e: d003 beq.n 8002078 + 8001f68: 683b ldr r3, [r7, #0] + 8001f6a: 685b ldr r3, [r3, #4] + 8001f6c: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8001f70: 2b00 cmp r3, #0 + 8001f72: d003 beq.n 8001f7c { temp |= iocurrent; - 8002070: 69ba ldr r2, [r7, #24] - 8002072: 693b ldr r3, [r7, #16] - 8002074: 4313 orrs r3, r2 - 8002076: 61bb str r3, [r7, #24] + 8001f74: 69ba ldr r2, [r7, #24] + 8001f76: 693b ldr r3, [r7, #16] + 8001f78: 4313 orrs r3, r2 + 8001f7a: 61bb str r3, [r7, #24] } EXTI->IMR = temp; - 8002078: 4a14 ldr r2, [pc, #80] ; (80020cc ) - 800207a: 69bb ldr r3, [r7, #24] - 800207c: 6013 str r3, [r2, #0] + 8001f7c: 4a14 ldr r2, [pc, #80] ; (8001fd0 ) + 8001f7e: 69bb ldr r3, [r7, #24] + 8001f80: 6013 str r3, [r2, #0] for(position = 0U; position < GPIO_NUMBER; position++) - 800207e: 69fb ldr r3, [r7, #28] - 8002080: 3301 adds r3, #1 - 8002082: 61fb str r3, [r7, #28] - 8002084: 69fb ldr r3, [r7, #28] - 8002086: 2b0f cmp r3, #15 - 8002088: f67f ae84 bls.w 8001d94 + 8001f82: 69fb ldr r3, [r7, #28] + 8001f84: 3301 adds r3, #1 + 8001f86: 61fb str r3, [r7, #28] + 8001f88: 69fb ldr r3, [r7, #28] + 8001f8a: 2b0f cmp r3, #15 + 8001f8c: f67f ae84 bls.w 8001c98 } } } } - 800208c: bf00 nop - 800208e: bf00 nop - 8002090: 3724 adds r7, #36 ; 0x24 - 8002092: 46bd mov sp, r7 - 8002094: f85d 7b04 ldr.w r7, [sp], #4 - 8002098: 4770 bx lr - 800209a: bf00 nop - 800209c: 40023800 .word 0x40023800 - 80020a0: 40013800 .word 0x40013800 - 80020a4: 40020000 .word 0x40020000 - 80020a8: 40020400 .word 0x40020400 - 80020ac: 40020800 .word 0x40020800 - 80020b0: 40020c00 .word 0x40020c00 - 80020b4: 40021000 .word 0x40021000 - 80020b8: 40021400 .word 0x40021400 - 80020bc: 40021800 .word 0x40021800 - 80020c0: 40021c00 .word 0x40021c00 - 80020c4: 40022000 .word 0x40022000 - 80020c8: 40022400 .word 0x40022400 - 80020cc: 40013c00 .word 0x40013c00 + 8001f90: bf00 nop + 8001f92: bf00 nop + 8001f94: 3724 adds r7, #36 ; 0x24 + 8001f96: 46bd mov sp, r7 + 8001f98: f85d 7b04 ldr.w r7, [sp], #4 + 8001f9c: 4770 bx lr + 8001f9e: bf00 nop + 8001fa0: 40023800 .word 0x40023800 + 8001fa4: 40013800 .word 0x40013800 + 8001fa8: 40020000 .word 0x40020000 + 8001fac: 40020400 .word 0x40020400 + 8001fb0: 40020800 .word 0x40020800 + 8001fb4: 40020c00 .word 0x40020c00 + 8001fb8: 40021000 .word 0x40021000 + 8001fbc: 40021400 .word 0x40021400 + 8001fc0: 40021800 .word 0x40021800 + 8001fc4: 40021c00 .word 0x40021c00 + 8001fc8: 40022000 .word 0x40022000 + 8001fcc: 40022400 .word 0x40022400 + 8001fd0: 40013c00 .word 0x40013c00 -080020d0 : +08001fd4 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 80020d0: b480 push {r7} - 80020d2: b083 sub sp, #12 - 80020d4: af00 add r7, sp, #0 - 80020d6: 6078 str r0, [r7, #4] - 80020d8: 460b mov r3, r1 - 80020da: 807b strh r3, [r7, #2] - 80020dc: 4613 mov r3, r2 - 80020de: 707b strb r3, [r7, #1] + 8001fd4: b480 push {r7} + 8001fd6: b083 sub sp, #12 + 8001fd8: af00 add r7, sp, #0 + 8001fda: 6078 str r0, [r7, #4] + 8001fdc: 460b mov r3, r1 + 8001fde: 807b strh r3, [r7, #2] + 8001fe0: 4613 mov r3, r2 + 8001fe2: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) - 80020e0: 787b ldrb r3, [r7, #1] - 80020e2: 2b00 cmp r3, #0 - 80020e4: d003 beq.n 80020ee + 8001fe4: 787b ldrb r3, [r7, #1] + 8001fe6: 2b00 cmp r3, #0 + 8001fe8: d003 beq.n 8001ff2 { GPIOx->BSRR = GPIO_Pin; - 80020e6: 887a ldrh r2, [r7, #2] - 80020e8: 687b ldr r3, [r7, #4] - 80020ea: 619a str r2, [r3, #24] + 8001fea: 887a ldrh r2, [r7, #2] + 8001fec: 687b ldr r3, [r7, #4] + 8001fee: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } - 80020ec: e003 b.n 80020f6 + 8001ff0: e003 b.n 8001ffa GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; - 80020ee: 887b ldrh r3, [r7, #2] - 80020f0: 041a lsls r2, r3, #16 - 80020f2: 687b ldr r3, [r7, #4] - 80020f4: 619a str r2, [r3, #24] + 8001ff2: 887b ldrh r3, [r7, #2] + 8001ff4: 041a lsls r2, r3, #16 + 8001ff6: 687b ldr r3, [r7, #4] + 8001ff8: 619a str r2, [r3, #24] } - 80020f6: bf00 nop - 80020f8: 370c adds r7, #12 - 80020fa: 46bd mov sp, r7 - 80020fc: f85d 7b04 ldr.w r7, [sp], #4 - 8002100: 4770 bx lr + 8001ffa: bf00 nop + 8001ffc: 370c adds r7, #12 + 8001ffe: 46bd mov sp, r7 + 8002000: f85d 7b04 ldr.w r7, [sp], #4 + 8002004: 4770 bx lr -08002102 : +08002006 : * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. * @param GPIO_Pin Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { - 8002102: b480 push {r7} - 8002104: b085 sub sp, #20 - 8002106: af00 add r7, sp, #0 - 8002108: 6078 str r0, [r7, #4] - 800210a: 460b mov r3, r1 - 800210c: 807b strh r3, [r7, #2] + 8002006: b480 push {r7} + 8002008: b085 sub sp, #20 + 800200a: af00 add r7, sp, #0 + 800200c: 6078 str r0, [r7, #4] + 800200e: 460b mov r3, r1 + 8002010: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 800210e: 687b ldr r3, [r7, #4] - 8002110: 695b ldr r3, [r3, #20] - 8002112: 60fb str r3, [r7, #12] + 8002012: 687b ldr r3, [r7, #4] + 8002014: 695b ldr r3, [r3, #20] + 8002016: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 8002114: 887a ldrh r2, [r7, #2] - 8002116: 68fb ldr r3, [r7, #12] - 8002118: 4013 ands r3, r2 - 800211a: 041a lsls r2, r3, #16 - 800211c: 68fb ldr r3, [r7, #12] - 800211e: 43d9 mvns r1, r3 - 8002120: 887b ldrh r3, [r7, #2] - 8002122: 400b ands r3, r1 - 8002124: 431a orrs r2, r3 - 8002126: 687b ldr r3, [r7, #4] - 8002128: 619a str r2, [r3, #24] + 8002018: 887a ldrh r2, [r7, #2] + 800201a: 68fb ldr r3, [r7, #12] + 800201c: 4013 ands r3, r2 + 800201e: 041a lsls r2, r3, #16 + 8002020: 68fb ldr r3, [r7, #12] + 8002022: 43d9 mvns r1, r3 + 8002024: 887b ldrh r3, [r7, #2] + 8002026: 400b ands r3, r1 + 8002028: 431a orrs r2, r3 + 800202a: 687b ldr r3, [r7, #4] + 800202c: 619a str r2, [r3, #24] } - 800212a: bf00 nop - 800212c: 3714 adds r7, #20 - 800212e: 46bd mov sp, r7 - 8002130: f85d 7b04 ldr.w r7, [sp], #4 - 8002134: 4770 bx lr + 800202e: bf00 nop + 8002030: 3714 adds r7, #20 + 8002032: 46bd mov sp, r7 + 8002034: f85d 7b04 ldr.w r7, [sp], #4 + 8002038: 4770 bx lr -08002136 : +0800203a : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { - 8002136: b580 push {r7, lr} - 8002138: b086 sub sp, #24 - 800213a: af02 add r7, sp, #8 - 800213c: 6078 str r0, [r7, #4] + 800203a: b580 push {r7, lr} + 800203c: b086 sub sp, #24 + 800203e: af02 add r7, sp, #8 + 8002040: 6078 str r0, [r7, #4] const USB_OTG_GlobalTypeDef *USBx; #endif /* defined (USB_OTG_FS) */ uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) - 800213e: 687b ldr r3, [r7, #4] - 8002140: 2b00 cmp r3, #0 - 8002142: d101 bne.n 8002148 + 8002042: 687b ldr r3, [r7, #4] + 8002044: 2b00 cmp r3, #0 + 8002046: d101 bne.n 800204c { return HAL_ERROR; - 8002144: 2301 movs r3, #1 - 8002146: e101 b.n 800234c + 8002048: 2301 movs r3, #1 + 800204a: e101 b.n 8002250 /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); #if defined (USB_OTG_FS) USBx = hpcd->Instance; - 8002148: 687b ldr r3, [r7, #4] - 800214a: 681b ldr r3, [r3, #0] - 800214c: 60bb str r3, [r7, #8] + 800204c: 687b ldr r3, [r7, #4] + 800204e: 681b ldr r3, [r3, #0] + 8002050: 60bb str r3, [r7, #8] #endif /* defined (USB_OTG_FS) */ if (hpcd->State == HAL_PCD_STATE_RESET) - 800214e: 687b ldr r3, [r7, #4] - 8002150: f893 3495 ldrb.w r3, [r3, #1173] ; 0x495 - 8002154: b2db uxtb r3, r3 - 8002156: 2b00 cmp r3, #0 - 8002158: d106 bne.n 8002168 + 8002052: 687b ldr r3, [r7, #4] + 8002054: f893 3495 ldrb.w r3, [r3, #1173] ; 0x495 + 8002058: b2db uxtb r3, r3 + 800205a: 2b00 cmp r3, #0 + 800205c: d106 bne.n 800206c { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; - 800215a: 687b ldr r3, [r7, #4] - 800215c: 2200 movs r2, #0 - 800215e: f883 2494 strb.w r2, [r3, #1172] ; 0x494 + 800205e: 687b ldr r3, [r7, #4] + 8002060: 2200 movs r2, #0 + 8002062: f883 2494 strb.w r2, [r3, #1172] ; 0x494 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); - 8002162: 6878 ldr r0, [r7, #4] - 8002164: f7fe ffb4 bl 80010d0 + 8002066: 6878 ldr r0, [r7, #4] + 8002068: f7ff f87c bl 8001164 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; - 8002168: 687b ldr r3, [r7, #4] - 800216a: 2203 movs r2, #3 - 800216c: f883 2495 strb.w r2, [r3, #1173] ; 0x495 + 800206c: 687b ldr r3, [r7, #4] + 800206e: 2203 movs r2, #3 + 8002070: f883 2495 strb.w r2, [r3, #1173] ; 0x495 #if defined (USB_OTG_FS) /* Disable DMA mode for FS instance */ if (USBx == USB_OTG_FS) - 8002170: 68bb ldr r3, [r7, #8] - 8002172: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8002176: d102 bne.n 800217e + 8002074: 68bb ldr r3, [r7, #8] + 8002076: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 800207a: d102 bne.n 8002082 { hpcd->Init.dma_enable = 0U; - 8002178: 687b ldr r3, [r7, #4] - 800217a: 2200 movs r2, #0 - 800217c: 719a strb r2, [r3, #6] + 800207c: 687b ldr r3, [r7, #4] + 800207e: 2200 movs r2, #0 + 8002080: 719a strb r2, [r3, #6] } #endif /* defined (USB_OTG_FS) */ /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); - 800217e: 687b ldr r3, [r7, #4] - 8002180: 681b ldr r3, [r3, #0] - 8002182: 4618 mov r0, r3 - 8002184: f001 feb0 bl 8003ee8 + 8002082: 687b ldr r3, [r7, #4] + 8002084: 681b ldr r3, [r3, #0] + 8002086: 4618 mov r0, r3 + 8002088: f001 faae bl 80035e8 /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) - 8002188: 687b ldr r3, [r7, #4] - 800218a: 6818 ldr r0, [r3, #0] - 800218c: 687b ldr r3, [r7, #4] - 800218e: 7c1a ldrb r2, [r3, #16] - 8002190: f88d 2000 strb.w r2, [sp] - 8002194: 3304 adds r3, #4 - 8002196: cb0e ldmia r3, {r1, r2, r3} - 8002198: f001 fe42 bl 8003e20 - 800219c: 4603 mov r3, r0 - 800219e: 2b00 cmp r3, #0 - 80021a0: d005 beq.n 80021ae + 800208c: 687b ldr r3, [r7, #4] + 800208e: 6818 ldr r0, [r3, #0] + 8002090: 687b ldr r3, [r7, #4] + 8002092: 7c1a ldrb r2, [r3, #16] + 8002094: f88d 2000 strb.w r2, [sp] + 8002098: 3304 adds r3, #4 + 800209a: cb0e ldmia r3, {r1, r2, r3} + 800209c: f001 fa40 bl 8003520 + 80020a0: 4603 mov r3, r0 + 80020a2: 2b00 cmp r3, #0 + 80020a4: d005 beq.n 80020b2 { hpcd->State = HAL_PCD_STATE_ERROR; - 80021a2: 687b ldr r3, [r7, #4] - 80021a4: 2202 movs r2, #2 - 80021a6: f883 2495 strb.w r2, [r3, #1173] ; 0x495 + 80020a6: 687b ldr r3, [r7, #4] + 80020a8: 2202 movs r2, #2 + 80020aa: f883 2495 strb.w r2, [r3, #1173] ; 0x495 return HAL_ERROR; - 80021aa: 2301 movs r3, #1 - 80021ac: e0ce b.n 800234c + 80020ae: 2301 movs r3, #1 + 80020b0: e0ce b.n 8002250 } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) - 80021ae: 687b ldr r3, [r7, #4] - 80021b0: 681b ldr r3, [r3, #0] - 80021b2: 2100 movs r1, #0 - 80021b4: 4618 mov r0, r3 - 80021b6: f001 fea8 bl 8003f0a - 80021ba: 4603 mov r3, r0 - 80021bc: 2b00 cmp r3, #0 - 80021be: d005 beq.n 80021cc + 80020b2: 687b ldr r3, [r7, #4] + 80020b4: 681b ldr r3, [r3, #0] + 80020b6: 2100 movs r1, #0 + 80020b8: 4618 mov r0, r3 + 80020ba: f001 faa6 bl 800360a + 80020be: 4603 mov r3, r0 + 80020c0: 2b00 cmp r3, #0 + 80020c2: d005 beq.n 80020d0 { hpcd->State = HAL_PCD_STATE_ERROR; - 80021c0: 687b ldr r3, [r7, #4] - 80021c2: 2202 movs r2, #2 - 80021c4: f883 2495 strb.w r2, [r3, #1173] ; 0x495 + 80020c4: 687b ldr r3, [r7, #4] + 80020c6: 2202 movs r2, #2 + 80020c8: f883 2495 strb.w r2, [r3, #1173] ; 0x495 return HAL_ERROR; - 80021c8: 2301 movs r3, #1 - 80021ca: e0bf b.n 800234c + 80020cc: 2301 movs r3, #1 + 80020ce: e0bf b.n 8002250 } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 80021cc: 2300 movs r3, #0 - 80021ce: 73fb strb r3, [r7, #15] - 80021d0: e04a b.n 8002268 + 80020d0: 2300 movs r3, #0 + 80020d2: 73fb strb r3, [r7, #15] + 80020d4: e04a b.n 800216c { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; - 80021d2: 7bfa ldrb r2, [r7, #15] - 80021d4: 6879 ldr r1, [r7, #4] - 80021d6: 4613 mov r3, r2 - 80021d8: 00db lsls r3, r3, #3 - 80021da: 4413 add r3, r2 - 80021dc: 009b lsls r3, r3, #2 - 80021de: 440b add r3, r1 - 80021e0: 3315 adds r3, #21 - 80021e2: 2201 movs r2, #1 - 80021e4: 701a strb r2, [r3, #0] + 80020d6: 7bfa ldrb r2, [r7, #15] + 80020d8: 6879 ldr r1, [r7, #4] + 80020da: 4613 mov r3, r2 + 80020dc: 00db lsls r3, r3, #3 + 80020de: 4413 add r3, r2 + 80020e0: 009b lsls r3, r3, #2 + 80020e2: 440b add r3, r1 + 80020e4: 3315 adds r3, #21 + 80020e6: 2201 movs r2, #1 + 80020e8: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; - 80021e6: 7bfa ldrb r2, [r7, #15] - 80021e8: 6879 ldr r1, [r7, #4] - 80021ea: 4613 mov r3, r2 - 80021ec: 00db lsls r3, r3, #3 - 80021ee: 4413 add r3, r2 - 80021f0: 009b lsls r3, r3, #2 - 80021f2: 440b add r3, r1 - 80021f4: 3314 adds r3, #20 - 80021f6: 7bfa ldrb r2, [r7, #15] - 80021f8: 701a strb r2, [r3, #0] + 80020ea: 7bfa ldrb r2, [r7, #15] + 80020ec: 6879 ldr r1, [r7, #4] + 80020ee: 4613 mov r3, r2 + 80020f0: 00db lsls r3, r3, #3 + 80020f2: 4413 add r3, r2 + 80020f4: 009b lsls r3, r3, #2 + 80020f6: 440b add r3, r1 + 80020f8: 3314 adds r3, #20 + 80020fa: 7bfa ldrb r2, [r7, #15] + 80020fc: 701a strb r2, [r3, #0] hpcd->IN_ep[i].tx_fifo_num = i; - 80021fa: 7bfa ldrb r2, [r7, #15] - 80021fc: 7bfb ldrb r3, [r7, #15] - 80021fe: b298 uxth r0, r3 - 8002200: 6879 ldr r1, [r7, #4] - 8002202: 4613 mov r3, r2 - 8002204: 00db lsls r3, r3, #3 - 8002206: 4413 add r3, r2 - 8002208: 009b lsls r3, r3, #2 - 800220a: 440b add r3, r1 - 800220c: 332e adds r3, #46 ; 0x2e - 800220e: 4602 mov r2, r0 - 8002210: 801a strh r2, [r3, #0] + 80020fe: 7bfa ldrb r2, [r7, #15] + 8002100: 7bfb ldrb r3, [r7, #15] + 8002102: b298 uxth r0, r3 + 8002104: 6879 ldr r1, [r7, #4] + 8002106: 4613 mov r3, r2 + 8002108: 00db lsls r3, r3, #3 + 800210a: 4413 add r3, r2 + 800210c: 009b lsls r3, r3, #2 + 800210e: 440b add r3, r1 + 8002110: 332e adds r3, #46 ; 0x2e + 8002112: 4602 mov r2, r0 + 8002114: 801a strh r2, [r3, #0] /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; - 8002212: 7bfa ldrb r2, [r7, #15] - 8002214: 6879 ldr r1, [r7, #4] - 8002216: 4613 mov r3, r2 - 8002218: 00db lsls r3, r3, #3 - 800221a: 4413 add r3, r2 - 800221c: 009b lsls r3, r3, #2 - 800221e: 440b add r3, r1 - 8002220: 3318 adds r3, #24 - 8002222: 2200 movs r2, #0 - 8002224: 701a strb r2, [r3, #0] + 8002116: 7bfa ldrb r2, [r7, #15] + 8002118: 6879 ldr r1, [r7, #4] + 800211a: 4613 mov r3, r2 + 800211c: 00db lsls r3, r3, #3 + 800211e: 4413 add r3, r2 + 8002120: 009b lsls r3, r3, #2 + 8002122: 440b add r3, r1 + 8002124: 3318 adds r3, #24 + 8002126: 2200 movs r2, #0 + 8002128: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; - 8002226: 7bfa ldrb r2, [r7, #15] - 8002228: 6879 ldr r1, [r7, #4] - 800222a: 4613 mov r3, r2 - 800222c: 00db lsls r3, r3, #3 - 800222e: 4413 add r3, r2 - 8002230: 009b lsls r3, r3, #2 - 8002232: 440b add r3, r1 - 8002234: 331c adds r3, #28 - 8002236: 2200 movs r2, #0 - 8002238: 601a str r2, [r3, #0] + 800212a: 7bfa ldrb r2, [r7, #15] + 800212c: 6879 ldr r1, [r7, #4] + 800212e: 4613 mov r3, r2 + 8002130: 00db lsls r3, r3, #3 + 8002132: 4413 add r3, r2 + 8002134: 009b lsls r3, r3, #2 + 8002136: 440b add r3, r1 + 8002138: 331c adds r3, #28 + 800213a: 2200 movs r2, #0 + 800213c: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; - 800223a: 7bfa ldrb r2, [r7, #15] - 800223c: 6879 ldr r1, [r7, #4] - 800223e: 4613 mov r3, r2 - 8002240: 00db lsls r3, r3, #3 - 8002242: 4413 add r3, r2 - 8002244: 009b lsls r3, r3, #2 - 8002246: 440b add r3, r1 - 8002248: 3320 adds r3, #32 - 800224a: 2200 movs r2, #0 - 800224c: 601a str r2, [r3, #0] + 800213e: 7bfa ldrb r2, [r7, #15] + 8002140: 6879 ldr r1, [r7, #4] + 8002142: 4613 mov r3, r2 + 8002144: 00db lsls r3, r3, #3 + 8002146: 4413 add r3, r2 + 8002148: 009b lsls r3, r3, #2 + 800214a: 440b add r3, r1 + 800214c: 3320 adds r3, #32 + 800214e: 2200 movs r2, #0 + 8002150: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; - 800224e: 7bfa ldrb r2, [r7, #15] - 8002250: 6879 ldr r1, [r7, #4] - 8002252: 4613 mov r3, r2 - 8002254: 00db lsls r3, r3, #3 - 8002256: 4413 add r3, r2 - 8002258: 009b lsls r3, r3, #2 - 800225a: 440b add r3, r1 - 800225c: 3324 adds r3, #36 ; 0x24 - 800225e: 2200 movs r2, #0 - 8002260: 601a str r2, [r3, #0] + 8002152: 7bfa ldrb r2, [r7, #15] + 8002154: 6879 ldr r1, [r7, #4] + 8002156: 4613 mov r3, r2 + 8002158: 00db lsls r3, r3, #3 + 800215a: 4413 add r3, r2 + 800215c: 009b lsls r3, r3, #2 + 800215e: 440b add r3, r1 + 8002160: 3324 adds r3, #36 ; 0x24 + 8002162: 2200 movs r2, #0 + 8002164: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 8002262: 7bfb ldrb r3, [r7, #15] - 8002264: 3301 adds r3, #1 - 8002266: 73fb strb r3, [r7, #15] - 8002268: 687b ldr r3, [r7, #4] - 800226a: 791b ldrb r3, [r3, #4] - 800226c: 7bfa ldrb r2, [r7, #15] - 800226e: 429a cmp r2, r3 - 8002270: d3af bcc.n 80021d2 + 8002166: 7bfb ldrb r3, [r7, #15] + 8002168: 3301 adds r3, #1 + 800216a: 73fb strb r3, [r7, #15] + 800216c: 687b ldr r3, [r7, #4] + 800216e: 791b ldrb r3, [r3, #4] + 8002170: 7bfa ldrb r2, [r7, #15] + 8002172: 429a cmp r2, r3 + 8002174: d3af bcc.n 80020d6 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 8002272: 2300 movs r3, #0 - 8002274: 73fb strb r3, [r7, #15] - 8002276: e044 b.n 8002302 + 8002176: 2300 movs r3, #0 + 8002178: 73fb strb r3, [r7, #15] + 800217a: e044 b.n 8002206 { hpcd->OUT_ep[i].is_in = 0U; - 8002278: 7bfa ldrb r2, [r7, #15] - 800227a: 6879 ldr r1, [r7, #4] - 800227c: 4613 mov r3, r2 - 800227e: 00db lsls r3, r3, #3 - 8002280: 4413 add r3, r2 - 8002282: 009b lsls r3, r3, #2 - 8002284: 440b add r3, r1 - 8002286: f203 2355 addw r3, r3, #597 ; 0x255 - 800228a: 2200 movs r2, #0 - 800228c: 701a strb r2, [r3, #0] + 800217c: 7bfa ldrb r2, [r7, #15] + 800217e: 6879 ldr r1, [r7, #4] + 8002180: 4613 mov r3, r2 + 8002182: 00db lsls r3, r3, #3 + 8002184: 4413 add r3, r2 + 8002186: 009b lsls r3, r3, #2 + 8002188: 440b add r3, r1 + 800218a: f203 2355 addw r3, r3, #597 ; 0x255 + 800218e: 2200 movs r2, #0 + 8002190: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; - 800228e: 7bfa ldrb r2, [r7, #15] - 8002290: 6879 ldr r1, [r7, #4] - 8002292: 4613 mov r3, r2 - 8002294: 00db lsls r3, r3, #3 - 8002296: 4413 add r3, r2 - 8002298: 009b lsls r3, r3, #2 - 800229a: 440b add r3, r1 - 800229c: f503 7315 add.w r3, r3, #596 ; 0x254 - 80022a0: 7bfa ldrb r2, [r7, #15] - 80022a2: 701a strb r2, [r3, #0] + 8002192: 7bfa ldrb r2, [r7, #15] + 8002194: 6879 ldr r1, [r7, #4] + 8002196: 4613 mov r3, r2 + 8002198: 00db lsls r3, r3, #3 + 800219a: 4413 add r3, r2 + 800219c: 009b lsls r3, r3, #2 + 800219e: 440b add r3, r1 + 80021a0: f503 7315 add.w r3, r3, #596 ; 0x254 + 80021a4: 7bfa ldrb r2, [r7, #15] + 80021a6: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; - 80022a4: 7bfa ldrb r2, [r7, #15] - 80022a6: 6879 ldr r1, [r7, #4] - 80022a8: 4613 mov r3, r2 - 80022aa: 00db lsls r3, r3, #3 - 80022ac: 4413 add r3, r2 - 80022ae: 009b lsls r3, r3, #2 - 80022b0: 440b add r3, r1 - 80022b2: f503 7316 add.w r3, r3, #600 ; 0x258 - 80022b6: 2200 movs r2, #0 - 80022b8: 701a strb r2, [r3, #0] + 80021a8: 7bfa ldrb r2, [r7, #15] + 80021aa: 6879 ldr r1, [r7, #4] + 80021ac: 4613 mov r3, r2 + 80021ae: 00db lsls r3, r3, #3 + 80021b0: 4413 add r3, r2 + 80021b2: 009b lsls r3, r3, #2 + 80021b4: 440b add r3, r1 + 80021b6: f503 7316 add.w r3, r3, #600 ; 0x258 + 80021ba: 2200 movs r2, #0 + 80021bc: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; - 80022ba: 7bfa ldrb r2, [r7, #15] - 80022bc: 6879 ldr r1, [r7, #4] - 80022be: 4613 mov r3, r2 - 80022c0: 00db lsls r3, r3, #3 - 80022c2: 4413 add r3, r2 - 80022c4: 009b lsls r3, r3, #2 - 80022c6: 440b add r3, r1 - 80022c8: f503 7317 add.w r3, r3, #604 ; 0x25c - 80022cc: 2200 movs r2, #0 - 80022ce: 601a str r2, [r3, #0] + 80021be: 7bfa ldrb r2, [r7, #15] + 80021c0: 6879 ldr r1, [r7, #4] + 80021c2: 4613 mov r3, r2 + 80021c4: 00db lsls r3, r3, #3 + 80021c6: 4413 add r3, r2 + 80021c8: 009b lsls r3, r3, #2 + 80021ca: 440b add r3, r1 + 80021cc: f503 7317 add.w r3, r3, #604 ; 0x25c + 80021d0: 2200 movs r2, #0 + 80021d2: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; - 80022d0: 7bfa ldrb r2, [r7, #15] - 80022d2: 6879 ldr r1, [r7, #4] - 80022d4: 4613 mov r3, r2 - 80022d6: 00db lsls r3, r3, #3 - 80022d8: 4413 add r3, r2 - 80022da: 009b lsls r3, r3, #2 - 80022dc: 440b add r3, r1 - 80022de: f503 7318 add.w r3, r3, #608 ; 0x260 - 80022e2: 2200 movs r2, #0 - 80022e4: 601a str r2, [r3, #0] + 80021d4: 7bfa ldrb r2, [r7, #15] + 80021d6: 6879 ldr r1, [r7, #4] + 80021d8: 4613 mov r3, r2 + 80021da: 00db lsls r3, r3, #3 + 80021dc: 4413 add r3, r2 + 80021de: 009b lsls r3, r3, #2 + 80021e0: 440b add r3, r1 + 80021e2: f503 7318 add.w r3, r3, #608 ; 0x260 + 80021e6: 2200 movs r2, #0 + 80021e8: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; - 80022e6: 7bfa ldrb r2, [r7, #15] - 80022e8: 6879 ldr r1, [r7, #4] - 80022ea: 4613 mov r3, r2 - 80022ec: 00db lsls r3, r3, #3 - 80022ee: 4413 add r3, r2 - 80022f0: 009b lsls r3, r3, #2 - 80022f2: 440b add r3, r1 - 80022f4: f503 7319 add.w r3, r3, #612 ; 0x264 - 80022f8: 2200 movs r2, #0 - 80022fa: 601a str r2, [r3, #0] + 80021ea: 7bfa ldrb r2, [r7, #15] + 80021ec: 6879 ldr r1, [r7, #4] + 80021ee: 4613 mov r3, r2 + 80021f0: 00db lsls r3, r3, #3 + 80021f2: 4413 add r3, r2 + 80021f4: 009b lsls r3, r3, #2 + 80021f6: 440b add r3, r1 + 80021f8: f503 7319 add.w r3, r3, #612 ; 0x264 + 80021fc: 2200 movs r2, #0 + 80021fe: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 80022fc: 7bfb ldrb r3, [r7, #15] - 80022fe: 3301 adds r3, #1 - 8002300: 73fb strb r3, [r7, #15] - 8002302: 687b ldr r3, [r7, #4] - 8002304: 791b ldrb r3, [r3, #4] - 8002306: 7bfa ldrb r2, [r7, #15] - 8002308: 429a cmp r2, r3 - 800230a: d3b5 bcc.n 8002278 + 8002200: 7bfb ldrb r3, [r7, #15] + 8002202: 3301 adds r3, #1 + 8002204: 73fb strb r3, [r7, #15] + 8002206: 687b ldr r3, [r7, #4] + 8002208: 791b ldrb r3, [r3, #4] + 800220a: 7bfa ldrb r2, [r7, #15] + 800220c: 429a cmp r2, r3 + 800220e: d3b5 bcc.n 800217c } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) - 800230c: 687b ldr r3, [r7, #4] - 800230e: 6818 ldr r0, [r3, #0] - 8002310: 687b ldr r3, [r7, #4] - 8002312: 7c1a ldrb r2, [r3, #16] - 8002314: f88d 2000 strb.w r2, [sp] - 8002318: 3304 adds r3, #4 - 800231a: cb0e ldmia r3, {r1, r2, r3} - 800231c: f001 fe42 bl 8003fa4 - 8002320: 4603 mov r3, r0 - 8002322: 2b00 cmp r3, #0 - 8002324: d005 beq.n 8002332 + 8002210: 687b ldr r3, [r7, #4] + 8002212: 6818 ldr r0, [r3, #0] + 8002214: 687b ldr r3, [r7, #4] + 8002216: 7c1a ldrb r2, [r3, #16] + 8002218: f88d 2000 strb.w r2, [sp] + 800221c: 3304 adds r3, #4 + 800221e: cb0e ldmia r3, {r1, r2, r3} + 8002220: f001 fa40 bl 80036a4 + 8002224: 4603 mov r3, r0 + 8002226: 2b00 cmp r3, #0 + 8002228: d005 beq.n 8002236 { hpcd->State = HAL_PCD_STATE_ERROR; - 8002326: 687b ldr r3, [r7, #4] - 8002328: 2202 movs r2, #2 - 800232a: f883 2495 strb.w r2, [r3, #1173] ; 0x495 + 800222a: 687b ldr r3, [r7, #4] + 800222c: 2202 movs r2, #2 + 800222e: f883 2495 strb.w r2, [r3, #1173] ; 0x495 return HAL_ERROR; - 800232e: 2301 movs r3, #1 - 8002330: e00c b.n 800234c + 8002232: 2301 movs r3, #1 + 8002234: e00c b.n 8002250 } hpcd->USB_Address = 0U; - 8002332: 687b ldr r3, [r7, #4] - 8002334: 2200 movs r2, #0 - 8002336: 745a strb r2, [r3, #17] + 8002236: 687b ldr r3, [r7, #4] + 8002238: 2200 movs r2, #0 + 800223a: 745a strb r2, [r3, #17] hpcd->State = HAL_PCD_STATE_READY; - 8002338: 687b ldr r3, [r7, #4] - 800233a: 2201 movs r2, #1 - 800233c: f883 2495 strb.w r2, [r3, #1173] ; 0x495 + 800223c: 687b ldr r3, [r7, #4] + 800223e: 2201 movs r2, #1 + 8002240: f883 2495 strb.w r2, [r3, #1173] ; 0x495 (void)HAL_PCDEx_ActivateLPM(hpcd); } #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ (void)USB_DevDisconnect(hpcd->Instance); - 8002340: 687b ldr r3, [r7, #4] - 8002342: 681b ldr r3, [r3, #0] - 8002344: 4618 mov r0, r3 - 8002346: f002 f80a bl 800435e + 8002244: 687b ldr r3, [r7, #4] + 8002246: 681b ldr r3, [r3, #0] + 8002248: 4618 mov r0, r3 + 800224a: f001 fc08 bl 8003a5e return HAL_OK; - 800234a: 2300 movs r3, #0 + 800224e: 2300 movs r3, #0 } - 800234c: 4618 mov r0, r3 - 800234e: 3710 adds r7, #16 - 8002350: 46bd mov sp, r7 - 8002352: bd80 pop {r7, pc} + 8002250: 4618 mov r0, r3 + 8002252: 3710 adds r7, #16 + 8002254: 46bd mov sp, r7 + 8002256: bd80 pop {r7, pc} -08002354 : +08002258 : * supported by this API. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8002354: b580 push {r7, lr} - 8002356: b086 sub sp, #24 - 8002358: af00 add r7, sp, #0 - 800235a: 6078 str r0, [r7, #4] + 8002258: b580 push {r7, lr} + 800225a: b086 sub sp, #24 + 800225c: af00 add r7, sp, #0 + 800225e: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 800235c: 687b ldr r3, [r7, #4] - 800235e: 2b00 cmp r3, #0 - 8002360: d101 bne.n 8002366 + 8002260: 687b ldr r3, [r7, #4] + 8002262: 2b00 cmp r3, #0 + 8002264: d101 bne.n 800226a { return HAL_ERROR; - 8002362: 2301 movs r3, #1 - 8002364: e267 b.n 8002836 + 8002266: 2301 movs r3, #1 + 8002268: e267 b.n 800273a } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8002366: 687b ldr r3, [r7, #4] - 8002368: 681b ldr r3, [r3, #0] - 800236a: f003 0301 and.w r3, r3, #1 - 800236e: 2b00 cmp r3, #0 - 8002370: d075 beq.n 800245e + 800226a: 687b ldr r3, [r7, #4] + 800226c: 681b ldr r3, [r3, #0] + 800226e: f003 0301 and.w r3, r3, #1 + 8002272: 2b00 cmp r3, #0 + 8002274: d075 beq.n 8002362 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \ - 8002372: 4b88 ldr r3, [pc, #544] ; (8002594 ) - 8002374: 689b ldr r3, [r3, #8] - 8002376: f003 030c and.w r3, r3, #12 - 800237a: 2b04 cmp r3, #4 - 800237c: d00c beq.n 8002398 + 8002276: 4b88 ldr r3, [pc, #544] ; (8002498 ) + 8002278: 689b ldr r3, [r3, #8] + 800227a: f003 030c and.w r3, r3, #12 + 800227e: 2b04 cmp r3, #4 + 8002280: d00c beq.n 800229c ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 800237e: 4b85 ldr r3, [pc, #532] ; (8002594 ) - 8002380: 689b ldr r3, [r3, #8] - 8002382: f003 030c and.w r3, r3, #12 + 8002282: 4b85 ldr r3, [pc, #532] ; (8002498 ) + 8002284: 689b ldr r3, [r3, #8] + 8002286: f003 030c and.w r3, r3, #12 if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \ - 8002386: 2b08 cmp r3, #8 - 8002388: d112 bne.n 80023b0 + 800228a: 2b08 cmp r3, #8 + 800228c: d112 bne.n 80022b4 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 800238a: 4b82 ldr r3, [pc, #520] ; (8002594 ) - 800238c: 685b ldr r3, [r3, #4] - 800238e: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8002392: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8002396: d10b bne.n 80023b0 + 800228e: 4b82 ldr r3, [pc, #520] ; (8002498 ) + 8002290: 685b ldr r3, [r3, #4] + 8002292: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8002296: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 800229a: d10b bne.n 80022b4 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8002398: 4b7e ldr r3, [pc, #504] ; (8002594 ) - 800239a: 681b ldr r3, [r3, #0] - 800239c: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80023a0: 2b00 cmp r3, #0 - 80023a2: d05b beq.n 800245c - 80023a4: 687b ldr r3, [r7, #4] - 80023a6: 685b ldr r3, [r3, #4] - 80023a8: 2b00 cmp r3, #0 - 80023aa: d157 bne.n 800245c + 800229c: 4b7e ldr r3, [pc, #504] ; (8002498 ) + 800229e: 681b ldr r3, [r3, #0] + 80022a0: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80022a4: 2b00 cmp r3, #0 + 80022a6: d05b beq.n 8002360 + 80022a8: 687b ldr r3, [r7, #4] + 80022aa: 685b ldr r3, [r3, #4] + 80022ac: 2b00 cmp r3, #0 + 80022ae: d157 bne.n 8002360 { return HAL_ERROR; - 80023ac: 2301 movs r3, #1 - 80023ae: e242 b.n 8002836 + 80022b0: 2301 movs r3, #1 + 80022b2: e242 b.n 800273a } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 80023b0: 687b ldr r3, [r7, #4] - 80023b2: 685b ldr r3, [r3, #4] - 80023b4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80023b8: d106 bne.n 80023c8 - 80023ba: 4b76 ldr r3, [pc, #472] ; (8002594 ) - 80023bc: 681b ldr r3, [r3, #0] - 80023be: 4a75 ldr r2, [pc, #468] ; (8002594 ) - 80023c0: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 80023c4: 6013 str r3, [r2, #0] - 80023c6: e01d b.n 8002404 - 80023c8: 687b ldr r3, [r7, #4] - 80023ca: 685b ldr r3, [r3, #4] - 80023cc: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 80023d0: d10c bne.n 80023ec - 80023d2: 4b70 ldr r3, [pc, #448] ; (8002594 ) - 80023d4: 681b ldr r3, [r3, #0] - 80023d6: 4a6f ldr r2, [pc, #444] ; (8002594 ) - 80023d8: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 80023dc: 6013 str r3, [r2, #0] - 80023de: 4b6d ldr r3, [pc, #436] ; (8002594 ) - 80023e0: 681b ldr r3, [r3, #0] - 80023e2: 4a6c ldr r2, [pc, #432] ; (8002594 ) - 80023e4: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 80023e8: 6013 str r3, [r2, #0] - 80023ea: e00b b.n 8002404 - 80023ec: 4b69 ldr r3, [pc, #420] ; (8002594 ) - 80023ee: 681b ldr r3, [r3, #0] - 80023f0: 4a68 ldr r2, [pc, #416] ; (8002594 ) - 80023f2: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 80023f6: 6013 str r3, [r2, #0] - 80023f8: 4b66 ldr r3, [pc, #408] ; (8002594 ) - 80023fa: 681b ldr r3, [r3, #0] - 80023fc: 4a65 ldr r2, [pc, #404] ; (8002594 ) - 80023fe: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8002402: 6013 str r3, [r2, #0] + 80022b4: 687b ldr r3, [r7, #4] + 80022b6: 685b ldr r3, [r3, #4] + 80022b8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80022bc: d106 bne.n 80022cc + 80022be: 4b76 ldr r3, [pc, #472] ; (8002498 ) + 80022c0: 681b ldr r3, [r3, #0] + 80022c2: 4a75 ldr r2, [pc, #468] ; (8002498 ) + 80022c4: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 80022c8: 6013 str r3, [r2, #0] + 80022ca: e01d b.n 8002308 + 80022cc: 687b ldr r3, [r7, #4] + 80022ce: 685b ldr r3, [r3, #4] + 80022d0: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 80022d4: d10c bne.n 80022f0 + 80022d6: 4b70 ldr r3, [pc, #448] ; (8002498 ) + 80022d8: 681b ldr r3, [r3, #0] + 80022da: 4a6f ldr r2, [pc, #444] ; (8002498 ) + 80022dc: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 80022e0: 6013 str r3, [r2, #0] + 80022e2: 4b6d ldr r3, [pc, #436] ; (8002498 ) + 80022e4: 681b ldr r3, [r3, #0] + 80022e6: 4a6c ldr r2, [pc, #432] ; (8002498 ) + 80022e8: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 80022ec: 6013 str r3, [r2, #0] + 80022ee: e00b b.n 8002308 + 80022f0: 4b69 ldr r3, [pc, #420] ; (8002498 ) + 80022f2: 681b ldr r3, [r3, #0] + 80022f4: 4a68 ldr r2, [pc, #416] ; (8002498 ) + 80022f6: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 80022fa: 6013 str r3, [r2, #0] + 80022fc: 4b66 ldr r3, [pc, #408] ; (8002498 ) + 80022fe: 681b ldr r3, [r3, #0] + 8002300: 4a65 ldr r2, [pc, #404] ; (8002498 ) + 8002302: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 8002306: 6013 str r3, [r2, #0] /* Check the HSE State */ if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) - 8002404: 687b ldr r3, [r7, #4] - 8002406: 685b ldr r3, [r3, #4] - 8002408: 2b00 cmp r3, #0 - 800240a: d013 beq.n 8002434 + 8002308: 687b ldr r3, [r7, #4] + 800230a: 685b ldr r3, [r3, #4] + 800230c: 2b00 cmp r3, #0 + 800230e: d013 beq.n 8002338 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800240c: f7fe ff90 bl 8001330 - 8002410: 6138 str r0, [r7, #16] + 8002310: f7ff f84e bl 80013b0 + 8002314: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8002412: e008 b.n 8002426 + 8002316: e008 b.n 800232a { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8002414: f7fe ff8c bl 8001330 - 8002418: 4602 mov r2, r0 - 800241a: 693b ldr r3, [r7, #16] - 800241c: 1ad3 subs r3, r2, r3 - 800241e: 2b64 cmp r3, #100 ; 0x64 - 8002420: d901 bls.n 8002426 + 8002318: f7ff f84a bl 80013b0 + 800231c: 4602 mov r2, r0 + 800231e: 693b ldr r3, [r7, #16] + 8002320: 1ad3 subs r3, r2, r3 + 8002322: 2b64 cmp r3, #100 ; 0x64 + 8002324: d901 bls.n 800232a { return HAL_TIMEOUT; - 8002422: 2303 movs r3, #3 - 8002424: e207 b.n 8002836 + 8002326: 2303 movs r3, #3 + 8002328: e207 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8002426: 4b5b ldr r3, [pc, #364] ; (8002594 ) - 8002428: 681b ldr r3, [r3, #0] - 800242a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 800242e: 2b00 cmp r3, #0 - 8002430: d0f0 beq.n 8002414 - 8002432: e014 b.n 800245e + 800232a: 4b5b ldr r3, [pc, #364] ; (8002498 ) + 800232c: 681b ldr r3, [r3, #0] + 800232e: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8002332: 2b00 cmp r3, #0 + 8002334: d0f0 beq.n 8002318 + 8002336: e014 b.n 8002362 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002434: f7fe ff7c bl 8001330 - 8002438: 6138 str r0, [r7, #16] + 8002338: f7ff f83a bl 80013b0 + 800233c: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 800243a: e008 b.n 800244e + 800233e: e008 b.n 8002352 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 800243c: f7fe ff78 bl 8001330 - 8002440: 4602 mov r2, r0 - 8002442: 693b ldr r3, [r7, #16] - 8002444: 1ad3 subs r3, r2, r3 - 8002446: 2b64 cmp r3, #100 ; 0x64 - 8002448: d901 bls.n 800244e + 8002340: f7ff f836 bl 80013b0 + 8002344: 4602 mov r2, r0 + 8002346: 693b ldr r3, [r7, #16] + 8002348: 1ad3 subs r3, r2, r3 + 800234a: 2b64 cmp r3, #100 ; 0x64 + 800234c: d901 bls.n 8002352 { return HAL_TIMEOUT; - 800244a: 2303 movs r3, #3 - 800244c: e1f3 b.n 8002836 + 800234e: 2303 movs r3, #3 + 8002350: e1f3 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 800244e: 4b51 ldr r3, [pc, #324] ; (8002594 ) - 8002450: 681b ldr r3, [r3, #0] - 8002452: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002456: 2b00 cmp r3, #0 - 8002458: d1f0 bne.n 800243c - 800245a: e000 b.n 800245e + 8002352: 4b51 ldr r3, [pc, #324] ; (8002498 ) + 8002354: 681b ldr r3, [r3, #0] + 8002356: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 800235a: 2b00 cmp r3, #0 + 800235c: d1f0 bne.n 8002340 + 800235e: e000 b.n 8002362 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800245c: bf00 nop + 8002360: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 800245e: 687b ldr r3, [r7, #4] - 8002460: 681b ldr r3, [r3, #0] - 8002462: f003 0302 and.w r3, r3, #2 - 8002466: 2b00 cmp r3, #0 - 8002468: d063 beq.n 8002532 + 8002362: 687b ldr r3, [r7, #4] + 8002364: 681b ldr r3, [r3, #0] + 8002366: f003 0302 and.w r3, r3, #2 + 800236a: 2b00 cmp r3, #0 + 800236c: d063 beq.n 8002436 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \ - 800246a: 4b4a ldr r3, [pc, #296] ; (8002594 ) - 800246c: 689b ldr r3, [r3, #8] - 800246e: f003 030c and.w r3, r3, #12 - 8002472: 2b00 cmp r3, #0 - 8002474: d00b beq.n 800248e + 800236e: 4b4a ldr r3, [pc, #296] ; (8002498 ) + 8002370: 689b ldr r3, [r3, #8] + 8002372: f003 030c and.w r3, r3, #12 + 8002376: 2b00 cmp r3, #0 + 8002378: d00b beq.n 8002392 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 8002476: 4b47 ldr r3, [pc, #284] ; (8002594 ) - 8002478: 689b ldr r3, [r3, #8] - 800247a: f003 030c and.w r3, r3, #12 + 800237a: 4b47 ldr r3, [pc, #284] ; (8002498 ) + 800237c: 689b ldr r3, [r3, #8] + 800237e: f003 030c and.w r3, r3, #12 if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \ - 800247e: 2b08 cmp r3, #8 - 8002480: d11c bne.n 80024bc + 8002382: 2b08 cmp r3, #8 + 8002384: d11c bne.n 80023c0 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 8002482: 4b44 ldr r3, [pc, #272] ; (8002594 ) - 8002484: 685b ldr r3, [r3, #4] - 8002486: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 800248a: 2b00 cmp r3, #0 - 800248c: d116 bne.n 80024bc + 8002386: 4b44 ldr r3, [pc, #272] ; (8002498 ) + 8002388: 685b ldr r3, [r3, #4] + 800238a: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 800238e: 2b00 cmp r3, #0 + 8002390: d116 bne.n 80023c0 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 800248e: 4b41 ldr r3, [pc, #260] ; (8002594 ) - 8002490: 681b ldr r3, [r3, #0] - 8002492: f003 0302 and.w r3, r3, #2 - 8002496: 2b00 cmp r3, #0 - 8002498: d005 beq.n 80024a6 - 800249a: 687b ldr r3, [r7, #4] - 800249c: 68db ldr r3, [r3, #12] - 800249e: 2b01 cmp r3, #1 - 80024a0: d001 beq.n 80024a6 + 8002392: 4b41 ldr r3, [pc, #260] ; (8002498 ) + 8002394: 681b ldr r3, [r3, #0] + 8002396: f003 0302 and.w r3, r3, #2 + 800239a: 2b00 cmp r3, #0 + 800239c: d005 beq.n 80023aa + 800239e: 687b ldr r3, [r7, #4] + 80023a0: 68db ldr r3, [r3, #12] + 80023a2: 2b01 cmp r3, #1 + 80023a4: d001 beq.n 80023aa { return HAL_ERROR; - 80024a2: 2301 movs r3, #1 - 80024a4: e1c7 b.n 8002836 + 80023a6: 2301 movs r3, #1 + 80023a8: e1c7 b.n 800273a } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80024a6: 4b3b ldr r3, [pc, #236] ; (8002594 ) - 80024a8: 681b ldr r3, [r3, #0] - 80024aa: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 80024ae: 687b ldr r3, [r7, #4] - 80024b0: 691b ldr r3, [r3, #16] - 80024b2: 00db lsls r3, r3, #3 - 80024b4: 4937 ldr r1, [pc, #220] ; (8002594 ) - 80024b6: 4313 orrs r3, r2 - 80024b8: 600b str r3, [r1, #0] + 80023aa: 4b3b ldr r3, [pc, #236] ; (8002498 ) + 80023ac: 681b ldr r3, [r3, #0] + 80023ae: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 80023b2: 687b ldr r3, [r7, #4] + 80023b4: 691b ldr r3, [r3, #16] + 80023b6: 00db lsls r3, r3, #3 + 80023b8: 4937 ldr r1, [pc, #220] ; (8002498 ) + 80023ba: 4313 orrs r3, r2 + 80023bc: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80024ba: e03a b.n 8002532 + 80023be: e03a b.n 8002436 } } else { /* Check the HSI State */ if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF) - 80024bc: 687b ldr r3, [r7, #4] - 80024be: 68db ldr r3, [r3, #12] - 80024c0: 2b00 cmp r3, #0 - 80024c2: d020 beq.n 8002506 + 80023c0: 687b ldr r3, [r7, #4] + 80023c2: 68db ldr r3, [r3, #12] + 80023c4: 2b00 cmp r3, #0 + 80023c6: d020 beq.n 800240a { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 80024c4: 4b34 ldr r3, [pc, #208] ; (8002598 ) - 80024c6: 2201 movs r2, #1 - 80024c8: 601a str r2, [r3, #0] + 80023c8: 4b34 ldr r3, [pc, #208] ; (800249c ) + 80023ca: 2201 movs r2, #1 + 80023cc: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80024ca: f7fe ff31 bl 8001330 - 80024ce: 6138 str r0, [r7, #16] + 80023ce: f7fe ffef bl 80013b0 + 80023d2: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80024d0: e008 b.n 80024e4 + 80023d4: e008 b.n 80023e8 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 80024d2: f7fe ff2d bl 8001330 - 80024d6: 4602 mov r2, r0 - 80024d8: 693b ldr r3, [r7, #16] - 80024da: 1ad3 subs r3, r2, r3 - 80024dc: 2b02 cmp r3, #2 - 80024de: d901 bls.n 80024e4 + 80023d6: f7fe ffeb bl 80013b0 + 80023da: 4602 mov r2, r0 + 80023dc: 693b ldr r3, [r7, #16] + 80023de: 1ad3 subs r3, r2, r3 + 80023e0: 2b02 cmp r3, #2 + 80023e2: d901 bls.n 80023e8 { return HAL_TIMEOUT; - 80024e0: 2303 movs r3, #3 - 80024e2: e1a8 b.n 8002836 + 80023e4: 2303 movs r3, #3 + 80023e6: e1a8 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80024e4: 4b2b ldr r3, [pc, #172] ; (8002594 ) - 80024e6: 681b ldr r3, [r3, #0] - 80024e8: f003 0302 and.w r3, r3, #2 - 80024ec: 2b00 cmp r3, #0 - 80024ee: d0f0 beq.n 80024d2 + 80023e8: 4b2b ldr r3, [pc, #172] ; (8002498 ) + 80023ea: 681b ldr r3, [r3, #0] + 80023ec: f003 0302 and.w r3, r3, #2 + 80023f0: 2b00 cmp r3, #0 + 80023f2: d0f0 beq.n 80023d6 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80024f0: 4b28 ldr r3, [pc, #160] ; (8002594 ) - 80024f2: 681b ldr r3, [r3, #0] - 80024f4: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 80024f8: 687b ldr r3, [r7, #4] - 80024fa: 691b ldr r3, [r3, #16] - 80024fc: 00db lsls r3, r3, #3 - 80024fe: 4925 ldr r1, [pc, #148] ; (8002594 ) - 8002500: 4313 orrs r3, r2 - 8002502: 600b str r3, [r1, #0] - 8002504: e015 b.n 8002532 + 80023f4: 4b28 ldr r3, [pc, #160] ; (8002498 ) + 80023f6: 681b ldr r3, [r3, #0] + 80023f8: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 80023fc: 687b ldr r3, [r7, #4] + 80023fe: 691b ldr r3, [r3, #16] + 8002400: 00db lsls r3, r3, #3 + 8002402: 4925 ldr r1, [pc, #148] ; (8002498 ) + 8002404: 4313 orrs r3, r2 + 8002406: 600b str r3, [r1, #0] + 8002408: e015 b.n 8002436 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8002506: 4b24 ldr r3, [pc, #144] ; (8002598 ) - 8002508: 2200 movs r2, #0 - 800250a: 601a str r2, [r3, #0] + 800240a: 4b24 ldr r3, [pc, #144] ; (800249c ) + 800240c: 2200 movs r2, #0 + 800240e: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 800250c: f7fe ff10 bl 8001330 - 8002510: 6138 str r0, [r7, #16] + 8002410: f7fe ffce bl 80013b0 + 8002414: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8002512: e008 b.n 8002526 + 8002416: e008 b.n 800242a { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8002514: f7fe ff0c bl 8001330 - 8002518: 4602 mov r2, r0 - 800251a: 693b ldr r3, [r7, #16] - 800251c: 1ad3 subs r3, r2, r3 - 800251e: 2b02 cmp r3, #2 - 8002520: d901 bls.n 8002526 + 8002418: f7fe ffca bl 80013b0 + 800241c: 4602 mov r2, r0 + 800241e: 693b ldr r3, [r7, #16] + 8002420: 1ad3 subs r3, r2, r3 + 8002422: 2b02 cmp r3, #2 + 8002424: d901 bls.n 800242a { return HAL_TIMEOUT; - 8002522: 2303 movs r3, #3 - 8002524: e187 b.n 8002836 + 8002426: 2303 movs r3, #3 + 8002428: e187 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8002526: 4b1b ldr r3, [pc, #108] ; (8002594 ) - 8002528: 681b ldr r3, [r3, #0] - 800252a: f003 0302 and.w r3, r3, #2 - 800252e: 2b00 cmp r3, #0 - 8002530: d1f0 bne.n 8002514 + 800242a: 4b1b ldr r3, [pc, #108] ; (8002498 ) + 800242c: 681b ldr r3, [r3, #0] + 800242e: f003 0302 and.w r3, r3, #2 + 8002432: 2b00 cmp r3, #0 + 8002434: d1f0 bne.n 8002418 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8002532: 687b ldr r3, [r7, #4] - 8002534: 681b ldr r3, [r3, #0] - 8002536: f003 0308 and.w r3, r3, #8 - 800253a: 2b00 cmp r3, #0 - 800253c: d036 beq.n 80025ac + 8002436: 687b ldr r3, [r7, #4] + 8002438: 681b ldr r3, [r3, #0] + 800243a: f003 0308 and.w r3, r3, #8 + 800243e: 2b00 cmp r3, #0 + 8002440: d036 beq.n 80024b0 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF) - 800253e: 687b ldr r3, [r7, #4] - 8002540: 695b ldr r3, [r3, #20] - 8002542: 2b00 cmp r3, #0 - 8002544: d016 beq.n 8002574 + 8002442: 687b ldr r3, [r7, #4] + 8002444: 695b ldr r3, [r3, #20] + 8002446: 2b00 cmp r3, #0 + 8002448: d016 beq.n 8002478 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8002546: 4b15 ldr r3, [pc, #84] ; (800259c ) - 8002548: 2201 movs r2, #1 - 800254a: 601a str r2, [r3, #0] + 800244a: 4b15 ldr r3, [pc, #84] ; (80024a0 ) + 800244c: 2201 movs r2, #1 + 800244e: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 800254c: f7fe fef0 bl 8001330 - 8002550: 6138 str r0, [r7, #16] + 8002450: f7fe ffae bl 80013b0 + 8002454: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8002552: e008 b.n 8002566 + 8002456: e008 b.n 800246a { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8002554: f7fe feec bl 8001330 - 8002558: 4602 mov r2, r0 - 800255a: 693b ldr r3, [r7, #16] - 800255c: 1ad3 subs r3, r2, r3 - 800255e: 2b02 cmp r3, #2 - 8002560: d901 bls.n 8002566 + 8002458: f7fe ffaa bl 80013b0 + 800245c: 4602 mov r2, r0 + 800245e: 693b ldr r3, [r7, #16] + 8002460: 1ad3 subs r3, r2, r3 + 8002462: 2b02 cmp r3, #2 + 8002464: d901 bls.n 800246a { return HAL_TIMEOUT; - 8002562: 2303 movs r3, #3 - 8002564: e167 b.n 8002836 + 8002466: 2303 movs r3, #3 + 8002468: e167 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8002566: 4b0b ldr r3, [pc, #44] ; (8002594 ) - 8002568: 6f5b ldr r3, [r3, #116] ; 0x74 - 800256a: f003 0302 and.w r3, r3, #2 - 800256e: 2b00 cmp r3, #0 - 8002570: d0f0 beq.n 8002554 - 8002572: e01b b.n 80025ac + 800246a: 4b0b ldr r3, [pc, #44] ; (8002498 ) + 800246c: 6f5b ldr r3, [r3, #116] ; 0x74 + 800246e: f003 0302 and.w r3, r3, #2 + 8002472: 2b00 cmp r3, #0 + 8002474: d0f0 beq.n 8002458 + 8002476: e01b b.n 80024b0 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8002574: 4b09 ldr r3, [pc, #36] ; (800259c ) - 8002576: 2200 movs r2, #0 - 8002578: 601a str r2, [r3, #0] + 8002478: 4b09 ldr r3, [pc, #36] ; (80024a0 ) + 800247a: 2200 movs r2, #0 + 800247c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800257a: f7fe fed9 bl 8001330 - 800257e: 6138 str r0, [r7, #16] + 800247e: f7fe ff97 bl 80013b0 + 8002482: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8002580: e00e b.n 80025a0 + 8002484: e00e b.n 80024a4 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8002582: f7fe fed5 bl 8001330 - 8002586: 4602 mov r2, r0 - 8002588: 693b ldr r3, [r7, #16] - 800258a: 1ad3 subs r3, r2, r3 - 800258c: 2b02 cmp r3, #2 - 800258e: d907 bls.n 80025a0 + 8002486: f7fe ff93 bl 80013b0 + 800248a: 4602 mov r2, r0 + 800248c: 693b ldr r3, [r7, #16] + 800248e: 1ad3 subs r3, r2, r3 + 8002490: 2b02 cmp r3, #2 + 8002492: d907 bls.n 80024a4 { return HAL_TIMEOUT; - 8002590: 2303 movs r3, #3 - 8002592: e150 b.n 8002836 - 8002594: 40023800 .word 0x40023800 - 8002598: 42470000 .word 0x42470000 - 800259c: 42470e80 .word 0x42470e80 + 8002494: 2303 movs r3, #3 + 8002496: e150 b.n 800273a + 8002498: 40023800 .word 0x40023800 + 800249c: 42470000 .word 0x42470000 + 80024a0: 42470e80 .word 0x42470e80 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 80025a0: 4b88 ldr r3, [pc, #544] ; (80027c4 ) - 80025a2: 6f5b ldr r3, [r3, #116] ; 0x74 - 80025a4: f003 0302 and.w r3, r3, #2 - 80025a8: 2b00 cmp r3, #0 - 80025aa: d1ea bne.n 8002582 + 80024a4: 4b88 ldr r3, [pc, #544] ; (80026c8 ) + 80024a6: 6f5b ldr r3, [r3, #116] ; 0x74 + 80024a8: f003 0302 and.w r3, r3, #2 + 80024ac: 2b00 cmp r3, #0 + 80024ae: d1ea bne.n 8002486 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 80025ac: 687b ldr r3, [r7, #4] - 80025ae: 681b ldr r3, [r3, #0] - 80025b0: f003 0304 and.w r3, r3, #4 - 80025b4: 2b00 cmp r3, #0 - 80025b6: f000 8097 beq.w 80026e8 + 80024b0: 687b ldr r3, [r7, #4] + 80024b2: 681b ldr r3, [r3, #0] + 80024b4: f003 0304 and.w r3, r3, #4 + 80024b8: 2b00 cmp r3, #0 + 80024ba: f000 8097 beq.w 80025ec { FlagStatus pwrclkchanged = RESET; - 80025ba: 2300 movs r3, #0 - 80025bc: 75fb strb r3, [r7, #23] + 80024be: 2300 movs r3, #0 + 80024c0: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 80025be: 4b81 ldr r3, [pc, #516] ; (80027c4 ) - 80025c0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80025c2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80025c6: 2b00 cmp r3, #0 - 80025c8: d10f bne.n 80025ea + 80024c2: 4b81 ldr r3, [pc, #516] ; (80026c8 ) + 80024c4: 6c1b ldr r3, [r3, #64] ; 0x40 + 80024c6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80024ca: 2b00 cmp r3, #0 + 80024cc: d10f bne.n 80024ee { __HAL_RCC_PWR_CLK_ENABLE(); - 80025ca: 2300 movs r3, #0 - 80025cc: 60bb str r3, [r7, #8] - 80025ce: 4b7d ldr r3, [pc, #500] ; (80027c4 ) - 80025d0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80025d2: 4a7c ldr r2, [pc, #496] ; (80027c4 ) - 80025d4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 80025d8: 6413 str r3, [r2, #64] ; 0x40 - 80025da: 4b7a ldr r3, [pc, #488] ; (80027c4 ) - 80025dc: 6c1b ldr r3, [r3, #64] ; 0x40 - 80025de: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80025e2: 60bb str r3, [r7, #8] - 80025e4: 68bb ldr r3, [r7, #8] + 80024ce: 2300 movs r3, #0 + 80024d0: 60bb str r3, [r7, #8] + 80024d2: 4b7d ldr r3, [pc, #500] ; (80026c8 ) + 80024d4: 6c1b ldr r3, [r3, #64] ; 0x40 + 80024d6: 4a7c ldr r2, [pc, #496] ; (80026c8 ) + 80024d8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 80024dc: 6413 str r3, [r2, #64] ; 0x40 + 80024de: 4b7a ldr r3, [pc, #488] ; (80026c8 ) + 80024e0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80024e2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80024e6: 60bb str r3, [r7, #8] + 80024e8: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 80025e6: 2301 movs r3, #1 - 80025e8: 75fb strb r3, [r7, #23] + 80024ea: 2301 movs r3, #1 + 80024ec: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80025ea: 4b77 ldr r3, [pc, #476] ; (80027c8 ) - 80025ec: 681b ldr r3, [r3, #0] - 80025ee: f403 7380 and.w r3, r3, #256 ; 0x100 - 80025f2: 2b00 cmp r3, #0 - 80025f4: d118 bne.n 8002628 + 80024ee: 4b77 ldr r3, [pc, #476] ; (80026cc ) + 80024f0: 681b ldr r3, [r3, #0] + 80024f2: f403 7380 and.w r3, r3, #256 ; 0x100 + 80024f6: 2b00 cmp r3, #0 + 80024f8: d118 bne.n 800252c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80025f6: 4b74 ldr r3, [pc, #464] ; (80027c8 ) - 80025f8: 681b ldr r3, [r3, #0] - 80025fa: 4a73 ldr r2, [pc, #460] ; (80027c8 ) - 80025fc: f443 7380 orr.w r3, r3, #256 ; 0x100 - 8002600: 6013 str r3, [r2, #0] + 80024fa: 4b74 ldr r3, [pc, #464] ; (80026cc ) + 80024fc: 681b ldr r3, [r3, #0] + 80024fe: 4a73 ldr r2, [pc, #460] ; (80026cc ) + 8002500: f443 7380 orr.w r3, r3, #256 ; 0x100 + 8002504: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8002602: f7fe fe95 bl 8001330 - 8002606: 6138 str r0, [r7, #16] + 8002506: f7fe ff53 bl 80013b0 + 800250a: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002608: e008 b.n 800261c + 800250c: e008 b.n 8002520 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 800260a: f7fe fe91 bl 8001330 - 800260e: 4602 mov r2, r0 - 8002610: 693b ldr r3, [r7, #16] - 8002612: 1ad3 subs r3, r2, r3 - 8002614: 2b02 cmp r3, #2 - 8002616: d901 bls.n 800261c + 800250e: f7fe ff4f bl 80013b0 + 8002512: 4602 mov r2, r0 + 8002514: 693b ldr r3, [r7, #16] + 8002516: 1ad3 subs r3, r2, r3 + 8002518: 2b02 cmp r3, #2 + 800251a: d901 bls.n 8002520 { return HAL_TIMEOUT; - 8002618: 2303 movs r3, #3 - 800261a: e10c b.n 8002836 + 800251c: 2303 movs r3, #3 + 800251e: e10c b.n 800273a while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800261c: 4b6a ldr r3, [pc, #424] ; (80027c8 ) - 800261e: 681b ldr r3, [r3, #0] - 8002620: f403 7380 and.w r3, r3, #256 ; 0x100 - 8002624: 2b00 cmp r3, #0 - 8002626: d0f0 beq.n 800260a + 8002520: 4b6a ldr r3, [pc, #424] ; (80026cc ) + 8002522: 681b ldr r3, [r3, #0] + 8002524: f403 7380 and.w r3, r3, #256 ; 0x100 + 8002528: 2b00 cmp r3, #0 + 800252a: d0f0 beq.n 800250e } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8002628: 687b ldr r3, [r7, #4] - 800262a: 689b ldr r3, [r3, #8] - 800262c: 2b01 cmp r3, #1 - 800262e: d106 bne.n 800263e - 8002630: 4b64 ldr r3, [pc, #400] ; (80027c4 ) - 8002632: 6f1b ldr r3, [r3, #112] ; 0x70 - 8002634: 4a63 ldr r2, [pc, #396] ; (80027c4 ) - 8002636: f043 0301 orr.w r3, r3, #1 - 800263a: 6713 str r3, [r2, #112] ; 0x70 - 800263c: e01c b.n 8002678 - 800263e: 687b ldr r3, [r7, #4] - 8002640: 689b ldr r3, [r3, #8] - 8002642: 2b05 cmp r3, #5 - 8002644: d10c bne.n 8002660 - 8002646: 4b5f ldr r3, [pc, #380] ; (80027c4 ) - 8002648: 6f1b ldr r3, [r3, #112] ; 0x70 - 800264a: 4a5e ldr r2, [pc, #376] ; (80027c4 ) - 800264c: f043 0304 orr.w r3, r3, #4 - 8002650: 6713 str r3, [r2, #112] ; 0x70 - 8002652: 4b5c ldr r3, [pc, #368] ; (80027c4 ) - 8002654: 6f1b ldr r3, [r3, #112] ; 0x70 - 8002656: 4a5b ldr r2, [pc, #364] ; (80027c4 ) - 8002658: f043 0301 orr.w r3, r3, #1 - 800265c: 6713 str r3, [r2, #112] ; 0x70 - 800265e: e00b b.n 8002678 - 8002660: 4b58 ldr r3, [pc, #352] ; (80027c4 ) - 8002662: 6f1b ldr r3, [r3, #112] ; 0x70 - 8002664: 4a57 ldr r2, [pc, #348] ; (80027c4 ) - 8002666: f023 0301 bic.w r3, r3, #1 - 800266a: 6713 str r3, [r2, #112] ; 0x70 - 800266c: 4b55 ldr r3, [pc, #340] ; (80027c4 ) - 800266e: 6f1b ldr r3, [r3, #112] ; 0x70 - 8002670: 4a54 ldr r2, [pc, #336] ; (80027c4 ) - 8002672: f023 0304 bic.w r3, r3, #4 - 8002676: 6713 str r3, [r2, #112] ; 0x70 + 800252c: 687b ldr r3, [r7, #4] + 800252e: 689b ldr r3, [r3, #8] + 8002530: 2b01 cmp r3, #1 + 8002532: d106 bne.n 8002542 + 8002534: 4b64 ldr r3, [pc, #400] ; (80026c8 ) + 8002536: 6f1b ldr r3, [r3, #112] ; 0x70 + 8002538: 4a63 ldr r2, [pc, #396] ; (80026c8 ) + 800253a: f043 0301 orr.w r3, r3, #1 + 800253e: 6713 str r3, [r2, #112] ; 0x70 + 8002540: e01c b.n 800257c + 8002542: 687b ldr r3, [r7, #4] + 8002544: 689b ldr r3, [r3, #8] + 8002546: 2b05 cmp r3, #5 + 8002548: d10c bne.n 8002564 + 800254a: 4b5f ldr r3, [pc, #380] ; (80026c8 ) + 800254c: 6f1b ldr r3, [r3, #112] ; 0x70 + 800254e: 4a5e ldr r2, [pc, #376] ; (80026c8 ) + 8002550: f043 0304 orr.w r3, r3, #4 + 8002554: 6713 str r3, [r2, #112] ; 0x70 + 8002556: 4b5c ldr r3, [pc, #368] ; (80026c8 ) + 8002558: 6f1b ldr r3, [r3, #112] ; 0x70 + 800255a: 4a5b ldr r2, [pc, #364] ; (80026c8 ) + 800255c: f043 0301 orr.w r3, r3, #1 + 8002560: 6713 str r3, [r2, #112] ; 0x70 + 8002562: e00b b.n 800257c + 8002564: 4b58 ldr r3, [pc, #352] ; (80026c8 ) + 8002566: 6f1b ldr r3, [r3, #112] ; 0x70 + 8002568: 4a57 ldr r2, [pc, #348] ; (80026c8 ) + 800256a: f023 0301 bic.w r3, r3, #1 + 800256e: 6713 str r3, [r2, #112] ; 0x70 + 8002570: 4b55 ldr r3, [pc, #340] ; (80026c8 ) + 8002572: 6f1b ldr r3, [r3, #112] ; 0x70 + 8002574: 4a54 ldr r2, [pc, #336] ; (80026c8 ) + 8002576: f023 0304 bic.w r3, r3, #4 + 800257a: 6713 str r3, [r2, #112] ; 0x70 /* Check the LSE State */ if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) - 8002678: 687b ldr r3, [r7, #4] - 800267a: 689b ldr r3, [r3, #8] - 800267c: 2b00 cmp r3, #0 - 800267e: d015 beq.n 80026ac + 800257c: 687b ldr r3, [r7, #4] + 800257e: 689b ldr r3, [r3, #8] + 8002580: 2b00 cmp r3, #0 + 8002582: d015 beq.n 80025b0 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8002680: f7fe fe56 bl 8001330 - 8002684: 6138 str r0, [r7, #16] + 8002584: f7fe ff14 bl 80013b0 + 8002588: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8002686: e00a b.n 800269e + 800258a: e00a b.n 80025a2 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8002688: f7fe fe52 bl 8001330 - 800268c: 4602 mov r2, r0 - 800268e: 693b ldr r3, [r7, #16] - 8002690: 1ad3 subs r3, r2, r3 - 8002692: f241 3288 movw r2, #5000 ; 0x1388 - 8002696: 4293 cmp r3, r2 - 8002698: d901 bls.n 800269e + 800258c: f7fe ff10 bl 80013b0 + 8002590: 4602 mov r2, r0 + 8002592: 693b ldr r3, [r7, #16] + 8002594: 1ad3 subs r3, r2, r3 + 8002596: f241 3288 movw r2, #5000 ; 0x1388 + 800259a: 4293 cmp r3, r2 + 800259c: d901 bls.n 80025a2 { return HAL_TIMEOUT; - 800269a: 2303 movs r3, #3 - 800269c: e0cb b.n 8002836 + 800259e: 2303 movs r3, #3 + 80025a0: e0cb b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800269e: 4b49 ldr r3, [pc, #292] ; (80027c4 ) - 80026a0: 6f1b ldr r3, [r3, #112] ; 0x70 - 80026a2: f003 0302 and.w r3, r3, #2 - 80026a6: 2b00 cmp r3, #0 - 80026a8: d0ee beq.n 8002688 - 80026aa: e014 b.n 80026d6 + 80025a2: 4b49 ldr r3, [pc, #292] ; (80026c8 ) + 80025a4: 6f1b ldr r3, [r3, #112] ; 0x70 + 80025a6: f003 0302 and.w r3, r3, #2 + 80025aa: 2b00 cmp r3, #0 + 80025ac: d0ee beq.n 800258c + 80025ae: e014 b.n 80025da } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80026ac: f7fe fe40 bl 8001330 - 80026b0: 6138 str r0, [r7, #16] + 80025b0: f7fe fefe bl 80013b0 + 80025b4: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80026b2: e00a b.n 80026ca + 80025b6: e00a b.n 80025ce { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 80026b4: f7fe fe3c bl 8001330 - 80026b8: 4602 mov r2, r0 - 80026ba: 693b ldr r3, [r7, #16] - 80026bc: 1ad3 subs r3, r2, r3 - 80026be: f241 3288 movw r2, #5000 ; 0x1388 - 80026c2: 4293 cmp r3, r2 - 80026c4: d901 bls.n 80026ca + 80025b8: f7fe fefa bl 80013b0 + 80025bc: 4602 mov r2, r0 + 80025be: 693b ldr r3, [r7, #16] + 80025c0: 1ad3 subs r3, r2, r3 + 80025c2: f241 3288 movw r2, #5000 ; 0x1388 + 80025c6: 4293 cmp r3, r2 + 80025c8: d901 bls.n 80025ce { return HAL_TIMEOUT; - 80026c6: 2303 movs r3, #3 - 80026c8: e0b5 b.n 8002836 + 80025ca: 2303 movs r3, #3 + 80025cc: e0b5 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80026ca: 4b3e ldr r3, [pc, #248] ; (80027c4 ) - 80026cc: 6f1b ldr r3, [r3, #112] ; 0x70 - 80026ce: f003 0302 and.w r3, r3, #2 - 80026d2: 2b00 cmp r3, #0 - 80026d4: d1ee bne.n 80026b4 + 80025ce: 4b3e ldr r3, [pc, #248] ; (80026c8 ) + 80025d0: 6f1b ldr r3, [r3, #112] ; 0x70 + 80025d2: f003 0302 and.w r3, r3, #2 + 80025d6: 2b00 cmp r3, #0 + 80025d8: d1ee bne.n 80025b8 } } } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) - 80026d6: 7dfb ldrb r3, [r7, #23] - 80026d8: 2b01 cmp r3, #1 - 80026da: d105 bne.n 80026e8 + 80025da: 7dfb ldrb r3, [r7, #23] + 80025dc: 2b01 cmp r3, #1 + 80025de: d105 bne.n 80025ec { __HAL_RCC_PWR_CLK_DISABLE(); - 80026dc: 4b39 ldr r3, [pc, #228] ; (80027c4 ) - 80026de: 6c1b ldr r3, [r3, #64] ; 0x40 - 80026e0: 4a38 ldr r2, [pc, #224] ; (80027c4 ) - 80026e2: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 80026e6: 6413 str r3, [r2, #64] ; 0x40 + 80025e0: 4b39 ldr r3, [pc, #228] ; (80026c8 ) + 80025e2: 6c1b ldr r3, [r3, #64] ; 0x40 + 80025e4: 4a38 ldr r2, [pc, #224] ; (80026c8 ) + 80025e6: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 80025ea: 6413 str r3, [r2, #64] ; 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80026e8: 687b ldr r3, [r7, #4] - 80026ea: 699b ldr r3, [r3, #24] - 80026ec: 2b00 cmp r3, #0 - 80026ee: f000 80a1 beq.w 8002834 + 80025ec: 687b ldr r3, [r7, #4] + 80025ee: 699b ldr r3, [r3, #24] + 80025f0: 2b00 cmp r3, #0 + 80025f2: f000 80a1 beq.w 8002738 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - 80026f2: 4b34 ldr r3, [pc, #208] ; (80027c4 ) - 80026f4: 689b ldr r3, [r3, #8] - 80026f6: f003 030c and.w r3, r3, #12 - 80026fa: 2b08 cmp r3, #8 - 80026fc: d05c beq.n 80027b8 + 80025f6: 4b34 ldr r3, [pc, #208] ; (80026c8 ) + 80025f8: 689b ldr r3, [r3, #8] + 80025fa: f003 030c and.w r3, r3, #12 + 80025fe: 2b08 cmp r3, #8 + 8002600: d05c beq.n 80026bc { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80026fe: 687b ldr r3, [r7, #4] - 8002700: 699b ldr r3, [r3, #24] - 8002702: 2b02 cmp r3, #2 - 8002704: d141 bne.n 800278a + 8002602: 687b ldr r3, [r7, #4] + 8002604: 699b ldr r3, [r3, #24] + 8002606: 2b02 cmp r3, #2 + 8002608: d141 bne.n 800268e assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8002706: 4b31 ldr r3, [pc, #196] ; (80027cc ) - 8002708: 2200 movs r2, #0 - 800270a: 601a str r2, [r3, #0] + 800260a: 4b31 ldr r3, [pc, #196] ; (80026d0 ) + 800260c: 2200 movs r2, #0 + 800260e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800270c: f7fe fe10 bl 8001330 - 8002710: 6138 str r0, [r7, #16] + 8002610: f7fe fece bl 80013b0 + 8002614: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8002712: e008 b.n 8002726 + 8002616: e008 b.n 800262a { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8002714: f7fe fe0c bl 8001330 - 8002718: 4602 mov r2, r0 - 800271a: 693b ldr r3, [r7, #16] - 800271c: 1ad3 subs r3, r2, r3 - 800271e: 2b02 cmp r3, #2 - 8002720: d901 bls.n 8002726 + 8002618: f7fe feca bl 80013b0 + 800261c: 4602 mov r2, r0 + 800261e: 693b ldr r3, [r7, #16] + 8002620: 1ad3 subs r3, r2, r3 + 8002622: 2b02 cmp r3, #2 + 8002624: d901 bls.n 800262a { return HAL_TIMEOUT; - 8002722: 2303 movs r3, #3 - 8002724: e087 b.n 8002836 + 8002626: 2303 movs r3, #3 + 8002628: e087 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8002726: 4b27 ldr r3, [pc, #156] ; (80027c4 ) - 8002728: 681b ldr r3, [r3, #0] - 800272a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 800272e: 2b00 cmp r3, #0 - 8002730: d1f0 bne.n 8002714 + 800262a: 4b27 ldr r3, [pc, #156] ; (80026c8 ) + 800262c: 681b ldr r3, [r3, #0] + 800262e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8002632: 2b00 cmp r3, #0 + 8002634: d1f0 bne.n 8002618 } } /* Configure the main PLL clock source, multiplication and division factors. */ WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ - 8002732: 687b ldr r3, [r7, #4] - 8002734: 69da ldr r2, [r3, #28] - 8002736: 687b ldr r3, [r7, #4] - 8002738: 6a1b ldr r3, [r3, #32] - 800273a: 431a orrs r2, r3 - 800273c: 687b ldr r3, [r7, #4] - 800273e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8002740: 019b lsls r3, r3, #6 - 8002742: 431a orrs r2, r3 - 8002744: 687b ldr r3, [r7, #4] - 8002746: 6a9b ldr r3, [r3, #40] ; 0x28 - 8002748: 085b lsrs r3, r3, #1 - 800274a: 3b01 subs r3, #1 - 800274c: 041b lsls r3, r3, #16 - 800274e: 431a orrs r2, r3 - 8002750: 687b ldr r3, [r7, #4] - 8002752: 6adb ldr r3, [r3, #44] ; 0x2c - 8002754: 061b lsls r3, r3, #24 - 8002756: 491b ldr r1, [pc, #108] ; (80027c4 ) - 8002758: 4313 orrs r3, r2 - 800275a: 604b str r3, [r1, #4] + 8002636: 687b ldr r3, [r7, #4] + 8002638: 69da ldr r2, [r3, #28] + 800263a: 687b ldr r3, [r7, #4] + 800263c: 6a1b ldr r3, [r3, #32] + 800263e: 431a orrs r2, r3 + 8002640: 687b ldr r3, [r7, #4] + 8002642: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002644: 019b lsls r3, r3, #6 + 8002646: 431a orrs r2, r3 + 8002648: 687b ldr r3, [r7, #4] + 800264a: 6a9b ldr r3, [r3, #40] ; 0x28 + 800264c: 085b lsrs r3, r3, #1 + 800264e: 3b01 subs r3, #1 + 8002650: 041b lsls r3, r3, #16 + 8002652: 431a orrs r2, r3 + 8002654: 687b ldr r3, [r7, #4] + 8002656: 6adb ldr r3, [r3, #44] ; 0x2c + 8002658: 061b lsls r3, r3, #24 + 800265a: 491b ldr r1, [pc, #108] ; (80026c8 ) + 800265c: 4313 orrs r3, r2 + 800265e: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLM | \ (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 800275c: 4b1b ldr r3, [pc, #108] ; (80027cc ) - 800275e: 2201 movs r2, #1 - 8002760: 601a str r2, [r3, #0] + 8002660: 4b1b ldr r3, [pc, #108] ; (80026d0 ) + 8002662: 2201 movs r2, #1 + 8002664: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002762: f7fe fde5 bl 8001330 - 8002766: 6138 str r0, [r7, #16] + 8002666: f7fe fea3 bl 80013b0 + 800266a: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8002768: e008 b.n 800277c + 800266c: e008 b.n 8002680 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 800276a: f7fe fde1 bl 8001330 - 800276e: 4602 mov r2, r0 - 8002770: 693b ldr r3, [r7, #16] - 8002772: 1ad3 subs r3, r2, r3 - 8002774: 2b02 cmp r3, #2 - 8002776: d901 bls.n 800277c + 800266e: f7fe fe9f bl 80013b0 + 8002672: 4602 mov r2, r0 + 8002674: 693b ldr r3, [r7, #16] + 8002676: 1ad3 subs r3, r2, r3 + 8002678: 2b02 cmp r3, #2 + 800267a: d901 bls.n 8002680 { return HAL_TIMEOUT; - 8002778: 2303 movs r3, #3 - 800277a: e05c b.n 8002836 + 800267c: 2303 movs r3, #3 + 800267e: e05c b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800277c: 4b11 ldr r3, [pc, #68] ; (80027c4 ) - 800277e: 681b ldr r3, [r3, #0] - 8002780: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8002784: 2b00 cmp r3, #0 - 8002786: d0f0 beq.n 800276a - 8002788: e054 b.n 8002834 + 8002680: 4b11 ldr r3, [pc, #68] ; (80026c8 ) + 8002682: 681b ldr r3, [r3, #0] + 8002684: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8002688: 2b00 cmp r3, #0 + 800268a: d0f0 beq.n 800266e + 800268c: e054 b.n 8002738 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 800278a: 4b10 ldr r3, [pc, #64] ; (80027cc ) - 800278c: 2200 movs r2, #0 - 800278e: 601a str r2, [r3, #0] + 800268e: 4b10 ldr r3, [pc, #64] ; (80026d0 ) + 8002690: 2200 movs r2, #0 + 8002692: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002790: f7fe fdce bl 8001330 - 8002794: 6138 str r0, [r7, #16] + 8002694: f7fe fe8c bl 80013b0 + 8002698: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8002796: e008 b.n 80027aa + 800269a: e008 b.n 80026ae { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8002798: f7fe fdca bl 8001330 - 800279c: 4602 mov r2, r0 - 800279e: 693b ldr r3, [r7, #16] - 80027a0: 1ad3 subs r3, r2, r3 - 80027a2: 2b02 cmp r3, #2 - 80027a4: d901 bls.n 80027aa + 800269c: f7fe fe88 bl 80013b0 + 80026a0: 4602 mov r2, r0 + 80026a2: 693b ldr r3, [r7, #16] + 80026a4: 1ad3 subs r3, r2, r3 + 80026a6: 2b02 cmp r3, #2 + 80026a8: d901 bls.n 80026ae { return HAL_TIMEOUT; - 80027a6: 2303 movs r3, #3 - 80027a8: e045 b.n 8002836 + 80026aa: 2303 movs r3, #3 + 80026ac: e045 b.n 800273a while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80027aa: 4b06 ldr r3, [pc, #24] ; (80027c4 ) - 80027ac: 681b ldr r3, [r3, #0] - 80027ae: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80027b2: 2b00 cmp r3, #0 - 80027b4: d1f0 bne.n 8002798 - 80027b6: e03d b.n 8002834 + 80026ae: 4b06 ldr r3, [pc, #24] ; (80026c8 ) + 80026b0: 681b ldr r3, [r3, #0] + 80026b2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80026b6: 2b00 cmp r3, #0 + 80026b8: d1f0 bne.n 800269c + 80026ba: e03d b.n 8002738 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 80027b8: 687b ldr r3, [r7, #4] - 80027ba: 699b ldr r3, [r3, #24] - 80027bc: 2b01 cmp r3, #1 - 80027be: d107 bne.n 80027d0 + 80026bc: 687b ldr r3, [r7, #4] + 80026be: 699b ldr r3, [r3, #24] + 80026c0: 2b01 cmp r3, #1 + 80026c2: d107 bne.n 80026d4 { return HAL_ERROR; - 80027c0: 2301 movs r3, #1 - 80027c2: e038 b.n 8002836 - 80027c4: 40023800 .word 0x40023800 - 80027c8: 40007000 .word 0x40007000 - 80027cc: 42470060 .word 0x42470060 + 80026c4: 2301 movs r3, #1 + 80026c6: e038 b.n 800273a + 80026c8: 40023800 .word 0x40023800 + 80026cc: 40007000 .word 0x40007000 + 80026d0: 42470060 .word 0x42470060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; - 80027d0: 4b1b ldr r3, [pc, #108] ; (8002840 ) - 80027d2: 685b ldr r3, [r3, #4] - 80027d4: 60fb str r3, [r7, #12] + 80026d4: 4b1b ldr r3, [pc, #108] ; (8002744 ) + 80026d6: 685b ldr r3, [r3, #4] + 80026d8: 60fb str r3, [r7, #12] (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) #else if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 80027d6: 687b ldr r3, [r7, #4] - 80027d8: 699b ldr r3, [r3, #24] - 80027da: 2b01 cmp r3, #1 - 80027dc: d028 beq.n 8002830 + 80026da: 687b ldr r3, [r7, #4] + 80026dc: 699b ldr r3, [r3, #24] + 80026de: 2b01 cmp r3, #1 + 80026e0: d028 beq.n 8002734 (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80027de: 68fb ldr r3, [r7, #12] - 80027e0: f403 0280 and.w r2, r3, #4194304 ; 0x400000 - 80027e4: 687b ldr r3, [r7, #4] - 80027e6: 69db ldr r3, [r3, #28] + 80026e2: 68fb ldr r3, [r7, #12] + 80026e4: f403 0280 and.w r2, r3, #4194304 ; 0x400000 + 80026e8: 687b ldr r3, [r7, #4] + 80026ea: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 80027e8: 429a cmp r2, r3 - 80027ea: d121 bne.n 8002830 + 80026ec: 429a cmp r2, r3 + 80026ee: d121 bne.n 8002734 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 80027ec: 68fb ldr r3, [r7, #12] - 80027ee: f003 023f and.w r2, r3, #63 ; 0x3f - 80027f2: 687b ldr r3, [r7, #4] - 80027f4: 6a1b ldr r3, [r3, #32] + 80026f0: 68fb ldr r3, [r7, #12] + 80026f2: f003 023f and.w r2, r3, #63 ; 0x3f + 80026f6: 687b ldr r3, [r7, #4] + 80026f8: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80027f6: 429a cmp r2, r3 - 80027f8: d11a bne.n 8002830 + 80026fa: 429a cmp r2, r3 + 80026fc: d11a bne.n 8002734 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 80027fa: 68fa ldr r2, [r7, #12] - 80027fc: f647 73c0 movw r3, #32704 ; 0x7fc0 - 8002800: 4013 ands r3, r2 - 8002802: 687a ldr r2, [r7, #4] - 8002804: 6a52 ldr r2, [r2, #36] ; 0x24 - 8002806: 0192 lsls r2, r2, #6 + 80026fe: 68fa ldr r2, [r7, #12] + 8002700: f647 73c0 movw r3, #32704 ; 0x7fc0 + 8002704: 4013 ands r3, r2 + 8002706: 687a ldr r2, [r7, #4] + 8002708: 6a52 ldr r2, [r2, #36] ; 0x24 + 800270a: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 8002808: 4293 cmp r3, r2 - 800280a: d111 bne.n 8002830 + 800270c: 4293 cmp r3, r2 + 800270e: d111 bne.n 8002734 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 800280c: 68fb ldr r3, [r7, #12] - 800280e: f403 3240 and.w r2, r3, #196608 ; 0x30000 - 8002812: 687b ldr r3, [r7, #4] - 8002814: 6a9b ldr r3, [r3, #40] ; 0x28 - 8002816: 085b lsrs r3, r3, #1 - 8002818: 3b01 subs r3, #1 - 800281a: 041b lsls r3, r3, #16 + 8002710: 68fb ldr r3, [r7, #12] + 8002712: f403 3240 and.w r2, r3, #196608 ; 0x30000 + 8002716: 687b ldr r3, [r7, #4] + 8002718: 6a9b ldr r3, [r3, #40] ; 0x28 + 800271a: 085b lsrs r3, r3, #1 + 800271c: 3b01 subs r3, #1 + 800271e: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 800281c: 429a cmp r2, r3 - 800281e: d107 bne.n 8002830 + 8002720: 429a cmp r2, r3 + 8002722: d107 bne.n 8002734 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) - 8002820: 68fb ldr r3, [r7, #12] - 8002822: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 - 8002826: 687b ldr r3, [r7, #4] - 8002828: 6adb ldr r3, [r3, #44] ; 0x2c - 800282a: 061b lsls r3, r3, #24 + 8002724: 68fb ldr r3, [r7, #12] + 8002726: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 + 800272a: 687b ldr r3, [r7, #4] + 800272c: 6adb ldr r3, [r3, #44] ; 0x2c + 800272e: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 800282c: 429a cmp r2, r3 - 800282e: d001 beq.n 8002834 + 8002730: 429a cmp r2, r3 + 8002732: d001 beq.n 8002738 #endif /* RCC_PLLCFGR_PLLR */ { return HAL_ERROR; - 8002830: 2301 movs r3, #1 - 8002832: e000 b.n 8002836 + 8002734: 2301 movs r3, #1 + 8002736: e000 b.n 800273a } } } } return HAL_OK; - 8002834: 2300 movs r3, #0 + 8002738: 2300 movs r3, #0 } - 8002836: 4618 mov r0, r3 - 8002838: 3718 adds r7, #24 - 800283a: 46bd mov sp, r7 - 800283c: bd80 pop {r7, pc} - 800283e: bf00 nop - 8002840: 40023800 .word 0x40023800 + 800273a: 4618 mov r0, r3 + 800273c: 3718 adds r7, #24 + 800273e: 46bd mov sp, r7 + 8002740: bd80 pop {r7, pc} + 8002742: bf00 nop + 8002744: 40023800 .word 0x40023800 -08002844 : +08002748 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8002844: b580 push {r7, lr} - 8002846: b084 sub sp, #16 - 8002848: af00 add r7, sp, #0 - 800284a: 6078 str r0, [r7, #4] - 800284c: 6039 str r1, [r7, #0] + 8002748: b580 push {r7, lr} + 800274a: b084 sub sp, #16 + 800274c: af00 add r7, sp, #0 + 800274e: 6078 str r0, [r7, #4] + 8002750: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 800284e: 687b ldr r3, [r7, #4] - 8002850: 2b00 cmp r3, #0 - 8002852: d101 bne.n 8002858 + 8002752: 687b ldr r3, [r7, #4] + 8002754: 2b00 cmp r3, #0 + 8002756: d101 bne.n 800275c { return HAL_ERROR; - 8002854: 2301 movs r3, #1 - 8002856: e0cc b.n 80029f2 + 8002758: 2301 movs r3, #1 + 800275a: e0cc b.n 80028f6 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8002858: 4b68 ldr r3, [pc, #416] ; (80029fc ) - 800285a: 681b ldr r3, [r3, #0] - 800285c: f003 030f and.w r3, r3, #15 - 8002860: 683a ldr r2, [r7, #0] - 8002862: 429a cmp r2, r3 - 8002864: d90c bls.n 8002880 + 800275c: 4b68 ldr r3, [pc, #416] ; (8002900 ) + 800275e: 681b ldr r3, [r3, #0] + 8002760: f003 030f and.w r3, r3, #15 + 8002764: 683a ldr r2, [r7, #0] + 8002766: 429a cmp r2, r3 + 8002768: d90c bls.n 8002784 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8002866: 4b65 ldr r3, [pc, #404] ; (80029fc ) - 8002868: 683a ldr r2, [r7, #0] - 800286a: b2d2 uxtb r2, r2 - 800286c: 701a strb r2, [r3, #0] + 800276a: 4b65 ldr r3, [pc, #404] ; (8002900 ) + 800276c: 683a ldr r2, [r7, #0] + 800276e: b2d2 uxtb r2, r2 + 8002770: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 800286e: 4b63 ldr r3, [pc, #396] ; (80029fc ) - 8002870: 681b ldr r3, [r3, #0] - 8002872: f003 030f and.w r3, r3, #15 - 8002876: 683a ldr r2, [r7, #0] - 8002878: 429a cmp r2, r3 - 800287a: d001 beq.n 8002880 + 8002772: 4b63 ldr r3, [pc, #396] ; (8002900 ) + 8002774: 681b ldr r3, [r3, #0] + 8002776: f003 030f and.w r3, r3, #15 + 800277a: 683a ldr r2, [r7, #0] + 800277c: 429a cmp r2, r3 + 800277e: d001 beq.n 8002784 { return HAL_ERROR; - 800287c: 2301 movs r3, #1 - 800287e: e0b8 b.n 80029f2 + 8002780: 2301 movs r3, #1 + 8002782: e0b8 b.n 80028f6 } } /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8002880: 687b ldr r3, [r7, #4] - 8002882: 681b ldr r3, [r3, #0] - 8002884: f003 0302 and.w r3, r3, #2 - 8002888: 2b00 cmp r3, #0 - 800288a: d020 beq.n 80028ce + 8002784: 687b ldr r3, [r7, #4] + 8002786: 681b ldr r3, [r3, #0] + 8002788: f003 0302 and.w r3, r3, #2 + 800278c: 2b00 cmp r3, #0 + 800278e: d020 beq.n 80027d2 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800288c: 687b ldr r3, [r7, #4] - 800288e: 681b ldr r3, [r3, #0] - 8002890: f003 0304 and.w r3, r3, #4 - 8002894: 2b00 cmp r3, #0 - 8002896: d005 beq.n 80028a4 + 8002790: 687b ldr r3, [r7, #4] + 8002792: 681b ldr r3, [r3, #0] + 8002794: f003 0304 and.w r3, r3, #4 + 8002798: 2b00 cmp r3, #0 + 800279a: d005 beq.n 80027a8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8002898: 4b59 ldr r3, [pc, #356] ; (8002a00 ) - 800289a: 689b ldr r3, [r3, #8] - 800289c: 4a58 ldr r2, [pc, #352] ; (8002a00 ) - 800289e: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 - 80028a2: 6093 str r3, [r2, #8] + 800279c: 4b59 ldr r3, [pc, #356] ; (8002904 ) + 800279e: 689b ldr r3, [r3, #8] + 80027a0: 4a58 ldr r2, [pc, #352] ; (8002904 ) + 80027a2: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 + 80027a6: 6093 str r3, [r2, #8] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 80028a4: 687b ldr r3, [r7, #4] - 80028a6: 681b ldr r3, [r3, #0] - 80028a8: f003 0308 and.w r3, r3, #8 - 80028ac: 2b00 cmp r3, #0 - 80028ae: d005 beq.n 80028bc + 80027a8: 687b ldr r3, [r7, #4] + 80027aa: 681b ldr r3, [r3, #0] + 80027ac: f003 0308 and.w r3, r3, #8 + 80027b0: 2b00 cmp r3, #0 + 80027b2: d005 beq.n 80027c0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 80028b0: 4b53 ldr r3, [pc, #332] ; (8002a00 ) - 80028b2: 689b ldr r3, [r3, #8] - 80028b4: 4a52 ldr r2, [pc, #328] ; (8002a00 ) - 80028b6: f443 4360 orr.w r3, r3, #57344 ; 0xe000 - 80028ba: 6093 str r3, [r2, #8] + 80027b4: 4b53 ldr r3, [pc, #332] ; (8002904 ) + 80027b6: 689b ldr r3, [r3, #8] + 80027b8: 4a52 ldr r2, [pc, #328] ; (8002904 ) + 80027ba: f443 4360 orr.w r3, r3, #57344 ; 0xe000 + 80027be: 6093 str r3, [r2, #8] } assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 80028bc: 4b50 ldr r3, [pc, #320] ; (8002a00 ) - 80028be: 689b ldr r3, [r3, #8] - 80028c0: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 80028c4: 687b ldr r3, [r7, #4] - 80028c6: 689b ldr r3, [r3, #8] - 80028c8: 494d ldr r1, [pc, #308] ; (8002a00 ) - 80028ca: 4313 orrs r3, r2 - 80028cc: 608b str r3, [r1, #8] + 80027c0: 4b50 ldr r3, [pc, #320] ; (8002904 ) + 80027c2: 689b ldr r3, [r3, #8] + 80027c4: f023 02f0 bic.w r2, r3, #240 ; 0xf0 + 80027c8: 687b ldr r3, [r7, #4] + 80027ca: 689b ldr r3, [r3, #8] + 80027cc: 494d ldr r1, [pc, #308] ; (8002904 ) + 80027ce: 4313 orrs r3, r2 + 80027d0: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 80028ce: 687b ldr r3, [r7, #4] - 80028d0: 681b ldr r3, [r3, #0] - 80028d2: f003 0301 and.w r3, r3, #1 - 80028d6: 2b00 cmp r3, #0 - 80028d8: d044 beq.n 8002964 + 80027d2: 687b ldr r3, [r7, #4] + 80027d4: 681b ldr r3, [r3, #0] + 80027d6: f003 0301 and.w r3, r3, #1 + 80027da: 2b00 cmp r3, #0 + 80027dc: d044 beq.n 8002868 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 80028da: 687b ldr r3, [r7, #4] - 80028dc: 685b ldr r3, [r3, #4] - 80028de: 2b01 cmp r3, #1 - 80028e0: d107 bne.n 80028f2 + 80027de: 687b ldr r3, [r7, #4] + 80027e0: 685b ldr r3, [r3, #4] + 80027e2: 2b01 cmp r3, #1 + 80027e4: d107 bne.n 80027f6 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80028e2: 4b47 ldr r3, [pc, #284] ; (8002a00 ) - 80028e4: 681b ldr r3, [r3, #0] - 80028e6: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80028ea: 2b00 cmp r3, #0 - 80028ec: d119 bne.n 8002922 + 80027e6: 4b47 ldr r3, [pc, #284] ; (8002904 ) + 80027e8: 681b ldr r3, [r3, #0] + 80027ea: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80027ee: 2b00 cmp r3, #0 + 80027f0: d119 bne.n 8002826 { return HAL_ERROR; - 80028ee: 2301 movs r3, #1 - 80028f0: e07f b.n 80029f2 + 80027f2: 2301 movs r3, #1 + 80027f4: e07f b.n 80028f6 } } /* PLL is selected as System Clock Source */ else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 80028f2: 687b ldr r3, [r7, #4] - 80028f4: 685b ldr r3, [r3, #4] - 80028f6: 2b02 cmp r3, #2 - 80028f8: d003 beq.n 8002902 + 80027f6: 687b ldr r3, [r7, #4] + 80027f8: 685b ldr r3, [r3, #4] + 80027fa: 2b02 cmp r3, #2 + 80027fc: d003 beq.n 8002806 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) - 80028fa: 687b ldr r3, [r7, #4] - 80028fc: 685b ldr r3, [r3, #4] + 80027fe: 687b ldr r3, [r7, #4] + 8002800: 685b ldr r3, [r3, #4] else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 80028fe: 2b03 cmp r3, #3 - 8002900: d107 bne.n 8002912 + 8002802: 2b03 cmp r3, #3 + 8002804: d107 bne.n 8002816 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8002902: 4b3f ldr r3, [pc, #252] ; (8002a00 ) - 8002904: 681b ldr r3, [r3, #0] - 8002906: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 800290a: 2b00 cmp r3, #0 - 800290c: d109 bne.n 8002922 + 8002806: 4b3f ldr r3, [pc, #252] ; (8002904 ) + 8002808: 681b ldr r3, [r3, #0] + 800280a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 800280e: 2b00 cmp r3, #0 + 8002810: d109 bne.n 8002826 { return HAL_ERROR; - 800290e: 2301 movs r3, #1 - 8002910: e06f b.n 80029f2 + 8002812: 2301 movs r3, #1 + 8002814: e06f b.n 80028f6 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8002912: 4b3b ldr r3, [pc, #236] ; (8002a00 ) - 8002914: 681b ldr r3, [r3, #0] - 8002916: f003 0302 and.w r3, r3, #2 - 800291a: 2b00 cmp r3, #0 - 800291c: d101 bne.n 8002922 + 8002816: 4b3b ldr r3, [pc, #236] ; (8002904 ) + 8002818: 681b ldr r3, [r3, #0] + 800281a: f003 0302 and.w r3, r3, #2 + 800281e: 2b00 cmp r3, #0 + 8002820: d101 bne.n 8002826 { return HAL_ERROR; - 800291e: 2301 movs r3, #1 - 8002920: e067 b.n 80029f2 + 8002822: 2301 movs r3, #1 + 8002824: e067 b.n 80028f6 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8002922: 4b37 ldr r3, [pc, #220] ; (8002a00 ) - 8002924: 689b ldr r3, [r3, #8] - 8002926: f023 0203 bic.w r2, r3, #3 - 800292a: 687b ldr r3, [r7, #4] - 800292c: 685b ldr r3, [r3, #4] - 800292e: 4934 ldr r1, [pc, #208] ; (8002a00 ) - 8002930: 4313 orrs r3, r2 - 8002932: 608b str r3, [r1, #8] + 8002826: 4b37 ldr r3, [pc, #220] ; (8002904 ) + 8002828: 689b ldr r3, [r3, #8] + 800282a: f023 0203 bic.w r2, r3, #3 + 800282e: 687b ldr r3, [r7, #4] + 8002830: 685b ldr r3, [r3, #4] + 8002832: 4934 ldr r1, [pc, #208] ; (8002904 ) + 8002834: 4313 orrs r3, r2 + 8002836: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002934: f7fe fcfc bl 8001330 - 8002938: 60f8 str r0, [r7, #12] + 8002838: f7fe fdba bl 80013b0 + 800283c: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 800293a: e00a b.n 8002952 + 800283e: e00a b.n 8002856 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 800293c: f7fe fcf8 bl 8001330 - 8002940: 4602 mov r2, r0 - 8002942: 68fb ldr r3, [r7, #12] - 8002944: 1ad3 subs r3, r2, r3 - 8002946: f241 3288 movw r2, #5000 ; 0x1388 - 800294a: 4293 cmp r3, r2 - 800294c: d901 bls.n 8002952 + 8002840: f7fe fdb6 bl 80013b0 + 8002844: 4602 mov r2, r0 + 8002846: 68fb ldr r3, [r7, #12] + 8002848: 1ad3 subs r3, r2, r3 + 800284a: f241 3288 movw r2, #5000 ; 0x1388 + 800284e: 4293 cmp r3, r2 + 8002850: d901 bls.n 8002856 { return HAL_TIMEOUT; - 800294e: 2303 movs r3, #3 - 8002950: e04f b.n 80029f2 + 8002852: 2303 movs r3, #3 + 8002854: e04f b.n 80028f6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8002952: 4b2b ldr r3, [pc, #172] ; (8002a00 ) - 8002954: 689b ldr r3, [r3, #8] - 8002956: f003 020c and.w r2, r3, #12 - 800295a: 687b ldr r3, [r7, #4] - 800295c: 685b ldr r3, [r3, #4] - 800295e: 009b lsls r3, r3, #2 - 8002960: 429a cmp r2, r3 - 8002962: d1eb bne.n 800293c + 8002856: 4b2b ldr r3, [pc, #172] ; (8002904 ) + 8002858: 689b ldr r3, [r3, #8] + 800285a: f003 020c and.w r2, r3, #12 + 800285e: 687b ldr r3, [r7, #4] + 8002860: 685b ldr r3, [r3, #4] + 8002862: 009b lsls r3, r3, #2 + 8002864: 429a cmp r2, r3 + 8002866: d1eb bne.n 8002840 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 8002964: 4b25 ldr r3, [pc, #148] ; (80029fc ) - 8002966: 681b ldr r3, [r3, #0] - 8002968: f003 030f and.w r3, r3, #15 - 800296c: 683a ldr r2, [r7, #0] - 800296e: 429a cmp r2, r3 - 8002970: d20c bcs.n 800298c + 8002868: 4b25 ldr r3, [pc, #148] ; (8002900 ) + 800286a: 681b ldr r3, [r3, #0] + 800286c: f003 030f and.w r3, r3, #15 + 8002870: 683a ldr r2, [r7, #0] + 8002872: 429a cmp r2, r3 + 8002874: d20c bcs.n 8002890 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8002972: 4b22 ldr r3, [pc, #136] ; (80029fc ) - 8002974: 683a ldr r2, [r7, #0] - 8002976: b2d2 uxtb r2, r2 - 8002978: 701a strb r2, [r3, #0] + 8002876: 4b22 ldr r3, [pc, #136] ; (8002900 ) + 8002878: 683a ldr r2, [r7, #0] + 800287a: b2d2 uxtb r2, r2 + 800287c: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 800297a: 4b20 ldr r3, [pc, #128] ; (80029fc ) - 800297c: 681b ldr r3, [r3, #0] - 800297e: f003 030f and.w r3, r3, #15 - 8002982: 683a ldr r2, [r7, #0] - 8002984: 429a cmp r2, r3 - 8002986: d001 beq.n 800298c + 800287e: 4b20 ldr r3, [pc, #128] ; (8002900 ) + 8002880: 681b ldr r3, [r3, #0] + 8002882: f003 030f and.w r3, r3, #15 + 8002886: 683a ldr r2, [r7, #0] + 8002888: 429a cmp r2, r3 + 800288a: d001 beq.n 8002890 { return HAL_ERROR; - 8002988: 2301 movs r3, #1 - 800298a: e032 b.n 80029f2 + 800288c: 2301 movs r3, #1 + 800288e: e032 b.n 80028f6 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800298c: 687b ldr r3, [r7, #4] - 800298e: 681b ldr r3, [r3, #0] - 8002990: f003 0304 and.w r3, r3, #4 - 8002994: 2b00 cmp r3, #0 - 8002996: d008 beq.n 80029aa + 8002890: 687b ldr r3, [r7, #4] + 8002892: 681b ldr r3, [r3, #0] + 8002894: f003 0304 and.w r3, r3, #4 + 8002898: 2b00 cmp r3, #0 + 800289a: d008 beq.n 80028ae { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8002998: 4b19 ldr r3, [pc, #100] ; (8002a00 ) - 800299a: 689b ldr r3, [r3, #8] - 800299c: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 - 80029a0: 687b ldr r3, [r7, #4] - 80029a2: 68db ldr r3, [r3, #12] - 80029a4: 4916 ldr r1, [pc, #88] ; (8002a00 ) - 80029a6: 4313 orrs r3, r2 - 80029a8: 608b str r3, [r1, #8] + 800289c: 4b19 ldr r3, [pc, #100] ; (8002904 ) + 800289e: 689b ldr r3, [r3, #8] + 80028a0: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 + 80028a4: 687b ldr r3, [r7, #4] + 80028a6: 68db ldr r3, [r3, #12] + 80028a8: 4916 ldr r1, [pc, #88] ; (8002904 ) + 80028aa: 4313 orrs r3, r2 + 80028ac: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 80029aa: 687b ldr r3, [r7, #4] - 80029ac: 681b ldr r3, [r3, #0] - 80029ae: f003 0308 and.w r3, r3, #8 - 80029b2: 2b00 cmp r3, #0 - 80029b4: d009 beq.n 80029ca + 80028ae: 687b ldr r3, [r7, #4] + 80028b0: 681b ldr r3, [r3, #0] + 80028b2: f003 0308 and.w r3, r3, #8 + 80028b6: 2b00 cmp r3, #0 + 80028b8: d009 beq.n 80028ce { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 80029b6: 4b12 ldr r3, [pc, #72] ; (8002a00 ) - 80029b8: 689b ldr r3, [r3, #8] - 80029ba: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 80029be: 687b ldr r3, [r7, #4] - 80029c0: 691b ldr r3, [r3, #16] - 80029c2: 00db lsls r3, r3, #3 - 80029c4: 490e ldr r1, [pc, #56] ; (8002a00 ) - 80029c6: 4313 orrs r3, r2 - 80029c8: 608b str r3, [r1, #8] + 80028ba: 4b12 ldr r3, [pc, #72] ; (8002904 ) + 80028bc: 689b ldr r3, [r3, #8] + 80028be: f423 4260 bic.w r2, r3, #57344 ; 0xe000 + 80028c2: 687b ldr r3, [r7, #4] + 80028c4: 691b ldr r3, [r3, #16] + 80028c6: 00db lsls r3, r3, #3 + 80028c8: 490e ldr r1, [pc, #56] ; (8002904 ) + 80028ca: 4313 orrs r3, r2 + 80028cc: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - 80029ca: f000 f821 bl 8002a10 - 80029ce: 4602 mov r2, r0 - 80029d0: 4b0b ldr r3, [pc, #44] ; (8002a00 ) - 80029d2: 689b ldr r3, [r3, #8] - 80029d4: 091b lsrs r3, r3, #4 - 80029d6: f003 030f and.w r3, r3, #15 - 80029da: 490a ldr r1, [pc, #40] ; (8002a04 ) - 80029dc: 5ccb ldrb r3, [r1, r3] - 80029de: fa22 f303 lsr.w r3, r2, r3 - 80029e2: 4a09 ldr r2, [pc, #36] ; (8002a08 ) - 80029e4: 6013 str r3, [r2, #0] + 80028ce: f000 f821 bl 8002914 + 80028d2: 4602 mov r2, r0 + 80028d4: 4b0b ldr r3, [pc, #44] ; (8002904 ) + 80028d6: 689b ldr r3, [r3, #8] + 80028d8: 091b lsrs r3, r3, #4 + 80028da: f003 030f and.w r3, r3, #15 + 80028de: 490a ldr r1, [pc, #40] ; (8002908 ) + 80028e0: 5ccb ldrb r3, [r1, r3] + 80028e2: fa22 f303 lsr.w r3, r2, r3 + 80028e6: 4a09 ldr r2, [pc, #36] ; (800290c ) + 80028e8: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings */ HAL_InitTick(uwTickPrio); - 80029e6: 4b09 ldr r3, [pc, #36] ; (8002a0c ) - 80029e8: 681b ldr r3, [r3, #0] - 80029ea: 4618 mov r0, r3 - 80029ec: f7fe fc5c bl 80012a8 + 80028ea: 4b09 ldr r3, [pc, #36] ; (8002910 ) + 80028ec: 681b ldr r3, [r3, #0] + 80028ee: 4618 mov r0, r3 + 80028f0: f7fe fd1a bl 8001328 return HAL_OK; - 80029f0: 2300 movs r3, #0 + 80028f4: 2300 movs r3, #0 } - 80029f2: 4618 mov r0, r3 - 80029f4: 3710 adds r7, #16 - 80029f6: 46bd mov sp, r7 - 80029f8: bd80 pop {r7, pc} - 80029fa: bf00 nop - 80029fc: 40023c00 .word 0x40023c00 - 8002a00: 40023800 .word 0x40023800 - 8002a04: 08004568 .word 0x08004568 - 8002a08: 200006b8 .word 0x200006b8 - 8002a0c: 200006bc .word 0x200006bc + 80028f6: 4618 mov r0, r3 + 80028f8: 3710 adds r7, #16 + 80028fa: 46bd mov sp, r7 + 80028fc: bd80 pop {r7, pc} + 80028fe: bf00 nop + 8002900: 40023c00 .word 0x40023c00 + 8002904: 40023800 .word 0x40023800 + 8002908: 08003c68 .word 0x08003c68 + 800290c: 200006b8 .word 0x200006b8 + 8002910: 200006bc .word 0x200006bc -08002a10 : +08002914 : * * * @retval SYSCLK frequency */ __weak uint32_t HAL_RCC_GetSysClockFreq(void) { - 8002a10: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 8002a14: b094 sub sp, #80 ; 0x50 - 8002a16: af00 add r7, sp, #0 + 8002914: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 8002918: b094 sub sp, #80 ; 0x50 + 800291a: af00 add r7, sp, #0 uint32_t pllm = 0U; - 8002a18: 2300 movs r3, #0 - 8002a1a: 647b str r3, [r7, #68] ; 0x44 + 800291c: 2300 movs r3, #0 + 800291e: 647b str r3, [r7, #68] ; 0x44 uint32_t pllvco = 0U; - 8002a1c: 2300 movs r3, #0 - 8002a1e: 64fb str r3, [r7, #76] ; 0x4c + 8002920: 2300 movs r3, #0 + 8002922: 64fb str r3, [r7, #76] ; 0x4c uint32_t pllp = 0U; - 8002a20: 2300 movs r3, #0 - 8002a22: 643b str r3, [r7, #64] ; 0x40 + 8002924: 2300 movs r3, #0 + 8002926: 643b str r3, [r7, #64] ; 0x40 uint32_t sysclockfreq = 0U; - 8002a24: 2300 movs r3, #0 - 8002a26: 64bb str r3, [r7, #72] ; 0x48 + 8002928: 2300 movs r3, #0 + 800292a: 64bb str r3, [r7, #72] ; 0x48 /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) - 8002a28: 4b79 ldr r3, [pc, #484] ; (8002c10 ) - 8002a2a: 689b ldr r3, [r3, #8] - 8002a2c: f003 030c and.w r3, r3, #12 - 8002a30: 2b08 cmp r3, #8 - 8002a32: d00d beq.n 8002a50 - 8002a34: 2b08 cmp r3, #8 - 8002a36: f200 80e1 bhi.w 8002bfc - 8002a3a: 2b00 cmp r3, #0 - 8002a3c: d002 beq.n 8002a44 - 8002a3e: 2b04 cmp r3, #4 - 8002a40: d003 beq.n 8002a4a - 8002a42: e0db b.n 8002bfc + 800292c: 4b79 ldr r3, [pc, #484] ; (8002b14 ) + 800292e: 689b ldr r3, [r3, #8] + 8002930: f003 030c and.w r3, r3, #12 + 8002934: 2b08 cmp r3, #8 + 8002936: d00d beq.n 8002954 + 8002938: 2b08 cmp r3, #8 + 800293a: f200 80e1 bhi.w 8002b00 + 800293e: 2b00 cmp r3, #0 + 8002940: d002 beq.n 8002948 + 8002942: 2b04 cmp r3, #4 + 8002944: d003 beq.n 800294e + 8002946: e0db b.n 8002b00 { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; - 8002a44: 4b73 ldr r3, [pc, #460] ; (8002c14 ) - 8002a46: 64bb str r3, [r7, #72] ; 0x48 + 8002948: 4b73 ldr r3, [pc, #460] ; (8002b18 ) + 800294a: 64bb str r3, [r7, #72] ; 0x48 break; - 8002a48: e0db b.n 8002c02 + 800294c: e0db b.n 8002b06 } case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; - 8002a4a: 4b73 ldr r3, [pc, #460] ; (8002c18 ) - 8002a4c: 64bb str r3, [r7, #72] ; 0x48 + 800294e: 4b73 ldr r3, [pc, #460] ; (8002b1c ) + 8002950: 64bb str r3, [r7, #72] ; 0x48 break; - 8002a4e: e0d8 b.n 8002c02 + 8002952: e0d8 b.n 8002b06 } case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - 8002a50: 4b6f ldr r3, [pc, #444] ; (8002c10 ) - 8002a52: 685b ldr r3, [r3, #4] - 8002a54: f003 033f and.w r3, r3, #63 ; 0x3f - 8002a58: 647b str r3, [r7, #68] ; 0x44 + 8002954: 4b6f ldr r3, [pc, #444] ; (8002b14 ) + 8002956: 685b ldr r3, [r3, #4] + 8002958: f003 033f and.w r3, r3, #63 ; 0x3f + 800295c: 647b str r3, [r7, #68] ; 0x44 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 8002a5a: 4b6d ldr r3, [pc, #436] ; (8002c10 ) - 8002a5c: 685b ldr r3, [r3, #4] - 8002a5e: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8002a62: 2b00 cmp r3, #0 - 8002a64: d063 beq.n 8002b2e + 800295e: 4b6d ldr r3, [pc, #436] ; (8002b14 ) + 8002960: 685b ldr r3, [r3, #4] + 8002962: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8002966: 2b00 cmp r3, #0 + 8002968: d063 beq.n 8002a32 { /* HSE used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 8002a66: 4b6a ldr r3, [pc, #424] ; (8002c10 ) - 8002a68: 685b ldr r3, [r3, #4] - 8002a6a: 099b lsrs r3, r3, #6 - 8002a6c: 2200 movs r2, #0 - 8002a6e: 63bb str r3, [r7, #56] ; 0x38 - 8002a70: 63fa str r2, [r7, #60] ; 0x3c - 8002a72: 6bbb ldr r3, [r7, #56] ; 0x38 - 8002a74: f3c3 0308 ubfx r3, r3, #0, #9 - 8002a78: 633b str r3, [r7, #48] ; 0x30 - 8002a7a: 2300 movs r3, #0 - 8002a7c: 637b str r3, [r7, #52] ; 0x34 - 8002a7e: e9d7 450c ldrd r4, r5, [r7, #48] ; 0x30 - 8002a82: 4622 mov r2, r4 - 8002a84: 462b mov r3, r5 - 8002a86: f04f 0000 mov.w r0, #0 - 8002a8a: f04f 0100 mov.w r1, #0 - 8002a8e: 0159 lsls r1, r3, #5 - 8002a90: ea41 61d2 orr.w r1, r1, r2, lsr #27 - 8002a94: 0150 lsls r0, r2, #5 - 8002a96: 4602 mov r2, r0 - 8002a98: 460b mov r3, r1 - 8002a9a: 4621 mov r1, r4 - 8002a9c: 1a51 subs r1, r2, r1 - 8002a9e: 6139 str r1, [r7, #16] - 8002aa0: 4629 mov r1, r5 - 8002aa2: eb63 0301 sbc.w r3, r3, r1 - 8002aa6: 617b str r3, [r7, #20] - 8002aa8: f04f 0200 mov.w r2, #0 - 8002aac: f04f 0300 mov.w r3, #0 - 8002ab0: e9d7 ab04 ldrd sl, fp, [r7, #16] - 8002ab4: 4659 mov r1, fp - 8002ab6: 018b lsls r3, r1, #6 - 8002ab8: 4651 mov r1, sl - 8002aba: ea43 6391 orr.w r3, r3, r1, lsr #26 - 8002abe: 4651 mov r1, sl - 8002ac0: 018a lsls r2, r1, #6 - 8002ac2: 4651 mov r1, sl - 8002ac4: ebb2 0801 subs.w r8, r2, r1 - 8002ac8: 4659 mov r1, fp - 8002aca: eb63 0901 sbc.w r9, r3, r1 - 8002ace: f04f 0200 mov.w r2, #0 - 8002ad2: f04f 0300 mov.w r3, #0 - 8002ad6: ea4f 03c9 mov.w r3, r9, lsl #3 - 8002ada: ea43 7358 orr.w r3, r3, r8, lsr #29 - 8002ade: ea4f 02c8 mov.w r2, r8, lsl #3 - 8002ae2: 4690 mov r8, r2 - 8002ae4: 4699 mov r9, r3 - 8002ae6: 4623 mov r3, r4 - 8002ae8: eb18 0303 adds.w r3, r8, r3 - 8002aec: 60bb str r3, [r7, #8] - 8002aee: 462b mov r3, r5 - 8002af0: eb49 0303 adc.w r3, r9, r3 - 8002af4: 60fb str r3, [r7, #12] - 8002af6: f04f 0200 mov.w r2, #0 - 8002afa: f04f 0300 mov.w r3, #0 - 8002afe: e9d7 4502 ldrd r4, r5, [r7, #8] - 8002b02: 4629 mov r1, r5 - 8002b04: 024b lsls r3, r1, #9 - 8002b06: 4621 mov r1, r4 - 8002b08: ea43 53d1 orr.w r3, r3, r1, lsr #23 - 8002b0c: 4621 mov r1, r4 - 8002b0e: 024a lsls r2, r1, #9 - 8002b10: 4610 mov r0, r2 - 8002b12: 4619 mov r1, r3 - 8002b14: 6c7b ldr r3, [r7, #68] ; 0x44 - 8002b16: 2200 movs r2, #0 - 8002b18: 62bb str r3, [r7, #40] ; 0x28 - 8002b1a: 62fa str r2, [r7, #44] ; 0x2c - 8002b1c: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 - 8002b20: f7fd fb6c bl 80001fc <__aeabi_uldivmod> - 8002b24: 4602 mov r2, r0 - 8002b26: 460b mov r3, r1 - 8002b28: 4613 mov r3, r2 - 8002b2a: 64fb str r3, [r7, #76] ; 0x4c - 8002b2c: e058 b.n 8002be0 + 800296a: 4b6a ldr r3, [pc, #424] ; (8002b14 ) + 800296c: 685b ldr r3, [r3, #4] + 800296e: 099b lsrs r3, r3, #6 + 8002970: 2200 movs r2, #0 + 8002972: 63bb str r3, [r7, #56] ; 0x38 + 8002974: 63fa str r2, [r7, #60] ; 0x3c + 8002976: 6bbb ldr r3, [r7, #56] ; 0x38 + 8002978: f3c3 0308 ubfx r3, r3, #0, #9 + 800297c: 633b str r3, [r7, #48] ; 0x30 + 800297e: 2300 movs r3, #0 + 8002980: 637b str r3, [r7, #52] ; 0x34 + 8002982: e9d7 450c ldrd r4, r5, [r7, #48] ; 0x30 + 8002986: 4622 mov r2, r4 + 8002988: 462b mov r3, r5 + 800298a: f04f 0000 mov.w r0, #0 + 800298e: f04f 0100 mov.w r1, #0 + 8002992: 0159 lsls r1, r3, #5 + 8002994: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 8002998: 0150 lsls r0, r2, #5 + 800299a: 4602 mov r2, r0 + 800299c: 460b mov r3, r1 + 800299e: 4621 mov r1, r4 + 80029a0: 1a51 subs r1, r2, r1 + 80029a2: 6139 str r1, [r7, #16] + 80029a4: 4629 mov r1, r5 + 80029a6: eb63 0301 sbc.w r3, r3, r1 + 80029aa: 617b str r3, [r7, #20] + 80029ac: f04f 0200 mov.w r2, #0 + 80029b0: f04f 0300 mov.w r3, #0 + 80029b4: e9d7 ab04 ldrd sl, fp, [r7, #16] + 80029b8: 4659 mov r1, fp + 80029ba: 018b lsls r3, r1, #6 + 80029bc: 4651 mov r1, sl + 80029be: ea43 6391 orr.w r3, r3, r1, lsr #26 + 80029c2: 4651 mov r1, sl + 80029c4: 018a lsls r2, r1, #6 + 80029c6: 4651 mov r1, sl + 80029c8: ebb2 0801 subs.w r8, r2, r1 + 80029cc: 4659 mov r1, fp + 80029ce: eb63 0901 sbc.w r9, r3, r1 + 80029d2: f04f 0200 mov.w r2, #0 + 80029d6: f04f 0300 mov.w r3, #0 + 80029da: ea4f 03c9 mov.w r3, r9, lsl #3 + 80029de: ea43 7358 orr.w r3, r3, r8, lsr #29 + 80029e2: ea4f 02c8 mov.w r2, r8, lsl #3 + 80029e6: 4690 mov r8, r2 + 80029e8: 4699 mov r9, r3 + 80029ea: 4623 mov r3, r4 + 80029ec: eb18 0303 adds.w r3, r8, r3 + 80029f0: 60bb str r3, [r7, #8] + 80029f2: 462b mov r3, r5 + 80029f4: eb49 0303 adc.w r3, r9, r3 + 80029f8: 60fb str r3, [r7, #12] + 80029fa: f04f 0200 mov.w r2, #0 + 80029fe: f04f 0300 mov.w r3, #0 + 8002a02: e9d7 4502 ldrd r4, r5, [r7, #8] + 8002a06: 4629 mov r1, r5 + 8002a08: 024b lsls r3, r1, #9 + 8002a0a: 4621 mov r1, r4 + 8002a0c: ea43 53d1 orr.w r3, r3, r1, lsr #23 + 8002a10: 4621 mov r1, r4 + 8002a12: 024a lsls r2, r1, #9 + 8002a14: 4610 mov r0, r2 + 8002a16: 4619 mov r1, r3 + 8002a18: 6c7b ldr r3, [r7, #68] ; 0x44 + 8002a1a: 2200 movs r2, #0 + 8002a1c: 62bb str r3, [r7, #40] ; 0x28 + 8002a1e: 62fa str r2, [r7, #44] ; 0x2c + 8002a20: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 + 8002a24: f7fd fbea bl 80001fc <__aeabi_uldivmod> + 8002a28: 4602 mov r2, r0 + 8002a2a: 460b mov r3, r1 + 8002a2c: 4613 mov r3, r2 + 8002a2e: 64fb str r3, [r7, #76] ; 0x4c + 8002a30: e058 b.n 8002ae4 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 8002b2e: 4b38 ldr r3, [pc, #224] ; (8002c10 ) - 8002b30: 685b ldr r3, [r3, #4] - 8002b32: 099b lsrs r3, r3, #6 - 8002b34: 2200 movs r2, #0 - 8002b36: 4618 mov r0, r3 - 8002b38: 4611 mov r1, r2 - 8002b3a: f3c0 0308 ubfx r3, r0, #0, #9 - 8002b3e: 623b str r3, [r7, #32] - 8002b40: 2300 movs r3, #0 - 8002b42: 627b str r3, [r7, #36] ; 0x24 - 8002b44: e9d7 8908 ldrd r8, r9, [r7, #32] - 8002b48: 4642 mov r2, r8 - 8002b4a: 464b mov r3, r9 - 8002b4c: f04f 0000 mov.w r0, #0 - 8002b50: f04f 0100 mov.w r1, #0 - 8002b54: 0159 lsls r1, r3, #5 - 8002b56: ea41 61d2 orr.w r1, r1, r2, lsr #27 - 8002b5a: 0150 lsls r0, r2, #5 - 8002b5c: 4602 mov r2, r0 - 8002b5e: 460b mov r3, r1 - 8002b60: 4641 mov r1, r8 - 8002b62: ebb2 0a01 subs.w sl, r2, r1 - 8002b66: 4649 mov r1, r9 - 8002b68: eb63 0b01 sbc.w fp, r3, r1 - 8002b6c: f04f 0200 mov.w r2, #0 - 8002b70: f04f 0300 mov.w r3, #0 - 8002b74: ea4f 138b mov.w r3, fp, lsl #6 - 8002b78: ea43 639a orr.w r3, r3, sl, lsr #26 - 8002b7c: ea4f 128a mov.w r2, sl, lsl #6 - 8002b80: ebb2 040a subs.w r4, r2, sl - 8002b84: eb63 050b sbc.w r5, r3, fp - 8002b88: f04f 0200 mov.w r2, #0 - 8002b8c: f04f 0300 mov.w r3, #0 - 8002b90: 00eb lsls r3, r5, #3 - 8002b92: ea43 7354 orr.w r3, r3, r4, lsr #29 - 8002b96: 00e2 lsls r2, r4, #3 - 8002b98: 4614 mov r4, r2 - 8002b9a: 461d mov r5, r3 - 8002b9c: 4643 mov r3, r8 - 8002b9e: 18e3 adds r3, r4, r3 - 8002ba0: 603b str r3, [r7, #0] - 8002ba2: 464b mov r3, r9 - 8002ba4: eb45 0303 adc.w r3, r5, r3 - 8002ba8: 607b str r3, [r7, #4] - 8002baa: f04f 0200 mov.w r2, #0 - 8002bae: f04f 0300 mov.w r3, #0 - 8002bb2: e9d7 4500 ldrd r4, r5, [r7] - 8002bb6: 4629 mov r1, r5 - 8002bb8: 028b lsls r3, r1, #10 - 8002bba: 4621 mov r1, r4 - 8002bbc: ea43 5391 orr.w r3, r3, r1, lsr #22 - 8002bc0: 4621 mov r1, r4 - 8002bc2: 028a lsls r2, r1, #10 - 8002bc4: 4610 mov r0, r2 - 8002bc6: 4619 mov r1, r3 - 8002bc8: 6c7b ldr r3, [r7, #68] ; 0x44 - 8002bca: 2200 movs r2, #0 - 8002bcc: 61bb str r3, [r7, #24] - 8002bce: 61fa str r2, [r7, #28] - 8002bd0: e9d7 2306 ldrd r2, r3, [r7, #24] - 8002bd4: f7fd fb12 bl 80001fc <__aeabi_uldivmod> - 8002bd8: 4602 mov r2, r0 - 8002bda: 460b mov r3, r1 - 8002bdc: 4613 mov r3, r2 - 8002bde: 64fb str r3, [r7, #76] ; 0x4c + 8002a32: 4b38 ldr r3, [pc, #224] ; (8002b14 ) + 8002a34: 685b ldr r3, [r3, #4] + 8002a36: 099b lsrs r3, r3, #6 + 8002a38: 2200 movs r2, #0 + 8002a3a: 4618 mov r0, r3 + 8002a3c: 4611 mov r1, r2 + 8002a3e: f3c0 0308 ubfx r3, r0, #0, #9 + 8002a42: 623b str r3, [r7, #32] + 8002a44: 2300 movs r3, #0 + 8002a46: 627b str r3, [r7, #36] ; 0x24 + 8002a48: e9d7 8908 ldrd r8, r9, [r7, #32] + 8002a4c: 4642 mov r2, r8 + 8002a4e: 464b mov r3, r9 + 8002a50: f04f 0000 mov.w r0, #0 + 8002a54: f04f 0100 mov.w r1, #0 + 8002a58: 0159 lsls r1, r3, #5 + 8002a5a: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 8002a5e: 0150 lsls r0, r2, #5 + 8002a60: 4602 mov r2, r0 + 8002a62: 460b mov r3, r1 + 8002a64: 4641 mov r1, r8 + 8002a66: ebb2 0a01 subs.w sl, r2, r1 + 8002a6a: 4649 mov r1, r9 + 8002a6c: eb63 0b01 sbc.w fp, r3, r1 + 8002a70: f04f 0200 mov.w r2, #0 + 8002a74: f04f 0300 mov.w r3, #0 + 8002a78: ea4f 138b mov.w r3, fp, lsl #6 + 8002a7c: ea43 639a orr.w r3, r3, sl, lsr #26 + 8002a80: ea4f 128a mov.w r2, sl, lsl #6 + 8002a84: ebb2 040a subs.w r4, r2, sl + 8002a88: eb63 050b sbc.w r5, r3, fp + 8002a8c: f04f 0200 mov.w r2, #0 + 8002a90: f04f 0300 mov.w r3, #0 + 8002a94: 00eb lsls r3, r5, #3 + 8002a96: ea43 7354 orr.w r3, r3, r4, lsr #29 + 8002a9a: 00e2 lsls r2, r4, #3 + 8002a9c: 4614 mov r4, r2 + 8002a9e: 461d mov r5, r3 + 8002aa0: 4643 mov r3, r8 + 8002aa2: 18e3 adds r3, r4, r3 + 8002aa4: 603b str r3, [r7, #0] + 8002aa6: 464b mov r3, r9 + 8002aa8: eb45 0303 adc.w r3, r5, r3 + 8002aac: 607b str r3, [r7, #4] + 8002aae: f04f 0200 mov.w r2, #0 + 8002ab2: f04f 0300 mov.w r3, #0 + 8002ab6: e9d7 4500 ldrd r4, r5, [r7] + 8002aba: 4629 mov r1, r5 + 8002abc: 028b lsls r3, r1, #10 + 8002abe: 4621 mov r1, r4 + 8002ac0: ea43 5391 orr.w r3, r3, r1, lsr #22 + 8002ac4: 4621 mov r1, r4 + 8002ac6: 028a lsls r2, r1, #10 + 8002ac8: 4610 mov r0, r2 + 8002aca: 4619 mov r1, r3 + 8002acc: 6c7b ldr r3, [r7, #68] ; 0x44 + 8002ace: 2200 movs r2, #0 + 8002ad0: 61bb str r3, [r7, #24] + 8002ad2: 61fa str r2, [r7, #28] + 8002ad4: e9d7 2306 ldrd r2, r3, [r7, #24] + 8002ad8: f7fd fb90 bl 80001fc <__aeabi_uldivmod> + 8002adc: 4602 mov r2, r0 + 8002ade: 460b mov r3, r1 + 8002ae0: 4613 mov r3, r2 + 8002ae2: 64fb str r3, [r7, #76] ; 0x4c } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U); - 8002be0: 4b0b ldr r3, [pc, #44] ; (8002c10 ) - 8002be2: 685b ldr r3, [r3, #4] - 8002be4: 0c1b lsrs r3, r3, #16 - 8002be6: f003 0303 and.w r3, r3, #3 - 8002bea: 3301 adds r3, #1 - 8002bec: 005b lsls r3, r3, #1 - 8002bee: 643b str r3, [r7, #64] ; 0x40 + 8002ae4: 4b0b ldr r3, [pc, #44] ; (8002b14 ) + 8002ae6: 685b ldr r3, [r3, #4] + 8002ae8: 0c1b lsrs r3, r3, #16 + 8002aea: f003 0303 and.w r3, r3, #3 + 8002aee: 3301 adds r3, #1 + 8002af0: 005b lsls r3, r3, #1 + 8002af2: 643b str r3, [r7, #64] ; 0x40 sysclockfreq = pllvco / pllp; - 8002bf0: 6cfa ldr r2, [r7, #76] ; 0x4c - 8002bf2: 6c3b ldr r3, [r7, #64] ; 0x40 - 8002bf4: fbb2 f3f3 udiv r3, r2, r3 - 8002bf8: 64bb str r3, [r7, #72] ; 0x48 + 8002af4: 6cfa ldr r2, [r7, #76] ; 0x4c + 8002af6: 6c3b ldr r3, [r7, #64] ; 0x40 + 8002af8: fbb2 f3f3 udiv r3, r2, r3 + 8002afc: 64bb str r3, [r7, #72] ; 0x48 break; - 8002bfa: e002 b.n 8002c02 + 8002afe: e002 b.n 8002b06 } default: { sysclockfreq = HSI_VALUE; - 8002bfc: 4b05 ldr r3, [pc, #20] ; (8002c14 ) - 8002bfe: 64bb str r3, [r7, #72] ; 0x48 + 8002b00: 4b05 ldr r3, [pc, #20] ; (8002b18 ) + 8002b02: 64bb str r3, [r7, #72] ; 0x48 break; - 8002c00: bf00 nop + 8002b04: bf00 nop } } return sysclockfreq; - 8002c02: 6cbb ldr r3, [r7, #72] ; 0x48 + 8002b06: 6cbb ldr r3, [r7, #72] ; 0x48 } - 8002c04: 4618 mov r0, r3 - 8002c06: 3750 adds r7, #80 ; 0x50 - 8002c08: 46bd mov sp, r7 - 8002c0a: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 8002c0e: bf00 nop - 8002c10: 40023800 .word 0x40023800 - 8002c14: 00f42400 .word 0x00f42400 - 8002c18: 007a1200 .word 0x007a1200 + 8002b08: 4618 mov r0, r3 + 8002b0a: 3750 adds r7, #80 ; 0x50 + 8002b0c: 46bd mov sp, r7 + 8002b0e: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 8002b12: bf00 nop + 8002b14: 40023800 .word 0x40023800 + 8002b18: 00f42400 .word 0x00f42400 + 8002b1c: 007a1200 .word 0x007a1200 -08002c1c : +08002b20 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8002c1c: b480 push {r7} - 8002c1e: af00 add r7, sp, #0 + 8002b20: b480 push {r7} + 8002b22: af00 add r7, sp, #0 return SystemCoreClock; - 8002c20: 4b03 ldr r3, [pc, #12] ; (8002c30 ) - 8002c22: 681b ldr r3, [r3, #0] + 8002b24: 4b03 ldr r3, [pc, #12] ; (8002b34 ) + 8002b26: 681b ldr r3, [r3, #0] } - 8002c24: 4618 mov r0, r3 - 8002c26: 46bd mov sp, r7 - 8002c28: f85d 7b04 ldr.w r7, [sp], #4 - 8002c2c: 4770 bx lr - 8002c2e: bf00 nop - 8002c30: 200006b8 .word 0x200006b8 + 8002b28: 4618 mov r0, r3 + 8002b2a: 46bd mov sp, r7 + 8002b2c: f85d 7b04 ldr.w r7, [sp], #4 + 8002b30: 4770 bx lr + 8002b32: bf00 nop + 8002b34: 200006b8 .word 0x200006b8 -08002c34 : +08002b38 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8002c34: b580 push {r7, lr} - 8002c36: af00 add r7, sp, #0 + 8002b38: b580 push {r7, lr} + 8002b3a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8002c38: f7ff fff0 bl 8002c1c - 8002c3c: 4602 mov r2, r0 - 8002c3e: 4b05 ldr r3, [pc, #20] ; (8002c54 ) - 8002c40: 689b ldr r3, [r3, #8] - 8002c42: 0a9b lsrs r3, r3, #10 - 8002c44: f003 0307 and.w r3, r3, #7 - 8002c48: 4903 ldr r1, [pc, #12] ; (8002c58 ) - 8002c4a: 5ccb ldrb r3, [r1, r3] - 8002c4c: fa22 f303 lsr.w r3, r2, r3 + 8002b3c: f7ff fff0 bl 8002b20 + 8002b40: 4602 mov r2, r0 + 8002b42: 4b05 ldr r3, [pc, #20] ; (8002b58 ) + 8002b44: 689b ldr r3, [r3, #8] + 8002b46: 0a9b lsrs r3, r3, #10 + 8002b48: f003 0307 and.w r3, r3, #7 + 8002b4c: 4903 ldr r1, [pc, #12] ; (8002b5c ) + 8002b4e: 5ccb ldrb r3, [r1, r3] + 8002b50: fa22 f303 lsr.w r3, r2, r3 } - 8002c50: 4618 mov r0, r3 - 8002c52: bd80 pop {r7, pc} - 8002c54: 40023800 .word 0x40023800 - 8002c58: 08004578 .word 0x08004578 + 8002b54: 4618 mov r0, r3 + 8002b56: bd80 pop {r7, pc} + 8002b58: 40023800 .word 0x40023800 + 8002b5c: 08003c78 .word 0x08003c78 -08002c5c : +08002b60 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 8002c5c: b580 push {r7, lr} - 8002c5e: af00 add r7, sp, #0 + 8002b60: b580 push {r7, lr} + 8002b62: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 8002c60: f7ff ffdc bl 8002c1c - 8002c64: 4602 mov r2, r0 - 8002c66: 4b05 ldr r3, [pc, #20] ; (8002c7c ) - 8002c68: 689b ldr r3, [r3, #8] - 8002c6a: 0b5b lsrs r3, r3, #13 - 8002c6c: f003 0307 and.w r3, r3, #7 - 8002c70: 4903 ldr r1, [pc, #12] ; (8002c80 ) - 8002c72: 5ccb ldrb r3, [r1, r3] - 8002c74: fa22 f303 lsr.w r3, r2, r3 + 8002b64: f7ff ffdc bl 8002b20 + 8002b68: 4602 mov r2, r0 + 8002b6a: 4b05 ldr r3, [pc, #20] ; (8002b80 ) + 8002b6c: 689b ldr r3, [r3, #8] + 8002b6e: 0b5b lsrs r3, r3, #13 + 8002b70: f003 0307 and.w r3, r3, #7 + 8002b74: 4903 ldr r1, [pc, #12] ; (8002b84 ) + 8002b76: 5ccb ldrb r3, [r1, r3] + 8002b78: fa22 f303 lsr.w r3, r2, r3 } - 8002c78: 4618 mov r0, r3 - 8002c7a: bd80 pop {r7, pc} - 8002c7c: 40023800 .word 0x40023800 - 8002c80: 08004578 .word 0x08004578 + 8002b7c: 4618 mov r0, r3 + 8002b7e: bd80 pop {r7, pc} + 8002b80: 40023800 .word 0x40023800 + 8002b84: 08003c78 .word 0x08003c78 -08002c84 : +08002b88 : * @param hrng pointer to a RNG_HandleTypeDef structure that contains * the configuration information for RNG. * @retval HAL status */ HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng) { - 8002c84: b580 push {r7, lr} - 8002c86: b082 sub sp, #8 - 8002c88: af00 add r7, sp, #0 - 8002c8a: 6078 str r0, [r7, #4] + 8002b88: b580 push {r7, lr} + 8002b8a: b082 sub sp, #8 + 8002b8c: af00 add r7, sp, #0 + 8002b8e: 6078 str r0, [r7, #4] /* Check the RNG handle allocation */ if (hrng == NULL) - 8002c8c: 687b ldr r3, [r7, #4] - 8002c8e: 2b00 cmp r3, #0 - 8002c90: d101 bne.n 8002c96 + 8002b90: 687b ldr r3, [r7, #4] + 8002b92: 2b00 cmp r3, #0 + 8002b94: d101 bne.n 8002b9a { return HAL_ERROR; - 8002c92: 2301 movs r3, #1 - 8002c94: e01c b.n 8002cd0 + 8002b96: 2301 movs r3, #1 + 8002b98: e01c b.n 8002bd4 /* Init the low level hardware */ hrng->MspInitCallback(hrng); } #else if (hrng->State == HAL_RNG_STATE_RESET) - 8002c96: 687b ldr r3, [r7, #4] - 8002c98: 795b ldrb r3, [r3, #5] - 8002c9a: b2db uxtb r3, r3 - 8002c9c: 2b00 cmp r3, #0 - 8002c9e: d105 bne.n 8002cac + 8002b9a: 687b ldr r3, [r7, #4] + 8002b9c: 795b ldrb r3, [r3, #5] + 8002b9e: b2db uxtb r3, r3 + 8002ba0: 2b00 cmp r3, #0 + 8002ba2: d105 bne.n 8002bb0 { /* Allocate lock resource and initialize it */ hrng->Lock = HAL_UNLOCKED; - 8002ca0: 687b ldr r3, [r7, #4] - 8002ca2: 2200 movs r2, #0 - 8002ca4: 711a strb r2, [r3, #4] + 8002ba4: 687b ldr r3, [r7, #4] + 8002ba6: 2200 movs r2, #0 + 8002ba8: 711a strb r2, [r3, #4] /* Init the low level hardware */ HAL_RNG_MspInit(hrng); - 8002ca6: 6878 ldr r0, [r7, #4] - 8002ca8: f7fe f9a0 bl 8000fec + 8002baa: 6878 ldr r0, [r7, #4] + 8002bac: f7fe fa38 bl 8001020 } #endif /* USE_HAL_RNG_REGISTER_CALLBACKS */ /* Change RNG peripheral state */ hrng->State = HAL_RNG_STATE_BUSY; - 8002cac: 687b ldr r3, [r7, #4] - 8002cae: 2202 movs r2, #2 - 8002cb0: 715a strb r2, [r3, #5] + 8002bb0: 687b ldr r3, [r7, #4] + 8002bb2: 2202 movs r2, #2 + 8002bb4: 715a strb r2, [r3, #5] /* Enable the RNG Peripheral */ __HAL_RNG_ENABLE(hrng); - 8002cb2: 687b ldr r3, [r7, #4] - 8002cb4: 681b ldr r3, [r3, #0] - 8002cb6: 681a ldr r2, [r3, #0] - 8002cb8: 687b ldr r3, [r7, #4] - 8002cba: 681b ldr r3, [r3, #0] - 8002cbc: f042 0204 orr.w r2, r2, #4 - 8002cc0: 601a str r2, [r3, #0] + 8002bb6: 687b ldr r3, [r7, #4] + 8002bb8: 681b ldr r3, [r3, #0] + 8002bba: 681a ldr r2, [r3, #0] + 8002bbc: 687b ldr r3, [r7, #4] + 8002bbe: 681b ldr r3, [r3, #0] + 8002bc0: f042 0204 orr.w r2, r2, #4 + 8002bc4: 601a str r2, [r3, #0] /* Initialize the RNG state */ hrng->State = HAL_RNG_STATE_READY; - 8002cc2: 687b ldr r3, [r7, #4] - 8002cc4: 2201 movs r2, #1 - 8002cc6: 715a strb r2, [r3, #5] + 8002bc6: 687b ldr r3, [r7, #4] + 8002bc8: 2201 movs r2, #1 + 8002bca: 715a strb r2, [r3, #5] /* Initialise the error code */ hrng->ErrorCode = HAL_RNG_ERROR_NONE; - 8002cc8: 687b ldr r3, [r7, #4] - 8002cca: 2200 movs r2, #0 - 8002ccc: 609a str r2, [r3, #8] + 8002bcc: 687b ldr r3, [r7, #4] + 8002bce: 2200 movs r2, #0 + 8002bd0: 609a str r2, [r3, #8] /* Return function status */ return HAL_OK; - 8002cce: 2300 movs r3, #0 + 8002bd2: 2300 movs r3, #0 } - 8002cd0: 4618 mov r0, r3 - 8002cd2: 3708 adds r7, #8 - 8002cd4: 46bd mov sp, r7 - 8002cd6: bd80 pop {r7, pc} + 8002bd4: 4618 mov r0, r3 + 8002bd6: 3708 adds r7, #8 + 8002bd8: 46bd mov sp, r7 + 8002bda: bd80 pop {r7, pc} -08002cd8 : +08002bdc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8002cd8: b580 push {r7, lr} - 8002cda: b082 sub sp, #8 - 8002cdc: af00 add r7, sp, #0 - 8002cde: 6078 str r0, [r7, #4] + 8002bdc: b580 push {r7, lr} + 8002bde: b082 sub sp, #8 + 8002be0: af00 add r7, sp, #0 + 8002be2: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8002ce0: 687b ldr r3, [r7, #4] - 8002ce2: 2b00 cmp r3, #0 - 8002ce4: d101 bne.n 8002cea + 8002be4: 687b ldr r3, [r7, #4] + 8002be6: 2b00 cmp r3, #0 + 8002be8: d101 bne.n 8002bee { return HAL_ERROR; - 8002ce6: 2301 movs r3, #1 - 8002ce8: e042 b.n 8002d70 + 8002bea: 2301 movs r3, #1 + 8002bec: e042 b.n 8002c74 assert_param(IS_UART_INSTANCE(huart->Instance)); } assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); if (huart->gState == HAL_UART_STATE_RESET) - 8002cea: 687b ldr r3, [r7, #4] - 8002cec: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 8002cf0: b2db uxtb r3, r3 - 8002cf2: 2b00 cmp r3, #0 - 8002cf4: d106 bne.n 8002d04 + 8002bee: 687b ldr r3, [r7, #4] + 8002bf0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 8002bf4: b2db uxtb r3, r3 + 8002bf6: 2b00 cmp r3, #0 + 8002bf8: d106 bne.n 8002c08 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8002cf6: 687b ldr r3, [r7, #4] - 8002cf8: 2200 movs r2, #0 - 8002cfa: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 8002bfa: 687b ldr r3, [r7, #4] + 8002bfc: 2200 movs r2, #0 + 8002bfe: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8002cfe: 6878 ldr r0, [r7, #4] - 8002d00: f7fe f996 bl 8001030 + 8002c02: 6878 ldr r0, [r7, #4] + 8002c04: f7fe fa2e bl 8001064 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8002d04: 687b ldr r3, [r7, #4] - 8002d06: 2224 movs r2, #36 ; 0x24 - 8002d08: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 8002c08: 687b ldr r3, [r7, #4] + 8002c0a: 2224 movs r2, #36 ; 0x24 + 8002c0c: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 8002d0c: 687b ldr r3, [r7, #4] - 8002d0e: 681b ldr r3, [r3, #0] - 8002d10: 68da ldr r2, [r3, #12] - 8002d12: 687b ldr r3, [r7, #4] - 8002d14: 681b ldr r3, [r3, #0] - 8002d16: f422 5200 bic.w r2, r2, #8192 ; 0x2000 - 8002d1a: 60da str r2, [r3, #12] + 8002c10: 687b ldr r3, [r7, #4] + 8002c12: 681b ldr r3, [r3, #0] + 8002c14: 68da ldr r2, [r3, #12] + 8002c16: 687b ldr r3, [r7, #4] + 8002c18: 681b ldr r3, [r3, #0] + 8002c1a: f422 5200 bic.w r2, r2, #8192 ; 0x2000 + 8002c1e: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 8002d1c: 6878 ldr r0, [r7, #4] - 8002d1e: f000 fe0b bl 8003938 + 8002c20: 6878 ldr r0, [r7, #4] + 8002c22: f000 fa09 bl 8003038 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8002d22: 687b ldr r3, [r7, #4] - 8002d24: 681b ldr r3, [r3, #0] - 8002d26: 691a ldr r2, [r3, #16] - 8002d28: 687b ldr r3, [r7, #4] - 8002d2a: 681b ldr r3, [r3, #0] - 8002d2c: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 8002d30: 611a str r2, [r3, #16] + 8002c26: 687b ldr r3, [r7, #4] + 8002c28: 681b ldr r3, [r3, #0] + 8002c2a: 691a ldr r2, [r3, #16] + 8002c2c: 687b ldr r3, [r7, #4] + 8002c2e: 681b ldr r3, [r3, #0] + 8002c30: f422 4290 bic.w r2, r2, #18432 ; 0x4800 + 8002c34: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8002d32: 687b ldr r3, [r7, #4] - 8002d34: 681b ldr r3, [r3, #0] - 8002d36: 695a ldr r2, [r3, #20] - 8002d38: 687b ldr r3, [r7, #4] - 8002d3a: 681b ldr r3, [r3, #0] - 8002d3c: f022 022a bic.w r2, r2, #42 ; 0x2a - 8002d40: 615a str r2, [r3, #20] + 8002c36: 687b ldr r3, [r7, #4] + 8002c38: 681b ldr r3, [r3, #0] + 8002c3a: 695a ldr r2, [r3, #20] + 8002c3c: 687b ldr r3, [r7, #4] + 8002c3e: 681b ldr r3, [r3, #0] + 8002c40: f022 022a bic.w r2, r2, #42 ; 0x2a + 8002c44: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 8002d42: 687b ldr r3, [r7, #4] - 8002d44: 681b ldr r3, [r3, #0] - 8002d46: 68da ldr r2, [r3, #12] - 8002d48: 687b ldr r3, [r7, #4] - 8002d4a: 681b ldr r3, [r3, #0] - 8002d4c: f442 5200 orr.w r2, r2, #8192 ; 0x2000 - 8002d50: 60da str r2, [r3, #12] + 8002c46: 687b ldr r3, [r7, #4] + 8002c48: 681b ldr r3, [r3, #0] + 8002c4a: 68da ldr r2, [r3, #12] + 8002c4c: 687b ldr r3, [r7, #4] + 8002c4e: 681b ldr r3, [r3, #0] + 8002c50: f442 5200 orr.w r2, r2, #8192 ; 0x2000 + 8002c54: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8002d52: 687b ldr r3, [r7, #4] - 8002d54: 2200 movs r2, #0 - 8002d56: 645a str r2, [r3, #68] ; 0x44 + 8002c56: 687b ldr r3, [r7, #4] + 8002c58: 2200 movs r2, #0 + 8002c5a: 645a str r2, [r3, #68] ; 0x44 huart->gState = HAL_UART_STATE_READY; - 8002d58: 687b ldr r3, [r7, #4] - 8002d5a: 2220 movs r2, #32 - 8002d5c: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 8002c5c: 687b ldr r3, [r7, #4] + 8002c5e: 2220 movs r2, #32 + 8002c60: f883 2041 strb.w r2, [r3, #65] ; 0x41 huart->RxState = HAL_UART_STATE_READY; - 8002d60: 687b ldr r3, [r7, #4] - 8002d62: 2220 movs r2, #32 - 8002d64: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 8002c64: 687b ldr r3, [r7, #4] + 8002c66: 2220 movs r2, #32 + 8002c68: f883 2042 strb.w r2, [r3, #66] ; 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8002d68: 687b ldr r3, [r7, #4] - 8002d6a: 2200 movs r2, #0 - 8002d6c: 635a str r2, [r3, #52] ; 0x34 + 8002c6c: 687b ldr r3, [r7, #4] + 8002c6e: 2200 movs r2, #0 + 8002c70: 635a str r2, [r3, #52] ; 0x34 return HAL_OK; - 8002d6e: 2300 movs r3, #0 + 8002c72: 2300 movs r3, #0 } - 8002d70: 4618 mov r0, r3 - 8002d72: 3708 adds r7, #8 - 8002d74: 46bd mov sp, r7 - 8002d76: bd80 pop {r7, pc} + 8002c74: 4618 mov r0, r3 + 8002c76: 3708 adds r7, #8 + 8002c78: 46bd mov sp, r7 + 8002c7a: bd80 pop {r7, pc} -08002d78 : +08002c7c : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8002d78: b580 push {r7, lr} - 8002d7a: b08a sub sp, #40 ; 0x28 - 8002d7c: af02 add r7, sp, #8 - 8002d7e: 60f8 str r0, [r7, #12] - 8002d80: 60b9 str r1, [r7, #8] - 8002d82: 603b str r3, [r7, #0] - 8002d84: 4613 mov r3, r2 - 8002d86: 80fb strh r3, [r7, #6] + 8002c7c: b580 push {r7, lr} + 8002c7e: b08a sub sp, #40 ; 0x28 + 8002c80: af02 add r7, sp, #8 + 8002c82: 60f8 str r0, [r7, #12] + 8002c84: 60b9 str r1, [r7, #8] + 8002c86: 603b str r3, [r7, #0] + 8002c88: 4613 mov r3, r2 + 8002c8a: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; - 8002d88: 2300 movs r3, #0 - 8002d8a: 617b str r3, [r7, #20] + 8002c8c: 2300 movs r3, #0 + 8002c8e: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8002d8c: 68fb ldr r3, [r7, #12] - 8002d8e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 8002d92: b2db uxtb r3, r3 - 8002d94: 2b20 cmp r3, #32 - 8002d96: d175 bne.n 8002e84 + 8002c90: 68fb ldr r3, [r7, #12] + 8002c92: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 8002c96: b2db uxtb r3, r3 + 8002c98: 2b20 cmp r3, #32 + 8002c9a: d175 bne.n 8002d88 { if ((pData == NULL) || (Size == 0U)) - 8002d98: 68bb ldr r3, [r7, #8] - 8002d9a: 2b00 cmp r3, #0 - 8002d9c: d002 beq.n 8002da4 - 8002d9e: 88fb ldrh r3, [r7, #6] - 8002da0: 2b00 cmp r3, #0 - 8002da2: d101 bne.n 8002da8 + 8002c9c: 68bb ldr r3, [r7, #8] + 8002c9e: 2b00 cmp r3, #0 + 8002ca0: d002 beq.n 8002ca8 + 8002ca2: 88fb ldrh r3, [r7, #6] + 8002ca4: 2b00 cmp r3, #0 + 8002ca6: d101 bne.n 8002cac { return HAL_ERROR; - 8002da4: 2301 movs r3, #1 - 8002da6: e06e b.n 8002e86 + 8002ca8: 2301 movs r3, #1 + 8002caa: e06e b.n 8002d8a } huart->ErrorCode = HAL_UART_ERROR_NONE; - 8002da8: 68fb ldr r3, [r7, #12] - 8002daa: 2200 movs r2, #0 - 8002dac: 645a str r2, [r3, #68] ; 0x44 + 8002cac: 68fb ldr r3, [r7, #12] + 8002cae: 2200 movs r2, #0 + 8002cb0: 645a str r2, [r3, #68] ; 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; - 8002dae: 68fb ldr r3, [r7, #12] - 8002db0: 2221 movs r2, #33 ; 0x21 - 8002db2: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 8002cb2: 68fb ldr r3, [r7, #12] + 8002cb4: 2221 movs r2, #33 ; 0x21 + 8002cb6: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8002db6: f7fe fabb bl 8001330 - 8002dba: 6178 str r0, [r7, #20] + 8002cba: f7fe fb79 bl 80013b0 + 8002cbe: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 8002dbc: 68fb ldr r3, [r7, #12] - 8002dbe: 88fa ldrh r2, [r7, #6] - 8002dc0: 849a strh r2, [r3, #36] ; 0x24 + 8002cc0: 68fb ldr r3, [r7, #12] + 8002cc2: 88fa ldrh r2, [r7, #6] + 8002cc4: 849a strh r2, [r3, #36] ; 0x24 huart->TxXferCount = Size; - 8002dc2: 68fb ldr r3, [r7, #12] - 8002dc4: 88fa ldrh r2, [r7, #6] - 8002dc6: 84da strh r2, [r3, #38] ; 0x26 + 8002cc6: 68fb ldr r3, [r7, #12] + 8002cc8: 88fa ldrh r2, [r7, #6] + 8002cca: 84da strh r2, [r3, #38] ; 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8002dc8: 68fb ldr r3, [r7, #12] - 8002dca: 689b ldr r3, [r3, #8] - 8002dcc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002dd0: d108 bne.n 8002de4 - 8002dd2: 68fb ldr r3, [r7, #12] - 8002dd4: 691b ldr r3, [r3, #16] - 8002dd6: 2b00 cmp r3, #0 - 8002dd8: d104 bne.n 8002de4 + 8002ccc: 68fb ldr r3, [r7, #12] + 8002cce: 689b ldr r3, [r3, #8] + 8002cd0: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8002cd4: d108 bne.n 8002ce8 + 8002cd6: 68fb ldr r3, [r7, #12] + 8002cd8: 691b ldr r3, [r3, #16] + 8002cda: 2b00 cmp r3, #0 + 8002cdc: d104 bne.n 8002ce8 { pdata8bits = NULL; - 8002dda: 2300 movs r3, #0 - 8002ddc: 61fb str r3, [r7, #28] + 8002cde: 2300 movs r3, #0 + 8002ce0: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 8002dde: 68bb ldr r3, [r7, #8] - 8002de0: 61bb str r3, [r7, #24] - 8002de2: e003 b.n 8002dec + 8002ce2: 68bb ldr r3, [r7, #8] + 8002ce4: 61bb str r3, [r7, #24] + 8002ce6: e003 b.n 8002cf0 } else { pdata8bits = pData; - 8002de4: 68bb ldr r3, [r7, #8] - 8002de6: 61fb str r3, [r7, #28] + 8002ce8: 68bb ldr r3, [r7, #8] + 8002cea: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8002de8: 2300 movs r3, #0 - 8002dea: 61bb str r3, [r7, #24] + 8002cec: 2300 movs r3, #0 + 8002cee: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 8002dec: e02e b.n 8002e4c + 8002cf0: e02e b.n 8002d50 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8002dee: 683b ldr r3, [r7, #0] - 8002df0: 9300 str r3, [sp, #0] - 8002df2: 697b ldr r3, [r7, #20] - 8002df4: 2200 movs r2, #0 - 8002df6: 2180 movs r1, #128 ; 0x80 - 8002df8: 68f8 ldr r0, [r7, #12] - 8002dfa: f000 fba9 bl 8003550 - 8002dfe: 4603 mov r3, r0 - 8002e00: 2b00 cmp r3, #0 - 8002e02: d005 beq.n 8002e10 + 8002cf2: 683b ldr r3, [r7, #0] + 8002cf4: 9300 str r3, [sp, #0] + 8002cf6: 697b ldr r3, [r7, #20] + 8002cf8: 2200 movs r2, #0 + 8002cfa: 2180 movs r1, #128 ; 0x80 + 8002cfc: 68f8 ldr r0, [r7, #12] + 8002cfe: f000 f8df bl 8002ec0 + 8002d02: 4603 mov r3, r0 + 8002d04: 2b00 cmp r3, #0 + 8002d06: d005 beq.n 8002d14 { huart->gState = HAL_UART_STATE_READY; - 8002e04: 68fb ldr r3, [r7, #12] - 8002e06: 2220 movs r2, #32 - 8002e08: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 8002d08: 68fb ldr r3, [r7, #12] + 8002d0a: 2220 movs r2, #32 + 8002d0c: f883 2041 strb.w r2, [r3, #65] ; 0x41 return HAL_TIMEOUT; - 8002e0c: 2303 movs r3, #3 - 8002e0e: e03a b.n 8002e86 + 8002d10: 2303 movs r3, #3 + 8002d12: e03a b.n 8002d8a } if (pdata8bits == NULL) - 8002e10: 69fb ldr r3, [r7, #28] - 8002e12: 2b00 cmp r3, #0 - 8002e14: d10b bne.n 8002e2e + 8002d14: 69fb ldr r3, [r7, #28] + 8002d16: 2b00 cmp r3, #0 + 8002d18: d10b bne.n 8002d32 { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 8002e16: 69bb ldr r3, [r7, #24] - 8002e18: 881b ldrh r3, [r3, #0] - 8002e1a: 461a mov r2, r3 - 8002e1c: 68fb ldr r3, [r7, #12] - 8002e1e: 681b ldr r3, [r3, #0] - 8002e20: f3c2 0208 ubfx r2, r2, #0, #9 - 8002e24: 605a str r2, [r3, #4] + 8002d1a: 69bb ldr r3, [r7, #24] + 8002d1c: 881b ldrh r3, [r3, #0] + 8002d1e: 461a mov r2, r3 + 8002d20: 68fb ldr r3, [r7, #12] + 8002d22: 681b ldr r3, [r3, #0] + 8002d24: f3c2 0208 ubfx r2, r2, #0, #9 + 8002d28: 605a str r2, [r3, #4] pdata16bits++; - 8002e26: 69bb ldr r3, [r7, #24] - 8002e28: 3302 adds r3, #2 - 8002e2a: 61bb str r3, [r7, #24] - 8002e2c: e007 b.n 8002e3e + 8002d2a: 69bb ldr r3, [r7, #24] + 8002d2c: 3302 adds r3, #2 + 8002d2e: 61bb str r3, [r7, #24] + 8002d30: e007 b.n 8002d42 } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 8002e2e: 69fb ldr r3, [r7, #28] - 8002e30: 781a ldrb r2, [r3, #0] - 8002e32: 68fb ldr r3, [r7, #12] - 8002e34: 681b ldr r3, [r3, #0] - 8002e36: 605a str r2, [r3, #4] + 8002d32: 69fb ldr r3, [r7, #28] + 8002d34: 781a ldrb r2, [r3, #0] + 8002d36: 68fb ldr r3, [r7, #12] + 8002d38: 681b ldr r3, [r3, #0] + 8002d3a: 605a str r2, [r3, #4] pdata8bits++; - 8002e38: 69fb ldr r3, [r7, #28] - 8002e3a: 3301 adds r3, #1 - 8002e3c: 61fb str r3, [r7, #28] + 8002d3c: 69fb ldr r3, [r7, #28] + 8002d3e: 3301 adds r3, #1 + 8002d40: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 8002e3e: 68fb ldr r3, [r7, #12] - 8002e40: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8002e42: b29b uxth r3, r3 - 8002e44: 3b01 subs r3, #1 - 8002e46: b29a uxth r2, r3 - 8002e48: 68fb ldr r3, [r7, #12] - 8002e4a: 84da strh r2, [r3, #38] ; 0x26 + 8002d42: 68fb ldr r3, [r7, #12] + 8002d44: 8cdb ldrh r3, [r3, #38] ; 0x26 + 8002d46: b29b uxth r3, r3 + 8002d48: 3b01 subs r3, #1 + 8002d4a: b29a uxth r2, r3 + 8002d4c: 68fb ldr r3, [r7, #12] + 8002d4e: 84da strh r2, [r3, #38] ; 0x26 while (huart->TxXferCount > 0U) - 8002e4c: 68fb ldr r3, [r7, #12] - 8002e4e: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8002e50: b29b uxth r3, r3 - 8002e52: 2b00 cmp r3, #0 - 8002e54: d1cb bne.n 8002dee + 8002d50: 68fb ldr r3, [r7, #12] + 8002d52: 8cdb ldrh r3, [r3, #38] ; 0x26 + 8002d54: b29b uxth r3, r3 + 8002d56: 2b00 cmp r3, #0 + 8002d58: d1cb bne.n 8002cf2 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8002e56: 683b ldr r3, [r7, #0] - 8002e58: 9300 str r3, [sp, #0] - 8002e5a: 697b ldr r3, [r7, #20] - 8002e5c: 2200 movs r2, #0 - 8002e5e: 2140 movs r1, #64 ; 0x40 - 8002e60: 68f8 ldr r0, [r7, #12] - 8002e62: f000 fb75 bl 8003550 - 8002e66: 4603 mov r3, r0 - 8002e68: 2b00 cmp r3, #0 - 8002e6a: d005 beq.n 8002e78 + 8002d5a: 683b ldr r3, [r7, #0] + 8002d5c: 9300 str r3, [sp, #0] + 8002d5e: 697b ldr r3, [r7, #20] + 8002d60: 2200 movs r2, #0 + 8002d62: 2140 movs r1, #64 ; 0x40 + 8002d64: 68f8 ldr r0, [r7, #12] + 8002d66: f000 f8ab bl 8002ec0 + 8002d6a: 4603 mov r3, r0 + 8002d6c: 2b00 cmp r3, #0 + 8002d6e: d005 beq.n 8002d7c { huart->gState = HAL_UART_STATE_READY; - 8002e6c: 68fb ldr r3, [r7, #12] - 8002e6e: 2220 movs r2, #32 - 8002e70: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 8002d70: 68fb ldr r3, [r7, #12] + 8002d72: 2220 movs r2, #32 + 8002d74: f883 2041 strb.w r2, [r3, #65] ; 0x41 return HAL_TIMEOUT; - 8002e74: 2303 movs r3, #3 - 8002e76: e006 b.n 8002e86 + 8002d78: 2303 movs r3, #3 + 8002d7a: e006 b.n 8002d8a } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8002e78: 68fb ldr r3, [r7, #12] - 8002e7a: 2220 movs r2, #32 - 8002e7c: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 8002d7c: 68fb ldr r3, [r7, #12] + 8002d7e: 2220 movs r2, #32 + 8002d80: f883 2041 strb.w r2, [r3, #65] ; 0x41 return HAL_OK; - 8002e80: 2300 movs r3, #0 - 8002e82: e000 b.n 8002e86 + 8002d84: 2300 movs r3, #0 + 8002d86: e000 b.n 8002d8a } else { return HAL_BUSY; - 8002e84: 2302 movs r3, #2 + 8002d88: 2302 movs r3, #2 } } - 8002e86: 4618 mov r0, r3 - 8002e88: 3720 adds r7, #32 - 8002e8a: 46bd mov sp, r7 - 8002e8c: bd80 pop {r7, pc} + 8002d8a: 4618 mov r0, r3 + 8002d8c: 3720 adds r7, #32 + 8002d8e: 46bd mov sp, r7 + 8002d90: bd80 pop {r7, pc} -08002e8e : +08002d92 : * @param Size Amount of data elements (u8 or u16) to be received. * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8002e8e: b580 push {r7, lr} - 8002e90: b08a sub sp, #40 ; 0x28 - 8002e92: af02 add r7, sp, #8 - 8002e94: 60f8 str r0, [r7, #12] - 8002e96: 60b9 str r1, [r7, #8] - 8002e98: 603b str r3, [r7, #0] - 8002e9a: 4613 mov r3, r2 - 8002e9c: 80fb strh r3, [r7, #6] + 8002d92: b580 push {r7, lr} + 8002d94: b08a sub sp, #40 ; 0x28 + 8002d96: af02 add r7, sp, #8 + 8002d98: 60f8 str r0, [r7, #12] + 8002d9a: 60b9 str r1, [r7, #8] + 8002d9c: 603b str r3, [r7, #0] + 8002d9e: 4613 mov r3, r2 + 8002da0: 80fb strh r3, [r7, #6] uint8_t *pdata8bits; uint16_t *pdata16bits; uint32_t tickstart = 0U; - 8002e9e: 2300 movs r3, #0 - 8002ea0: 617b str r3, [r7, #20] + 8002da2: 2300 movs r3, #0 + 8002da4: 617b str r3, [r7, #20] /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) - 8002ea2: 68fb ldr r3, [r7, #12] - 8002ea4: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 8002ea8: b2db uxtb r3, r3 - 8002eaa: 2b20 cmp r3, #32 - 8002eac: f040 8081 bne.w 8002fb2 + 8002da6: 68fb ldr r3, [r7, #12] + 8002da8: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 8002dac: b2db uxtb r3, r3 + 8002dae: 2b20 cmp r3, #32 + 8002db0: f040 8081 bne.w 8002eb6 { if ((pData == NULL) || (Size == 0U)) - 8002eb0: 68bb ldr r3, [r7, #8] - 8002eb2: 2b00 cmp r3, #0 - 8002eb4: d002 beq.n 8002ebc - 8002eb6: 88fb ldrh r3, [r7, #6] - 8002eb8: 2b00 cmp r3, #0 - 8002eba: d101 bne.n 8002ec0 + 8002db4: 68bb ldr r3, [r7, #8] + 8002db6: 2b00 cmp r3, #0 + 8002db8: d002 beq.n 8002dc0 + 8002dba: 88fb ldrh r3, [r7, #6] + 8002dbc: 2b00 cmp r3, #0 + 8002dbe: d101 bne.n 8002dc4 { return HAL_ERROR; - 8002ebc: 2301 movs r3, #1 - 8002ebe: e079 b.n 8002fb4 + 8002dc0: 2301 movs r3, #1 + 8002dc2: e079 b.n 8002eb8 } huart->ErrorCode = HAL_UART_ERROR_NONE; - 8002ec0: 68fb ldr r3, [r7, #12] - 8002ec2: 2200 movs r2, #0 - 8002ec4: 645a str r2, [r3, #68] ; 0x44 + 8002dc4: 68fb ldr r3, [r7, #12] + 8002dc6: 2200 movs r2, #0 + 8002dc8: 645a str r2, [r3, #68] ; 0x44 huart->RxState = HAL_UART_STATE_BUSY_RX; - 8002ec6: 68fb ldr r3, [r7, #12] - 8002ec8: 2222 movs r2, #34 ; 0x22 - 8002eca: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 8002dca: 68fb ldr r3, [r7, #12] + 8002dcc: 2222 movs r2, #34 ; 0x22 + 8002dce: f883 2042 strb.w r2, [r3, #66] ; 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8002ece: 68fb ldr r3, [r7, #12] - 8002ed0: 2200 movs r2, #0 - 8002ed2: 631a str r2, [r3, #48] ; 0x30 + 8002dd2: 68fb ldr r3, [r7, #12] + 8002dd4: 2200 movs r2, #0 + 8002dd6: 631a str r2, [r3, #48] ; 0x30 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8002ed4: f7fe fa2c bl 8001330 - 8002ed8: 6178 str r0, [r7, #20] + 8002dd8: f7fe faea bl 80013b0 + 8002ddc: 6178 str r0, [r7, #20] huart->RxXferSize = Size; - 8002eda: 68fb ldr r3, [r7, #12] - 8002edc: 88fa ldrh r2, [r7, #6] - 8002ede: 859a strh r2, [r3, #44] ; 0x2c + 8002dde: 68fb ldr r3, [r7, #12] + 8002de0: 88fa ldrh r2, [r7, #6] + 8002de2: 859a strh r2, [r3, #44] ; 0x2c huart->RxXferCount = Size; - 8002ee0: 68fb ldr r3, [r7, #12] - 8002ee2: 88fa ldrh r2, [r7, #6] - 8002ee4: 85da strh r2, [r3, #46] ; 0x2e + 8002de4: 68fb ldr r3, [r7, #12] + 8002de6: 88fa ldrh r2, [r7, #6] + 8002de8: 85da strh r2, [r3, #46] ; 0x2e /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8002ee6: 68fb ldr r3, [r7, #12] - 8002ee8: 689b ldr r3, [r3, #8] - 8002eea: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002eee: d108 bne.n 8002f02 - 8002ef0: 68fb ldr r3, [r7, #12] - 8002ef2: 691b ldr r3, [r3, #16] - 8002ef4: 2b00 cmp r3, #0 - 8002ef6: d104 bne.n 8002f02 + 8002dea: 68fb ldr r3, [r7, #12] + 8002dec: 689b ldr r3, [r3, #8] + 8002dee: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8002df2: d108 bne.n 8002e06 + 8002df4: 68fb ldr r3, [r7, #12] + 8002df6: 691b ldr r3, [r3, #16] + 8002df8: 2b00 cmp r3, #0 + 8002dfa: d104 bne.n 8002e06 { pdata8bits = NULL; - 8002ef8: 2300 movs r3, #0 - 8002efa: 61fb str r3, [r7, #28] + 8002dfc: 2300 movs r3, #0 + 8002dfe: 61fb str r3, [r7, #28] pdata16bits = (uint16_t *) pData; - 8002efc: 68bb ldr r3, [r7, #8] - 8002efe: 61bb str r3, [r7, #24] - 8002f00: e003 b.n 8002f0a + 8002e00: 68bb ldr r3, [r7, #8] + 8002e02: 61bb str r3, [r7, #24] + 8002e04: e003 b.n 8002e0e } else { pdata8bits = pData; - 8002f02: 68bb ldr r3, [r7, #8] - 8002f04: 61fb str r3, [r7, #28] + 8002e06: 68bb ldr r3, [r7, #8] + 8002e08: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8002f06: 2300 movs r3, #0 - 8002f08: 61bb str r3, [r7, #24] + 8002e0a: 2300 movs r3, #0 + 8002e0c: 61bb str r3, [r7, #24] } /* Check the remain data to be received */ while (huart->RxXferCount > 0U) - 8002f0a: e047 b.n 8002f9c + 8002e0e: e047 b.n 8002ea0 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) - 8002f0c: 683b ldr r3, [r7, #0] - 8002f0e: 9300 str r3, [sp, #0] - 8002f10: 697b ldr r3, [r7, #20] - 8002f12: 2200 movs r2, #0 - 8002f14: 2120 movs r1, #32 - 8002f16: 68f8 ldr r0, [r7, #12] - 8002f18: f000 fb1a bl 8003550 - 8002f1c: 4603 mov r3, r0 - 8002f1e: 2b00 cmp r3, #0 - 8002f20: d005 beq.n 8002f2e + 8002e10: 683b ldr r3, [r7, #0] + 8002e12: 9300 str r3, [sp, #0] + 8002e14: 697b ldr r3, [r7, #20] + 8002e16: 2200 movs r2, #0 + 8002e18: 2120 movs r1, #32 + 8002e1a: 68f8 ldr r0, [r7, #12] + 8002e1c: f000 f850 bl 8002ec0 + 8002e20: 4603 mov r3, r0 + 8002e22: 2b00 cmp r3, #0 + 8002e24: d005 beq.n 8002e32 { huart->RxState = HAL_UART_STATE_READY; - 8002f22: 68fb ldr r3, [r7, #12] - 8002f24: 2220 movs r2, #32 - 8002f26: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 8002e26: 68fb ldr r3, [r7, #12] + 8002e28: 2220 movs r2, #32 + 8002e2a: f883 2042 strb.w r2, [r3, #66] ; 0x42 return HAL_TIMEOUT; - 8002f2a: 2303 movs r3, #3 - 8002f2c: e042 b.n 8002fb4 + 8002e2e: 2303 movs r3, #3 + 8002e30: e042 b.n 8002eb8 } if (pdata8bits == NULL) - 8002f2e: 69fb ldr r3, [r7, #28] - 8002f30: 2b00 cmp r3, #0 - 8002f32: d10c bne.n 8002f4e + 8002e32: 69fb ldr r3, [r7, #28] + 8002e34: 2b00 cmp r3, #0 + 8002e36: d10c bne.n 8002e52 { *pdata16bits = (uint16_t)(huart->Instance->DR & 0x01FF); - 8002f34: 68fb ldr r3, [r7, #12] - 8002f36: 681b ldr r3, [r3, #0] - 8002f38: 685b ldr r3, [r3, #4] - 8002f3a: b29b uxth r3, r3 - 8002f3c: f3c3 0308 ubfx r3, r3, #0, #9 - 8002f40: b29a uxth r2, r3 - 8002f42: 69bb ldr r3, [r7, #24] - 8002f44: 801a strh r2, [r3, #0] + 8002e38: 68fb ldr r3, [r7, #12] + 8002e3a: 681b ldr r3, [r3, #0] + 8002e3c: 685b ldr r3, [r3, #4] + 8002e3e: b29b uxth r3, r3 + 8002e40: f3c3 0308 ubfx r3, r3, #0, #9 + 8002e44: b29a uxth r2, r3 + 8002e46: 69bb ldr r3, [r7, #24] + 8002e48: 801a strh r2, [r3, #0] pdata16bits++; - 8002f46: 69bb ldr r3, [r7, #24] - 8002f48: 3302 adds r3, #2 - 8002f4a: 61bb str r3, [r7, #24] - 8002f4c: e01f b.n 8002f8e + 8002e4a: 69bb ldr r3, [r7, #24] + 8002e4c: 3302 adds r3, #2 + 8002e4e: 61bb str r3, [r7, #24] + 8002e50: e01f b.n 8002e92 } else { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 8002f4e: 68fb ldr r3, [r7, #12] - 8002f50: 689b ldr r3, [r3, #8] - 8002f52: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8002f56: d007 beq.n 8002f68 - 8002f58: 68fb ldr r3, [r7, #12] - 8002f5a: 689b ldr r3, [r3, #8] - 8002f5c: 2b00 cmp r3, #0 - 8002f5e: d10a bne.n 8002f76 - 8002f60: 68fb ldr r3, [r7, #12] - 8002f62: 691b ldr r3, [r3, #16] - 8002f64: 2b00 cmp r3, #0 - 8002f66: d106 bne.n 8002f76 + 8002e52: 68fb ldr r3, [r7, #12] + 8002e54: 689b ldr r3, [r3, #8] + 8002e56: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8002e5a: d007 beq.n 8002e6c + 8002e5c: 68fb ldr r3, [r7, #12] + 8002e5e: 689b ldr r3, [r3, #8] + 8002e60: 2b00 cmp r3, #0 + 8002e62: d10a bne.n 8002e7a + 8002e64: 68fb ldr r3, [r7, #12] + 8002e66: 691b ldr r3, [r3, #16] + 8002e68: 2b00 cmp r3, #0 + 8002e6a: d106 bne.n 8002e7a { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 8002f68: 68fb ldr r3, [r7, #12] - 8002f6a: 681b ldr r3, [r3, #0] - 8002f6c: 685b ldr r3, [r3, #4] - 8002f6e: b2da uxtb r2, r3 - 8002f70: 69fb ldr r3, [r7, #28] - 8002f72: 701a strb r2, [r3, #0] - 8002f74: e008 b.n 8002f88 + 8002e6c: 68fb ldr r3, [r7, #12] + 8002e6e: 681b ldr r3, [r3, #0] + 8002e70: 685b ldr r3, [r3, #4] + 8002e72: b2da uxtb r2, r3 + 8002e74: 69fb ldr r3, [r7, #28] + 8002e76: 701a strb r2, [r3, #0] + 8002e78: e008 b.n 8002e8c } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 8002f76: 68fb ldr r3, [r7, #12] - 8002f78: 681b ldr r3, [r3, #0] - 8002f7a: 685b ldr r3, [r3, #4] - 8002f7c: b2db uxtb r3, r3 - 8002f7e: f003 037f and.w r3, r3, #127 ; 0x7f - 8002f82: b2da uxtb r2, r3 - 8002f84: 69fb ldr r3, [r7, #28] - 8002f86: 701a strb r2, [r3, #0] + 8002e7a: 68fb ldr r3, [r7, #12] + 8002e7c: 681b ldr r3, [r3, #0] + 8002e7e: 685b ldr r3, [r3, #4] + 8002e80: b2db uxtb r3, r3 + 8002e82: f003 037f and.w r3, r3, #127 ; 0x7f + 8002e86: b2da uxtb r2, r3 + 8002e88: 69fb ldr r3, [r7, #28] + 8002e8a: 701a strb r2, [r3, #0] } pdata8bits++; - 8002f88: 69fb ldr r3, [r7, #28] - 8002f8a: 3301 adds r3, #1 - 8002f8c: 61fb str r3, [r7, #28] + 8002e8c: 69fb ldr r3, [r7, #28] + 8002e8e: 3301 adds r3, #1 + 8002e90: 61fb str r3, [r7, #28] } huart->RxXferCount--; - 8002f8e: 68fb ldr r3, [r7, #12] - 8002f90: 8ddb ldrh r3, [r3, #46] ; 0x2e - 8002f92: b29b uxth r3, r3 - 8002f94: 3b01 subs r3, #1 - 8002f96: b29a uxth r2, r3 - 8002f98: 68fb ldr r3, [r7, #12] - 8002f9a: 85da strh r2, [r3, #46] ; 0x2e + 8002e92: 68fb ldr r3, [r7, #12] + 8002e94: 8ddb ldrh r3, [r3, #46] ; 0x2e + 8002e96: b29b uxth r3, r3 + 8002e98: 3b01 subs r3, #1 + 8002e9a: b29a uxth r2, r3 + 8002e9c: 68fb ldr r3, [r7, #12] + 8002e9e: 85da strh r2, [r3, #46] ; 0x2e while (huart->RxXferCount > 0U) - 8002f9c: 68fb ldr r3, [r7, #12] - 8002f9e: 8ddb ldrh r3, [r3, #46] ; 0x2e - 8002fa0: b29b uxth r3, r3 - 8002fa2: 2b00 cmp r3, #0 - 8002fa4: d1b2 bne.n 8002f0c + 8002ea0: 68fb ldr r3, [r7, #12] + 8002ea2: 8ddb ldrh r3, [r3, #46] ; 0x2e + 8002ea4: b29b uxth r3, r3 + 8002ea6: 2b00 cmp r3, #0 + 8002ea8: d1b2 bne.n 8002e10 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8002fa6: 68fb ldr r3, [r7, #12] - 8002fa8: 2220 movs r2, #32 - 8002faa: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 8002eaa: 68fb ldr r3, [r7, #12] + 8002eac: 2220 movs r2, #32 + 8002eae: f883 2042 strb.w r2, [r3, #66] ; 0x42 return HAL_OK; - 8002fae: 2300 movs r3, #0 - 8002fb0: e000 b.n 8002fb4 + 8002eb2: 2300 movs r3, #0 + 8002eb4: e000 b.n 8002eb8 } else { return HAL_BUSY; - 8002fb2: 2302 movs r3, #2 + 8002eb6: 2302 movs r3, #2 } } - 8002fb4: 4618 mov r0, r3 - 8002fb6: 3720 adds r7, #32 - 8002fb8: 46bd mov sp, r7 - 8002fba: bd80 pop {r7, pc} + 8002eb8: 4618 mov r0, r3 + 8002eba: 3720 adds r7, #32 + 8002ebc: 46bd mov sp, r7 + 8002ebe: bd80 pop {r7, pc} -08002fbc : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) -{ - 8002fbc: b580 push {r7, lr} - 8002fbe: b0ba sub sp, #232 ; 0xe8 - 8002fc0: af00 add r7, sp, #0 - 8002fc2: 6078 str r0, [r7, #4] - uint32_t isrflags = READ_REG(huart->Instance->SR); - 8002fc4: 687b ldr r3, [r7, #4] - 8002fc6: 681b ldr r3, [r3, #0] - 8002fc8: 681b ldr r3, [r3, #0] - 8002fca: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 - uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8002fce: 687b ldr r3, [r7, #4] - 8002fd0: 681b ldr r3, [r3, #0] - 8002fd2: 68db ldr r3, [r3, #12] - 8002fd4: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 - uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8002fd8: 687b ldr r3, [r7, #4] - 8002fda: 681b ldr r3, [r3, #0] - 8002fdc: 695b ldr r3, [r3, #20] - 8002fde: f8c7 30dc str.w r3, [r7, #220] ; 0xdc - uint32_t errorflags = 0x00U; - 8002fe2: 2300 movs r3, #0 - 8002fe4: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 - uint32_t dmarequest = 0x00U; - 8002fe8: 2300 movs r3, #0 - 8002fea: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 - - /* If no error occurs */ - errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - 8002fee: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8002ff2: f003 030f and.w r3, r3, #15 - 8002ff6: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 - if (errorflags == RESET) - 8002ffa: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 - 8002ffe: 2b00 cmp r3, #0 - 8003000: d10f bne.n 8003022 - { - /* UART in mode Receiver -------------------------------------------------*/ - if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8003002: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8003006: f003 0320 and.w r3, r3, #32 - 800300a: 2b00 cmp r3, #0 - 800300c: d009 beq.n 8003022 - 800300e: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8003012: f003 0320 and.w r3, r3, #32 - 8003016: 2b00 cmp r3, #0 - 8003018: d003 beq.n 8003022 - { - UART_Receive_IT(huart); - 800301a: 6878 ldr r0, [r7, #4] - 800301c: f000 fbcd bl 80037ba - return; - 8003020: e273 b.n 800350a - } - } - - /* If some errors occur */ - if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) - 8003022: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 - 8003026: 2b00 cmp r3, #0 - 8003028: f000 80de beq.w 80031e8 - 800302c: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 8003030: f003 0301 and.w r3, r3, #1 - 8003034: 2b00 cmp r3, #0 - 8003036: d106 bne.n 8003046 - || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - 8003038: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 800303c: f403 7390 and.w r3, r3, #288 ; 0x120 - 8003040: 2b00 cmp r3, #0 - 8003042: f000 80d1 beq.w 80031e8 - { - /* UART parity error interrupt occurred ----------------------------------*/ - if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - 8003046: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 800304a: f003 0301 and.w r3, r3, #1 - 800304e: 2b00 cmp r3, #0 - 8003050: d00b beq.n 800306a - 8003052: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8003056: f403 7380 and.w r3, r3, #256 ; 0x100 - 800305a: 2b00 cmp r3, #0 - 800305c: d005 beq.n 800306a - { - huart->ErrorCode |= HAL_UART_ERROR_PE; - 800305e: 687b ldr r3, [r7, #4] - 8003060: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003062: f043 0201 orr.w r2, r3, #1 - 8003066: 687b ldr r3, [r7, #4] - 8003068: 645a str r2, [r3, #68] ; 0x44 - } - - /* UART noise error interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 800306a: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 800306e: f003 0304 and.w r3, r3, #4 - 8003072: 2b00 cmp r3, #0 - 8003074: d00b beq.n 800308e - 8003076: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 800307a: f003 0301 and.w r3, r3, #1 - 800307e: 2b00 cmp r3, #0 - 8003080: d005 beq.n 800308e - { - huart->ErrorCode |= HAL_UART_ERROR_NE; - 8003082: 687b ldr r3, [r7, #4] - 8003084: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003086: f043 0202 orr.w r2, r3, #2 - 800308a: 687b ldr r3, [r7, #4] - 800308c: 645a str r2, [r3, #68] ; 0x44 - } - - /* UART frame error interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 800308e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8003092: f003 0302 and.w r3, r3, #2 - 8003096: 2b00 cmp r3, #0 - 8003098: d00b beq.n 80030b2 - 800309a: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 800309e: f003 0301 and.w r3, r3, #1 - 80030a2: 2b00 cmp r3, #0 - 80030a4: d005 beq.n 80030b2 - { - huart->ErrorCode |= HAL_UART_ERROR_FE; - 80030a6: 687b ldr r3, [r7, #4] - 80030a8: 6c5b ldr r3, [r3, #68] ; 0x44 - 80030aa: f043 0204 orr.w r2, r3, #4 - 80030ae: 687b ldr r3, [r7, #4] - 80030b0: 645a str r2, [r3, #68] ; 0x44 - } - - /* UART Over-Run interrupt occurred --------------------------------------*/ - if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) - 80030b2: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80030b6: f003 0308 and.w r3, r3, #8 - 80030ba: 2b00 cmp r3, #0 - 80030bc: d011 beq.n 80030e2 - 80030be: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80030c2: f003 0320 and.w r3, r3, #32 - 80030c6: 2b00 cmp r3, #0 - 80030c8: d105 bne.n 80030d6 - || ((cr3its & USART_CR3_EIE) != RESET))) - 80030ca: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 80030ce: f003 0301 and.w r3, r3, #1 - 80030d2: 2b00 cmp r3, #0 - 80030d4: d005 beq.n 80030e2 - { - huart->ErrorCode |= HAL_UART_ERROR_ORE; - 80030d6: 687b ldr r3, [r7, #4] - 80030d8: 6c5b ldr r3, [r3, #68] ; 0x44 - 80030da: f043 0208 orr.w r2, r3, #8 - 80030de: 687b ldr r3, [r7, #4] - 80030e0: 645a str r2, [r3, #68] ; 0x44 - } - - /* Call UART Error Call back function if need be --------------------------*/ - if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 80030e2: 687b ldr r3, [r7, #4] - 80030e4: 6c5b ldr r3, [r3, #68] ; 0x44 - 80030e6: 2b00 cmp r3, #0 - 80030e8: f000 820a beq.w 8003500 - { - /* UART in mode Receiver -----------------------------------------------*/ - if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 80030ec: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80030f0: f003 0320 and.w r3, r3, #32 - 80030f4: 2b00 cmp r3, #0 - 80030f6: d008 beq.n 800310a - 80030f8: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80030fc: f003 0320 and.w r3, r3, #32 - 8003100: 2b00 cmp r3, #0 - 8003102: d002 beq.n 800310a - { - UART_Receive_IT(huart); - 8003104: 6878 ldr r0, [r7, #4] - 8003106: f000 fb58 bl 80037ba - } - - /* If Overrun error occurs, or if any error occurs in DMA mode reception, - consider error as blocking */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 800310a: 687b ldr r3, [r7, #4] - 800310c: 681b ldr r3, [r3, #0] - 800310e: 695b ldr r3, [r3, #20] - 8003110: f003 0340 and.w r3, r3, #64 ; 0x40 - 8003114: 2b40 cmp r3, #64 ; 0x40 - 8003116: bf0c ite eq - 8003118: 2301 moveq r3, #1 - 800311a: 2300 movne r3, #0 - 800311c: b2db uxtb r3, r3 - 800311e: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 - if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - 8003122: 687b ldr r3, [r7, #4] - 8003124: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003126: f003 0308 and.w r3, r3, #8 - 800312a: 2b00 cmp r3, #0 - 800312c: d103 bne.n 8003136 - 800312e: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4 - 8003132: 2b00 cmp r3, #0 - 8003134: d04f beq.n 80031d6 - { - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ - UART_EndRxTransfer(huart); - 8003136: 6878 ldr r0, [r7, #4] - 8003138: f000 fa63 bl 8003602 - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800313c: 687b ldr r3, [r7, #4] - 800313e: 681b ldr r3, [r3, #0] - 8003140: 695b ldr r3, [r3, #20] - 8003142: f003 0340 and.w r3, r3, #64 ; 0x40 - 8003146: 2b40 cmp r3, #64 ; 0x40 - 8003148: d141 bne.n 80031ce - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 800314a: 687b ldr r3, [r7, #4] - 800314c: 681b ldr r3, [r3, #0] - 800314e: 3314 adds r3, #20 - 8003150: f8c7 309c str.w r3, [r7, #156] ; 0x9c - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8003154: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8003158: e853 3f00 ldrex r3, [r3] - 800315c: f8c7 3098 str.w r3, [r7, #152] ; 0x98 - return(result); - 8003160: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98 - 8003164: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8003168: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 - 800316c: 687b ldr r3, [r7, #4] - 800316e: 681b ldr r3, [r3, #0] - 8003170: 3314 adds r3, #20 - 8003172: f8d7 20d0 ldr.w r2, [r7, #208] ; 0xd0 - 8003176: f8c7 20a8 str.w r2, [r7, #168] ; 0xa8 - 800317a: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800317e: f8d7 10a4 ldr.w r1, [r7, #164] ; 0xa4 - 8003182: f8d7 20a8 ldr.w r2, [r7, #168] ; 0xa8 - 8003186: e841 2300 strex r3, r2, [r1] - 800318a: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 - return(result); - 800318e: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0 - 8003192: 2b00 cmp r3, #0 - 8003194: d1d9 bne.n 800314a - - /* Abort the UART DMA Rx stream */ - if (huart->hdmarx != NULL) - 8003196: 687b ldr r3, [r7, #4] - 8003198: 6bdb ldr r3, [r3, #60] ; 0x3c - 800319a: 2b00 cmp r3, #0 - 800319c: d013 beq.n 80031c6 - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 800319e: 687b ldr r3, [r7, #4] - 80031a0: 6bdb ldr r3, [r3, #60] ; 0x3c - 80031a2: 4a8a ldr r2, [pc, #552] ; (80033cc ) - 80031a4: 651a str r2, [r3, #80] ; 0x50 - if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 80031a6: 687b ldr r3, [r7, #4] - 80031a8: 6bdb ldr r3, [r3, #60] ; 0x3c - 80031aa: 4618 mov r0, r3 - 80031ac: f7fe fa71 bl 8001692 - 80031b0: 4603 mov r3, r0 - 80031b2: 2b00 cmp r3, #0 - 80031b4: d016 beq.n 80031e4 - { - /* Call Directly XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - 80031b6: 687b ldr r3, [r7, #4] - 80031b8: 6bdb ldr r3, [r3, #60] ; 0x3c - 80031ba: 6d1b ldr r3, [r3, #80] ; 0x50 - 80031bc: 687a ldr r2, [r7, #4] - 80031be: 6bd2 ldr r2, [r2, #60] ; 0x3c - 80031c0: 4610 mov r0, r2 - 80031c2: 4798 blx r3 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80031c4: e00e b.n 80031e4 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 80031c6: 6878 ldr r0, [r7, #4] - 80031c8: f000 f9ac bl 8003524 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80031cc: e00a b.n 80031e4 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 80031ce: 6878 ldr r0, [r7, #4] - 80031d0: f000 f9a8 bl 8003524 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80031d4: e006 b.n 80031e4 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 80031d6: 6878 ldr r0, [r7, #4] - 80031d8: f000 f9a4 bl 8003524 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - - huart->ErrorCode = HAL_UART_ERROR_NONE; - 80031dc: 687b ldr r3, [r7, #4] - 80031de: 2200 movs r2, #0 - 80031e0: 645a str r2, [r3, #68] ; 0x44 - } - } - return; - 80031e2: e18d b.n 8003500 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80031e4: bf00 nop - return; - 80031e6: e18b b.n 8003500 - } /* End if some error occurs */ - - /* Check current reception Mode : - If Reception till IDLE event has been selected : */ - if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80031e8: 687b ldr r3, [r7, #4] - 80031ea: 6b1b ldr r3, [r3, #48] ; 0x30 - 80031ec: 2b01 cmp r3, #1 - 80031ee: f040 8167 bne.w 80034c0 - && ((isrflags & USART_SR_IDLE) != 0U) - 80031f2: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80031f6: f003 0310 and.w r3, r3, #16 - 80031fa: 2b00 cmp r3, #0 - 80031fc: f000 8160 beq.w 80034c0 - && ((cr1its & USART_CR1_IDLEIE) != 0U)) - 8003200: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8003204: f003 0310 and.w r3, r3, #16 - 8003208: 2b00 cmp r3, #0 - 800320a: f000 8159 beq.w 80034c0 - { - __HAL_UART_CLEAR_IDLEFLAG(huart); - 800320e: 2300 movs r3, #0 - 8003210: 60bb str r3, [r7, #8] - 8003212: 687b ldr r3, [r7, #4] - 8003214: 681b ldr r3, [r3, #0] - 8003216: 681b ldr r3, [r3, #0] - 8003218: 60bb str r3, [r7, #8] - 800321a: 687b ldr r3, [r7, #4] - 800321c: 681b ldr r3, [r3, #0] - 800321e: 685b ldr r3, [r3, #4] - 8003220: 60bb str r3, [r7, #8] - 8003222: 68bb ldr r3, [r7, #8] - - /* Check if DMA mode is enabled in UART */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003224: 687b ldr r3, [r7, #4] - 8003226: 681b ldr r3, [r3, #0] - 8003228: 695b ldr r3, [r3, #20] - 800322a: f003 0340 and.w r3, r3, #64 ; 0x40 - 800322e: 2b40 cmp r3, #64 ; 0x40 - 8003230: f040 80ce bne.w 80033d0 - { - /* DMA mode enabled */ - /* Check received length : If all expected data are received, do nothing, - (DMA cplt callback will be called). - Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ - uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8003234: 687b ldr r3, [r7, #4] - 8003236: 6bdb ldr r3, [r3, #60] ; 0x3c - 8003238: 681b ldr r3, [r3, #0] - 800323a: 685b ldr r3, [r3, #4] - 800323c: f8a7 30be strh.w r3, [r7, #190] ; 0xbe - if ((nb_remaining_rx_data > 0U) - 8003240: f8b7 30be ldrh.w r3, [r7, #190] ; 0xbe - 8003244: 2b00 cmp r3, #0 - 8003246: f000 80a9 beq.w 800339c - && (nb_remaining_rx_data < huart->RxXferSize)) - 800324a: 687b ldr r3, [r7, #4] - 800324c: 8d9b ldrh r3, [r3, #44] ; 0x2c - 800324e: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe - 8003252: 429a cmp r2, r3 - 8003254: f080 80a2 bcs.w 800339c - { - /* Reception is not complete */ - huart->RxXferCount = nb_remaining_rx_data; - 8003258: 687b ldr r3, [r7, #4] - 800325a: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe - 800325e: 85da strh r2, [r3, #46] ; 0x2e - - /* In Normal mode, end DMA xfer and HAL UART Rx process*/ - if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 8003260: 687b ldr r3, [r7, #4] - 8003262: 6bdb ldr r3, [r3, #60] ; 0x3c - 8003264: 69db ldr r3, [r3, #28] - 8003266: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 800326a: f000 8088 beq.w 800337e - { - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 800326e: 687b ldr r3, [r7, #4] - 8003270: 681b ldr r3, [r3, #0] - 8003272: 330c adds r3, #12 - 8003274: f8c7 3088 str.w r3, [r7, #136] ; 0x88 - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8003278: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 800327c: e853 3f00 ldrex r3, [r3] - 8003280: f8c7 3084 str.w r3, [r7, #132] ; 0x84 - return(result); - 8003284: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 - 8003288: f423 7380 bic.w r3, r3, #256 ; 0x100 - 800328c: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 - 8003290: 687b ldr r3, [r7, #4] - 8003292: 681b ldr r3, [r3, #0] - 8003294: 330c adds r3, #12 - 8003296: f8d7 20b8 ldr.w r2, [r7, #184] ; 0xb8 - 800329a: f8c7 2094 str.w r2, [r7, #148] ; 0x94 - 800329e: f8c7 3090 str.w r3, [r7, #144] ; 0x90 - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80032a2: f8d7 1090 ldr.w r1, [r7, #144] ; 0x90 - 80032a6: f8d7 2094 ldr.w r2, [r7, #148] ; 0x94 - 80032aa: e841 2300 strex r3, r2, [r1] - 80032ae: f8c7 308c str.w r3, [r7, #140] ; 0x8c - return(result); - 80032b2: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c - 80032b6: 2b00 cmp r3, #0 - 80032b8: d1d9 bne.n 800326e - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80032ba: 687b ldr r3, [r7, #4] - 80032bc: 681b ldr r3, [r3, #0] - 80032be: 3314 adds r3, #20 - 80032c0: 677b str r3, [r7, #116] ; 0x74 - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80032c2: 6f7b ldr r3, [r7, #116] ; 0x74 - 80032c4: e853 3f00 ldrex r3, [r3] - 80032c8: 673b str r3, [r7, #112] ; 0x70 - return(result); - 80032ca: 6f3b ldr r3, [r7, #112] ; 0x70 - 80032cc: f023 0301 bic.w r3, r3, #1 - 80032d0: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 - 80032d4: 687b ldr r3, [r7, #4] - 80032d6: 681b ldr r3, [r3, #0] - 80032d8: 3314 adds r3, #20 - 80032da: f8d7 20b4 ldr.w r2, [r7, #180] ; 0xb4 - 80032de: f8c7 2080 str.w r2, [r7, #128] ; 0x80 - 80032e2: 67fb str r3, [r7, #124] ; 0x7c - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80032e4: 6ff9 ldr r1, [r7, #124] ; 0x7c - 80032e6: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 - 80032ea: e841 2300 strex r3, r2, [r1] - 80032ee: 67bb str r3, [r7, #120] ; 0x78 - return(result); - 80032f0: 6fbb ldr r3, [r7, #120] ; 0x78 - 80032f2: 2b00 cmp r3, #0 - 80032f4: d1e1 bne.n 80032ba - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the UART CR3 register */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80032f6: 687b ldr r3, [r7, #4] - 80032f8: 681b ldr r3, [r3, #0] - 80032fa: 3314 adds r3, #20 - 80032fc: 663b str r3, [r7, #96] ; 0x60 - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80032fe: 6e3b ldr r3, [r7, #96] ; 0x60 - 8003300: e853 3f00 ldrex r3, [r3] - 8003304: 65fb str r3, [r7, #92] ; 0x5c - return(result); - 8003306: 6dfb ldr r3, [r7, #92] ; 0x5c - 8003308: f023 0340 bic.w r3, r3, #64 ; 0x40 - 800330c: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 - 8003310: 687b ldr r3, [r7, #4] - 8003312: 681b ldr r3, [r3, #0] - 8003314: 3314 adds r3, #20 - 8003316: f8d7 20b0 ldr.w r2, [r7, #176] ; 0xb0 - 800331a: 66fa str r2, [r7, #108] ; 0x6c - 800331c: 66bb str r3, [r7, #104] ; 0x68 - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800331e: 6eb9 ldr r1, [r7, #104] ; 0x68 - 8003320: 6efa ldr r2, [r7, #108] ; 0x6c - 8003322: e841 2300 strex r3, r2, [r1] - 8003326: 667b str r3, [r7, #100] ; 0x64 - return(result); - 8003328: 6e7b ldr r3, [r7, #100] ; 0x64 - 800332a: 2b00 cmp r3, #0 - 800332c: d1e3 bne.n 80032f6 - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 800332e: 687b ldr r3, [r7, #4] - 8003330: 2220 movs r2, #32 - 8003332: f883 2042 strb.w r2, [r3, #66] ; 0x42 - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8003336: 687b ldr r3, [r7, #4] - 8003338: 2200 movs r2, #0 - 800333a: 631a str r2, [r3, #48] ; 0x30 - - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800333c: 687b ldr r3, [r7, #4] - 800333e: 681b ldr r3, [r3, #0] - 8003340: 330c adds r3, #12 - 8003342: 64fb str r3, [r7, #76] ; 0x4c - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8003344: 6cfb ldr r3, [r7, #76] ; 0x4c - 8003346: e853 3f00 ldrex r3, [r3] - 800334a: 64bb str r3, [r7, #72] ; 0x48 - return(result); - 800334c: 6cbb ldr r3, [r7, #72] ; 0x48 - 800334e: f023 0310 bic.w r3, r3, #16 - 8003352: f8c7 30ac str.w r3, [r7, #172] ; 0xac - 8003356: 687b ldr r3, [r7, #4] - 8003358: 681b ldr r3, [r3, #0] - 800335a: 330c adds r3, #12 - 800335c: f8d7 20ac ldr.w r2, [r7, #172] ; 0xac - 8003360: 65ba str r2, [r7, #88] ; 0x58 - 8003362: 657b str r3, [r7, #84] ; 0x54 - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8003364: 6d79 ldr r1, [r7, #84] ; 0x54 - 8003366: 6dba ldr r2, [r7, #88] ; 0x58 - 8003368: e841 2300 strex r3, r2, [r1] - 800336c: 653b str r3, [r7, #80] ; 0x50 - return(result); - 800336e: 6d3b ldr r3, [r7, #80] ; 0x50 - 8003370: 2b00 cmp r3, #0 - 8003372: d1e3 bne.n 800333c - - /* Last bytes received, so no need as the abort is immediate */ - (void)HAL_DMA_Abort(huart->hdmarx); - 8003374: 687b ldr r3, [r7, #4] - 8003376: 6bdb ldr r3, [r3, #60] ; 0x3c - 8003378: 4618 mov r0, r3 - 800337a: f7fe f91a bl 80015b2 - } - - /* Initialize type of RxEvent that correspond to RxEvent callback execution; - In this case, Rx Event type is Idle Event */ - huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 800337e: 687b ldr r3, [r7, #4] - 8003380: 2202 movs r2, #2 - 8003382: 635a str r2, [r3, #52] ; 0x34 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 8003384: 687b ldr r3, [r7, #4] - 8003386: 8d9a ldrh r2, [r3, #44] ; 0x2c - 8003388: 687b ldr r3, [r7, #4] - 800338a: 8ddb ldrh r3, [r3, #46] ; 0x2e - 800338c: b29b uxth r3, r3 - 800338e: 1ad3 subs r3, r2, r3 - 8003390: b29b uxth r3, r3 - 8003392: 4619 mov r1, r3 - 8003394: 6878 ldr r0, [r7, #4] - 8003396: f000 f8cf bl 8003538 - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - } - } - } - return; - 800339a: e0b3 b.n 8003504 - if (nb_remaining_rx_data == huart->RxXferSize) - 800339c: 687b ldr r3, [r7, #4] - 800339e: 8d9b ldrh r3, [r3, #44] ; 0x2c - 80033a0: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe - 80033a4: 429a cmp r2, r3 - 80033a6: f040 80ad bne.w 8003504 - if (huart->hdmarx->Init.Mode == DMA_CIRCULAR) - 80033aa: 687b ldr r3, [r7, #4] - 80033ac: 6bdb ldr r3, [r3, #60] ; 0x3c - 80033ae: 69db ldr r3, [r3, #28] - 80033b0: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80033b4: f040 80a6 bne.w 8003504 - huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80033b8: 687b ldr r3, [r7, #4] - 80033ba: 2202 movs r2, #2 - 80033bc: 635a str r2, [r3, #52] ; 0x34 - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 80033be: 687b ldr r3, [r7, #4] - 80033c0: 8d9b ldrh r3, [r3, #44] ; 0x2c - 80033c2: 4619 mov r1, r3 - 80033c4: 6878 ldr r0, [r7, #4] - 80033c6: f000 f8b7 bl 8003538 - return; - 80033ca: e09b b.n 8003504 - 80033cc: 080036c9 .word 0x080036c9 - else - { - /* DMA mode not enabled */ - /* Check received length : If all expected data are received, do nothing. - Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ - uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 80033d0: 687b ldr r3, [r7, #4] - 80033d2: 8d9a ldrh r2, [r3, #44] ; 0x2c - 80033d4: 687b ldr r3, [r7, #4] - 80033d6: 8ddb ldrh r3, [r3, #46] ; 0x2e - 80033d8: b29b uxth r3, r3 - 80033da: 1ad3 subs r3, r2, r3 - 80033dc: f8a7 30ce strh.w r3, [r7, #206] ; 0xce - if ((huart->RxXferCount > 0U) - 80033e0: 687b ldr r3, [r7, #4] - 80033e2: 8ddb ldrh r3, [r3, #46] ; 0x2e - 80033e4: b29b uxth r3, r3 - 80033e6: 2b00 cmp r3, #0 - 80033e8: f000 808e beq.w 8003508 - && (nb_rx_data > 0U)) - 80033ec: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce - 80033f0: 2b00 cmp r3, #0 - 80033f2: f000 8089 beq.w 8003508 - { - /* Disable the UART Parity Error Interrupt and RXNE interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80033f6: 687b ldr r3, [r7, #4] - 80033f8: 681b ldr r3, [r3, #0] - 80033fa: 330c adds r3, #12 - 80033fc: 63bb str r3, [r7, #56] ; 0x38 - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80033fe: 6bbb ldr r3, [r7, #56] ; 0x38 - 8003400: e853 3f00 ldrex r3, [r3] - 8003404: 637b str r3, [r7, #52] ; 0x34 - return(result); - 8003406: 6b7b ldr r3, [r7, #52] ; 0x34 - 8003408: f423 7390 bic.w r3, r3, #288 ; 0x120 - 800340c: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 - 8003410: 687b ldr r3, [r7, #4] - 8003412: 681b ldr r3, [r3, #0] - 8003414: 330c adds r3, #12 - 8003416: f8d7 20c8 ldr.w r2, [r7, #200] ; 0xc8 - 800341a: 647a str r2, [r7, #68] ; 0x44 - 800341c: 643b str r3, [r7, #64] ; 0x40 - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800341e: 6c39 ldr r1, [r7, #64] ; 0x40 - 8003420: 6c7a ldr r2, [r7, #68] ; 0x44 - 8003422: e841 2300 strex r3, r2, [r1] - 8003426: 63fb str r3, [r7, #60] ; 0x3c - return(result); - 8003428: 6bfb ldr r3, [r7, #60] ; 0x3c - 800342a: 2b00 cmp r3, #0 - 800342c: d1e3 bne.n 80033f6 - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 800342e: 687b ldr r3, [r7, #4] - 8003430: 681b ldr r3, [r3, #0] - 8003432: 3314 adds r3, #20 - 8003434: 627b str r3, [r7, #36] ; 0x24 - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8003436: 6a7b ldr r3, [r7, #36] ; 0x24 - 8003438: e853 3f00 ldrex r3, [r3] - 800343c: 623b str r3, [r7, #32] - return(result); - 800343e: 6a3b ldr r3, [r7, #32] - 8003440: f023 0301 bic.w r3, r3, #1 - 8003444: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 - 8003448: 687b ldr r3, [r7, #4] - 800344a: 681b ldr r3, [r3, #0] - 800344c: 3314 adds r3, #20 - 800344e: f8d7 20c4 ldr.w r2, [r7, #196] ; 0xc4 - 8003452: 633a str r2, [r7, #48] ; 0x30 - 8003454: 62fb str r3, [r7, #44] ; 0x2c - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8003456: 6af9 ldr r1, [r7, #44] ; 0x2c - 8003458: 6b3a ldr r2, [r7, #48] ; 0x30 - 800345a: e841 2300 strex r3, r2, [r1] - 800345e: 62bb str r3, [r7, #40] ; 0x28 - return(result); - 8003460: 6abb ldr r3, [r7, #40] ; 0x28 - 8003462: 2b00 cmp r3, #0 - 8003464: d1e3 bne.n 800342e - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8003466: 687b ldr r3, [r7, #4] - 8003468: 2220 movs r2, #32 - 800346a: f883 2042 strb.w r2, [r3, #66] ; 0x42 - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 800346e: 687b ldr r3, [r7, #4] - 8003470: 2200 movs r2, #0 - 8003472: 631a str r2, [r3, #48] ; 0x30 - - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8003474: 687b ldr r3, [r7, #4] - 8003476: 681b ldr r3, [r3, #0] - 8003478: 330c adds r3, #12 - 800347a: 613b str r3, [r7, #16] - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800347c: 693b ldr r3, [r7, #16] - 800347e: e853 3f00 ldrex r3, [r3] - 8003482: 60fb str r3, [r7, #12] - return(result); - 8003484: 68fb ldr r3, [r7, #12] - 8003486: f023 0310 bic.w r3, r3, #16 - 800348a: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 - 800348e: 687b ldr r3, [r7, #4] - 8003490: 681b ldr r3, [r3, #0] - 8003492: 330c adds r3, #12 - 8003494: f8d7 20c0 ldr.w r2, [r7, #192] ; 0xc0 - 8003498: 61fa str r2, [r7, #28] - 800349a: 61bb str r3, [r7, #24] - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800349c: 69b9 ldr r1, [r7, #24] - 800349e: 69fa ldr r2, [r7, #28] - 80034a0: e841 2300 strex r3, r2, [r1] - 80034a4: 617b str r3, [r7, #20] - return(result); - 80034a6: 697b ldr r3, [r7, #20] - 80034a8: 2b00 cmp r3, #0 - 80034aa: d1e3 bne.n 8003474 - - /* Initialize type of RxEvent that correspond to RxEvent callback execution; - In this case, Rx Event type is Idle Event */ - huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80034ac: 687b ldr r3, [r7, #4] - 80034ae: 2202 movs r2, #2 - 80034b0: 635a str r2, [r3, #52] ; 0x34 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxEventCallback(huart, nb_rx_data); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 80034b2: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce - 80034b6: 4619 mov r1, r3 - 80034b8: 6878 ldr r0, [r7, #4] - 80034ba: f000 f83d bl 8003538 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - return; - 80034be: e023 b.n 8003508 - } - } - - /* UART in mode Transmitter ------------------------------------------------*/ - if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - 80034c0: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80034c4: f003 0380 and.w r3, r3, #128 ; 0x80 - 80034c8: 2b00 cmp r3, #0 - 80034ca: d009 beq.n 80034e0 - 80034cc: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80034d0: f003 0380 and.w r3, r3, #128 ; 0x80 - 80034d4: 2b00 cmp r3, #0 - 80034d6: d003 beq.n 80034e0 - { - UART_Transmit_IT(huart); - 80034d8: 6878 ldr r0, [r7, #4] - 80034da: f000 f906 bl 80036ea - return; - 80034de: e014 b.n 800350a - } - - /* UART in mode Transmitter end --------------------------------------------*/ - if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - 80034e0: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80034e4: f003 0340 and.w r3, r3, #64 ; 0x40 - 80034e8: 2b00 cmp r3, #0 - 80034ea: d00e beq.n 800350a - 80034ec: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80034f0: f003 0340 and.w r3, r3, #64 ; 0x40 - 80034f4: 2b00 cmp r3, #0 - 80034f6: d008 beq.n 800350a - { - UART_EndTransmit_IT(huart); - 80034f8: 6878 ldr r0, [r7, #4] - 80034fa: f000 f946 bl 800378a - return; - 80034fe: e004 b.n 800350a - return; - 8003500: bf00 nop - 8003502: e002 b.n 800350a - return; - 8003504: bf00 nop - 8003506: e000 b.n 800350a - return; - 8003508: bf00 nop - } -} - 800350a: 37e8 adds r7, #232 ; 0xe8 - 800350c: 46bd mov sp, r7 - 800350e: bd80 pop {r7, pc} - -08003510 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) -{ - 8003510: b480 push {r7} - 8003512: b083 sub sp, #12 - 8003514: af00 add r7, sp, #0 - 8003516: 6078 str r0, [r7, #4] - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_RxCpltCallback could be implemented in the user file - */ -} - 8003518: bf00 nop - 800351a: 370c adds r7, #12 - 800351c: 46bd mov sp, r7 - 800351e: f85d 7b04 ldr.w r7, [sp], #4 - 8003522: 4770 bx lr - -08003524 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) -{ - 8003524: b480 push {r7} - 8003526: b083 sub sp, #12 - 8003528: af00 add r7, sp, #0 - 800352a: 6078 str r0, [r7, #4] - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_ErrorCallback could be implemented in the user file - */ -} - 800352c: bf00 nop - 800352e: 370c adds r7, #12 - 8003530: 46bd mov sp, r7 - 8003532: f85d 7b04 ldr.w r7, [sp], #4 - 8003536: 4770 bx lr - -08003538 : - * @param Size Number of data available in application reception buffer (indicates a position in - * reception buffer until which, data are available) - * @retval None - */ -__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) -{ - 8003538: b480 push {r7} - 800353a: b083 sub sp, #12 - 800353c: af00 add r7, sp, #0 - 800353e: 6078 str r0, [r7, #4] - 8003540: 460b mov r3, r1 - 8003542: 807b strh r3, [r7, #2] - UNUSED(Size); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_RxEventCallback can be implemented in the user file. - */ -} - 8003544: bf00 nop - 8003546: 370c adds r7, #12 - 8003548: 46bd mov sp, r7 - 800354a: f85d 7b04 ldr.w r7, [sp], #4 - 800354e: 4770 bx lr - -08003550 : +08002ec0 : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8003550: b580 push {r7, lr} - 8003552: b086 sub sp, #24 - 8003554: af00 add r7, sp, #0 - 8003556: 60f8 str r0, [r7, #12] - 8003558: 60b9 str r1, [r7, #8] - 800355a: 603b str r3, [r7, #0] - 800355c: 4613 mov r3, r2 - 800355e: 71fb strb r3, [r7, #7] + 8002ec0: b580 push {r7, lr} + 8002ec2: b086 sub sp, #24 + 8002ec4: af00 add r7, sp, #0 + 8002ec6: 60f8 str r0, [r7, #12] + 8002ec8: 60b9 str r1, [r7, #8] + 8002eca: 603b str r3, [r7, #0] + 8002ecc: 4613 mov r3, r2 + 8002ece: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8003560: e03b b.n 80035da + 8002ed0: e03b b.n 8002f4a { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8003562: 6a3b ldr r3, [r7, #32] - 8003564: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff - 8003568: d037 beq.n 80035da + 8002ed2: 6a3b ldr r3, [r7, #32] + 8002ed4: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff + 8002ed8: d037 beq.n 8002f4a { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800356a: f7fd fee1 bl 8001330 - 800356e: 4602 mov r2, r0 - 8003570: 683b ldr r3, [r7, #0] - 8003572: 1ad3 subs r3, r2, r3 - 8003574: 6a3a ldr r2, [r7, #32] - 8003576: 429a cmp r2, r3 - 8003578: d302 bcc.n 8003580 - 800357a: 6a3b ldr r3, [r7, #32] - 800357c: 2b00 cmp r3, #0 - 800357e: d101 bne.n 8003584 + 8002eda: f7fe fa69 bl 80013b0 + 8002ede: 4602 mov r2, r0 + 8002ee0: 683b ldr r3, [r7, #0] + 8002ee2: 1ad3 subs r3, r2, r3 + 8002ee4: 6a3a ldr r2, [r7, #32] + 8002ee6: 429a cmp r2, r3 + 8002ee8: d302 bcc.n 8002ef0 + 8002eea: 6a3b ldr r3, [r7, #32] + 8002eec: 2b00 cmp r3, #0 + 8002eee: d101 bne.n 8002ef4 { return HAL_TIMEOUT; - 8003580: 2303 movs r3, #3 - 8003582: e03a b.n 80035fa + 8002ef0: 2303 movs r3, #3 + 8002ef2: e03a b.n 8002f6a } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 8003584: 68fb ldr r3, [r7, #12] - 8003586: 681b ldr r3, [r3, #0] - 8003588: 68db ldr r3, [r3, #12] - 800358a: f003 0304 and.w r3, r3, #4 - 800358e: 2b00 cmp r3, #0 - 8003590: d023 beq.n 80035da - 8003592: 68bb ldr r3, [r7, #8] - 8003594: 2b80 cmp r3, #128 ; 0x80 - 8003596: d020 beq.n 80035da - 8003598: 68bb ldr r3, [r7, #8] - 800359a: 2b40 cmp r3, #64 ; 0x40 - 800359c: d01d beq.n 80035da + 8002ef4: 68fb ldr r3, [r7, #12] + 8002ef6: 681b ldr r3, [r3, #0] + 8002ef8: 68db ldr r3, [r3, #12] + 8002efa: f003 0304 and.w r3, r3, #4 + 8002efe: 2b00 cmp r3, #0 + 8002f00: d023 beq.n 8002f4a + 8002f02: 68bb ldr r3, [r7, #8] + 8002f04: 2b80 cmp r3, #128 ; 0x80 + 8002f06: d020 beq.n 8002f4a + 8002f08: 68bb ldr r3, [r7, #8] + 8002f0a: 2b40 cmp r3, #64 ; 0x40 + 8002f0c: d01d beq.n 8002f4a { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 800359e: 68fb ldr r3, [r7, #12] - 80035a0: 681b ldr r3, [r3, #0] - 80035a2: 681b ldr r3, [r3, #0] - 80035a4: f003 0308 and.w r3, r3, #8 - 80035a8: 2b08 cmp r3, #8 - 80035aa: d116 bne.n 80035da + 8002f0e: 68fb ldr r3, [r7, #12] + 8002f10: 681b ldr r3, [r3, #0] + 8002f12: 681b ldr r3, [r3, #0] + 8002f14: f003 0308 and.w r3, r3, #8 + 8002f18: 2b08 cmp r3, #8 + 8002f1a: d116 bne.n 8002f4a { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); - 80035ac: 2300 movs r3, #0 - 80035ae: 617b str r3, [r7, #20] - 80035b0: 68fb ldr r3, [r7, #12] - 80035b2: 681b ldr r3, [r3, #0] - 80035b4: 681b ldr r3, [r3, #0] - 80035b6: 617b str r3, [r7, #20] - 80035b8: 68fb ldr r3, [r7, #12] - 80035ba: 681b ldr r3, [r3, #0] - 80035bc: 685b ldr r3, [r3, #4] - 80035be: 617b str r3, [r7, #20] - 80035c0: 697b ldr r3, [r7, #20] + 8002f1c: 2300 movs r3, #0 + 8002f1e: 617b str r3, [r7, #20] + 8002f20: 68fb ldr r3, [r7, #12] + 8002f22: 681b ldr r3, [r3, #0] + 8002f24: 681b ldr r3, [r3, #0] + 8002f26: 617b str r3, [r7, #20] + 8002f28: 68fb ldr r3, [r7, #12] + 8002f2a: 681b ldr r3, [r3, #0] + 8002f2c: 685b ldr r3, [r3, #4] + 8002f2e: 617b str r3, [r7, #20] + 8002f30: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 80035c2: 68f8 ldr r0, [r7, #12] - 80035c4: f000 f81d bl 8003602 + 8002f32: 68f8 ldr r0, [r7, #12] + 8002f34: f000 f81d bl 8002f72 huart->ErrorCode = HAL_UART_ERROR_ORE; - 80035c8: 68fb ldr r3, [r7, #12] - 80035ca: 2208 movs r2, #8 - 80035cc: 645a str r2, [r3, #68] ; 0x44 + 8002f38: 68fb ldr r3, [r7, #12] + 8002f3a: 2208 movs r2, #8 + 8002f3c: 645a str r2, [r3, #68] ; 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); - 80035ce: 68fb ldr r3, [r7, #12] - 80035d0: 2200 movs r2, #0 - 80035d2: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 8002f3e: 68fb ldr r3, [r7, #12] + 8002f40: 2200 movs r2, #0 + 8002f42: f883 2040 strb.w r2, [r3, #64] ; 0x40 return HAL_ERROR; - 80035d6: 2301 movs r3, #1 - 80035d8: e00f b.n 80035fa + 8002f46: 2301 movs r3, #1 + 8002f48: e00f b.n 8002f6a while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80035da: 68fb ldr r3, [r7, #12] - 80035dc: 681b ldr r3, [r3, #0] - 80035de: 681a ldr r2, [r3, #0] - 80035e0: 68bb ldr r3, [r7, #8] - 80035e2: 4013 ands r3, r2 - 80035e4: 68ba ldr r2, [r7, #8] - 80035e6: 429a cmp r2, r3 - 80035e8: bf0c ite eq - 80035ea: 2301 moveq r3, #1 - 80035ec: 2300 movne r3, #0 - 80035ee: b2db uxtb r3, r3 - 80035f0: 461a mov r2, r3 - 80035f2: 79fb ldrb r3, [r7, #7] - 80035f4: 429a cmp r2, r3 - 80035f6: d0b4 beq.n 8003562 + 8002f4a: 68fb ldr r3, [r7, #12] + 8002f4c: 681b ldr r3, [r3, #0] + 8002f4e: 681a ldr r2, [r3, #0] + 8002f50: 68bb ldr r3, [r7, #8] + 8002f52: 4013 ands r3, r2 + 8002f54: 68ba ldr r2, [r7, #8] + 8002f56: 429a cmp r2, r3 + 8002f58: bf0c ite eq + 8002f5a: 2301 moveq r3, #1 + 8002f5c: 2300 movne r3, #0 + 8002f5e: b2db uxtb r3, r3 + 8002f60: 461a mov r2, r3 + 8002f62: 79fb ldrb r3, [r7, #7] + 8002f64: 429a cmp r2, r3 + 8002f66: d0b4 beq.n 8002ed2 } } } } return HAL_OK; - 80035f8: 2300 movs r3, #0 + 8002f68: 2300 movs r3, #0 } - 80035fa: 4618 mov r0, r3 - 80035fc: 3718 adds r7, #24 - 80035fe: 46bd mov sp, r7 - 8003600: bd80 pop {r7, pc} + 8002f6a: 4618 mov r0, r3 + 8002f6c: 3718 adds r7, #24 + 8002f6e: 46bd mov sp, r7 + 8002f70: bd80 pop {r7, pc} -08003602 : +08002f72 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8003602: b480 push {r7} - 8003604: b095 sub sp, #84 ; 0x54 - 8003606: af00 add r7, sp, #0 - 8003608: 6078 str r0, [r7, #4] + 8002f72: b480 push {r7} + 8002f74: b095 sub sp, #84 ; 0x54 + 8002f76: af00 add r7, sp, #0 + 8002f78: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 800360a: 687b ldr r3, [r7, #4] - 800360c: 681b ldr r3, [r3, #0] - 800360e: 330c adds r3, #12 - 8003610: 637b str r3, [r7, #52] ; 0x34 + 8002f7a: 687b ldr r3, [r7, #4] + 8002f7c: 681b ldr r3, [r3, #0] + 8002f7e: 330c adds r3, #12 + 8002f80: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8003612: 6b7b ldr r3, [r7, #52] ; 0x34 - 8003614: e853 3f00 ldrex r3, [r3] - 8003618: 633b str r3, [r7, #48] ; 0x30 + 8002f82: 6b7b ldr r3, [r7, #52] ; 0x34 + 8002f84: e853 3f00 ldrex r3, [r3] + 8002f88: 633b str r3, [r7, #48] ; 0x30 return(result); - 800361a: 6b3b ldr r3, [r7, #48] ; 0x30 - 800361c: f423 7390 bic.w r3, r3, #288 ; 0x120 - 8003620: 64fb str r3, [r7, #76] ; 0x4c - 8003622: 687b ldr r3, [r7, #4] - 8003624: 681b ldr r3, [r3, #0] - 8003626: 330c adds r3, #12 - 8003628: 6cfa ldr r2, [r7, #76] ; 0x4c - 800362a: 643a str r2, [r7, #64] ; 0x40 - 800362c: 63fb str r3, [r7, #60] ; 0x3c + 8002f8a: 6b3b ldr r3, [r7, #48] ; 0x30 + 8002f8c: f423 7390 bic.w r3, r3, #288 ; 0x120 + 8002f90: 64fb str r3, [r7, #76] ; 0x4c + 8002f92: 687b ldr r3, [r7, #4] + 8002f94: 681b ldr r3, [r3, #0] + 8002f96: 330c adds r3, #12 + 8002f98: 6cfa ldr r2, [r7, #76] ; 0x4c + 8002f9a: 643a str r2, [r7, #64] ; 0x40 + 8002f9c: 63fb str r3, [r7, #60] ; 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800362e: 6bf9 ldr r1, [r7, #60] ; 0x3c - 8003630: 6c3a ldr r2, [r7, #64] ; 0x40 - 8003632: e841 2300 strex r3, r2, [r1] - 8003636: 63bb str r3, [r7, #56] ; 0x38 + 8002f9e: 6bf9 ldr r1, [r7, #60] ; 0x3c + 8002fa0: 6c3a ldr r2, [r7, #64] ; 0x40 + 8002fa2: e841 2300 strex r3, r2, [r1] + 8002fa6: 63bb str r3, [r7, #56] ; 0x38 return(result); - 8003638: 6bbb ldr r3, [r7, #56] ; 0x38 - 800363a: 2b00 cmp r3, #0 - 800363c: d1e5 bne.n 800360a + 8002fa8: 6bbb ldr r3, [r7, #56] ; 0x38 + 8002faa: 2b00 cmp r3, #0 + 8002fac: d1e5 bne.n 8002f7a ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 800363e: 687b ldr r3, [r7, #4] - 8003640: 681b ldr r3, [r3, #0] - 8003642: 3314 adds r3, #20 - 8003644: 623b str r3, [r7, #32] + 8002fae: 687b ldr r3, [r7, #4] + 8002fb0: 681b ldr r3, [r3, #0] + 8002fb2: 3314 adds r3, #20 + 8002fb4: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8003646: 6a3b ldr r3, [r7, #32] - 8003648: e853 3f00 ldrex r3, [r3] - 800364c: 61fb str r3, [r7, #28] + 8002fb6: 6a3b ldr r3, [r7, #32] + 8002fb8: e853 3f00 ldrex r3, [r3] + 8002fbc: 61fb str r3, [r7, #28] return(result); - 800364e: 69fb ldr r3, [r7, #28] - 8003650: f023 0301 bic.w r3, r3, #1 - 8003654: 64bb str r3, [r7, #72] ; 0x48 - 8003656: 687b ldr r3, [r7, #4] - 8003658: 681b ldr r3, [r3, #0] - 800365a: 3314 adds r3, #20 - 800365c: 6cba ldr r2, [r7, #72] ; 0x48 - 800365e: 62fa str r2, [r7, #44] ; 0x2c - 8003660: 62bb str r3, [r7, #40] ; 0x28 + 8002fbe: 69fb ldr r3, [r7, #28] + 8002fc0: f023 0301 bic.w r3, r3, #1 + 8002fc4: 64bb str r3, [r7, #72] ; 0x48 + 8002fc6: 687b ldr r3, [r7, #4] + 8002fc8: 681b ldr r3, [r3, #0] + 8002fca: 3314 adds r3, #20 + 8002fcc: 6cba ldr r2, [r7, #72] ; 0x48 + 8002fce: 62fa str r2, [r7, #44] ; 0x2c + 8002fd0: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8003662: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8003664: 6afa ldr r2, [r7, #44] ; 0x2c - 8003666: e841 2300 strex r3, r2, [r1] - 800366a: 627b str r3, [r7, #36] ; 0x24 + 8002fd2: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8002fd4: 6afa ldr r2, [r7, #44] ; 0x2c + 8002fd6: e841 2300 strex r3, r2, [r1] + 8002fda: 627b str r3, [r7, #36] ; 0x24 return(result); - 800366c: 6a7b ldr r3, [r7, #36] ; 0x24 - 800366e: 2b00 cmp r3, #0 - 8003670: d1e5 bne.n 800363e + 8002fdc: 6a7b ldr r3, [r7, #36] ; 0x24 + 8002fde: 2b00 cmp r3, #0 + 8002fe0: d1e5 bne.n 8002fae /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8003672: 687b ldr r3, [r7, #4] - 8003674: 6b1b ldr r3, [r3, #48] ; 0x30 - 8003676: 2b01 cmp r3, #1 - 8003678: d119 bne.n 80036ae + 8002fe2: 687b ldr r3, [r7, #4] + 8002fe4: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002fe6: 2b01 cmp r3, #1 + 8002fe8: d119 bne.n 800301e { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800367a: 687b ldr r3, [r7, #4] - 800367c: 681b ldr r3, [r3, #0] - 800367e: 330c adds r3, #12 - 8003680: 60fb str r3, [r7, #12] + 8002fea: 687b ldr r3, [r7, #4] + 8002fec: 681b ldr r3, [r3, #0] + 8002fee: 330c adds r3, #12 + 8002ff0: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8003682: 68fb ldr r3, [r7, #12] - 8003684: e853 3f00 ldrex r3, [r3] - 8003688: 60bb str r3, [r7, #8] + 8002ff2: 68fb ldr r3, [r7, #12] + 8002ff4: e853 3f00 ldrex r3, [r3] + 8002ff8: 60bb str r3, [r7, #8] return(result); - 800368a: 68bb ldr r3, [r7, #8] - 800368c: f023 0310 bic.w r3, r3, #16 - 8003690: 647b str r3, [r7, #68] ; 0x44 - 8003692: 687b ldr r3, [r7, #4] - 8003694: 681b ldr r3, [r3, #0] - 8003696: 330c adds r3, #12 - 8003698: 6c7a ldr r2, [r7, #68] ; 0x44 - 800369a: 61ba str r2, [r7, #24] - 800369c: 617b str r3, [r7, #20] + 8002ffa: 68bb ldr r3, [r7, #8] + 8002ffc: f023 0310 bic.w r3, r3, #16 + 8003000: 647b str r3, [r7, #68] ; 0x44 + 8003002: 687b ldr r3, [r7, #4] + 8003004: 681b ldr r3, [r3, #0] + 8003006: 330c adds r3, #12 + 8003008: 6c7a ldr r2, [r7, #68] ; 0x44 + 800300a: 61ba str r2, [r7, #24] + 800300c: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800369e: 6979 ldr r1, [r7, #20] - 80036a0: 69ba ldr r2, [r7, #24] - 80036a2: e841 2300 strex r3, r2, [r1] - 80036a6: 613b str r3, [r7, #16] + 800300e: 6979 ldr r1, [r7, #20] + 8003010: 69ba ldr r2, [r7, #24] + 8003012: e841 2300 strex r3, r2, [r1] + 8003016: 613b str r3, [r7, #16] return(result); - 80036a8: 693b ldr r3, [r7, #16] - 80036aa: 2b00 cmp r3, #0 - 80036ac: d1e5 bne.n 800367a + 8003018: 693b ldr r3, [r7, #16] + 800301a: 2b00 cmp r3, #0 + 800301c: d1e5 bne.n 8002fea } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80036ae: 687b ldr r3, [r7, #4] - 80036b0: 2220 movs r2, #32 - 80036b2: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 800301e: 687b ldr r3, [r7, #4] + 8003020: 2220 movs r2, #32 + 8003022: f883 2042 strb.w r2, [r3, #66] ; 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80036b6: 687b ldr r3, [r7, #4] - 80036b8: 2200 movs r2, #0 - 80036ba: 631a str r2, [r3, #48] ; 0x30 + 8003026: 687b ldr r3, [r7, #4] + 8003028: 2200 movs r2, #0 + 800302a: 631a str r2, [r3, #48] ; 0x30 } - 80036bc: bf00 nop - 80036be: 3754 adds r7, #84 ; 0x54 - 80036c0: 46bd mov sp, r7 - 80036c2: f85d 7b04 ldr.w r7, [sp], #4 - 80036c6: 4770 bx lr + 800302c: bf00 nop + 800302e: 3754 adds r7, #84 ; 0x54 + 8003030: 46bd mov sp, r7 + 8003032: f85d 7b04 ldr.w r7, [sp], #4 + 8003036: 4770 bx lr -080036c8 : - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) -{ - 80036c8: b580 push {r7, lr} - 80036ca: b084 sub sp, #16 - 80036cc: af00 add r7, sp, #0 - 80036ce: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 80036d0: 687b ldr r3, [r7, #4] - 80036d2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80036d4: 60fb str r3, [r7, #12] - huart->RxXferCount = 0x00U; - 80036d6: 68fb ldr r3, [r7, #12] - 80036d8: 2200 movs r2, #0 - 80036da: 85da strh r2, [r3, #46] ; 0x2e -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 80036dc: 68f8 ldr r0, [r7, #12] - 80036de: f7ff ff21 bl 8003524 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 80036e2: bf00 nop - 80036e4: 3710 adds r7, #16 - 80036e6: 46bd mov sp, r7 - 80036e8: bd80 pop {r7, pc} - -080036ea : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) -{ - 80036ea: b480 push {r7} - 80036ec: b085 sub sp, #20 - 80036ee: af00 add r7, sp, #0 - 80036f0: 6078 str r0, [r7, #4] - const uint16_t *tmp; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - 80036f2: 687b ldr r3, [r7, #4] - 80036f4: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 80036f8: b2db uxtb r3, r3 - 80036fa: 2b21 cmp r3, #33 ; 0x21 - 80036fc: d13e bne.n 800377c - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80036fe: 687b ldr r3, [r7, #4] - 8003700: 689b ldr r3, [r3, #8] - 8003702: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8003706: d114 bne.n 8003732 - 8003708: 687b ldr r3, [r7, #4] - 800370a: 691b ldr r3, [r3, #16] - 800370c: 2b00 cmp r3, #0 - 800370e: d110 bne.n 8003732 - { - tmp = (const uint16_t *) huart->pTxBuffPtr; - 8003710: 687b ldr r3, [r7, #4] - 8003712: 6a1b ldr r3, [r3, #32] - 8003714: 60fb str r3, [r7, #12] - huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - 8003716: 68fb ldr r3, [r7, #12] - 8003718: 881b ldrh r3, [r3, #0] - 800371a: 461a mov r2, r3 - 800371c: 687b ldr r3, [r7, #4] - 800371e: 681b ldr r3, [r3, #0] - 8003720: f3c2 0208 ubfx r2, r2, #0, #9 - 8003724: 605a str r2, [r3, #4] - huart->pTxBuffPtr += 2U; - 8003726: 687b ldr r3, [r7, #4] - 8003728: 6a1b ldr r3, [r3, #32] - 800372a: 1c9a adds r2, r3, #2 - 800372c: 687b ldr r3, [r7, #4] - 800372e: 621a str r2, [r3, #32] - 8003730: e008 b.n 8003744 - } - else - { - huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - 8003732: 687b ldr r3, [r7, #4] - 8003734: 6a1b ldr r3, [r3, #32] - 8003736: 1c59 adds r1, r3, #1 - 8003738: 687a ldr r2, [r7, #4] - 800373a: 6211 str r1, [r2, #32] - 800373c: 781a ldrb r2, [r3, #0] - 800373e: 687b ldr r3, [r7, #4] - 8003740: 681b ldr r3, [r3, #0] - 8003742: 605a str r2, [r3, #4] - } - - if (--huart->TxXferCount == 0U) - 8003744: 687b ldr r3, [r7, #4] - 8003746: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8003748: b29b uxth r3, r3 - 800374a: 3b01 subs r3, #1 - 800374c: b29b uxth r3, r3 - 800374e: 687a ldr r2, [r7, #4] - 8003750: 4619 mov r1, r3 - 8003752: 84d1 strh r1, [r2, #38] ; 0x26 - 8003754: 2b00 cmp r3, #0 - 8003756: d10f bne.n 8003778 - { - /* Disable the UART Transmit Data Register Empty Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - 8003758: 687b ldr r3, [r7, #4] - 800375a: 681b ldr r3, [r3, #0] - 800375c: 68da ldr r2, [r3, #12] - 800375e: 687b ldr r3, [r7, #4] - 8003760: 681b ldr r3, [r3, #0] - 8003762: f022 0280 bic.w r2, r2, #128 ; 0x80 - 8003766: 60da str r2, [r3, #12] - - /* Enable the UART Transmit Complete Interrupt */ - __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - 8003768: 687b ldr r3, [r7, #4] - 800376a: 681b ldr r3, [r3, #0] - 800376c: 68da ldr r2, [r3, #12] - 800376e: 687b ldr r3, [r7, #4] - 8003770: 681b ldr r3, [r3, #0] - 8003772: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8003776: 60da str r2, [r3, #12] - } - return HAL_OK; - 8003778: 2300 movs r3, #0 - 800377a: e000 b.n 800377e - } - else - { - return HAL_BUSY; - 800377c: 2302 movs r3, #2 - } -} - 800377e: 4618 mov r0, r3 - 8003780: 3714 adds r7, #20 - 8003782: 46bd mov sp, r7 - 8003784: f85d 7b04 ldr.w r7, [sp], #4 - 8003788: 4770 bx lr - -0800378a : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) -{ - 800378a: b580 push {r7, lr} - 800378c: b082 sub sp, #8 - 800378e: af00 add r7, sp, #0 - 8003790: 6078 str r0, [r7, #4] - /* Disable the UART Transmit Complete Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - 8003792: 687b ldr r3, [r7, #4] - 8003794: 681b ldr r3, [r3, #0] - 8003796: 68da ldr r2, [r3, #12] - 8003798: 687b ldr r3, [r7, #4] - 800379a: 681b ldr r3, [r3, #0] - 800379c: f022 0240 bic.w r2, r2, #64 ; 0x40 - 80037a0: 60da str r2, [r3, #12] - - /* Tx process is ended, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - 80037a2: 687b ldr r3, [r7, #4] - 80037a4: 2220 movs r2, #32 - 80037a6: f883 2041 strb.w r2, [r3, #65] ; 0x41 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx complete callback*/ - huart->TxCpltCallback(huart); -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxCpltCallback(huart); - 80037aa: 6878 ldr r0, [r7, #4] - 80037ac: f7fd fb14 bl 8000dd8 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - - return HAL_OK; - 80037b0: 2300 movs r3, #0 -} - 80037b2: 4618 mov r0, r3 - 80037b4: 3708 adds r7, #8 - 80037b6: 46bd mov sp, r7 - 80037b8: bd80 pop {r7, pc} - -080037ba : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) -{ - 80037ba: b580 push {r7, lr} - 80037bc: b08c sub sp, #48 ; 0x30 - 80037be: af00 add r7, sp, #0 - 80037c0: 6078 str r0, [r7, #4] - uint8_t *pdata8bits = NULL; - 80037c2: 2300 movs r3, #0 - 80037c4: 62fb str r3, [r7, #44] ; 0x2c - uint16_t *pdata16bits = NULL; - 80037c6: 2300 movs r3, #0 - 80037c8: 62bb str r3, [r7, #40] ; 0x28 - - /* Check that a Rx process is ongoing */ - if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 80037ca: 687b ldr r3, [r7, #4] - 80037cc: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 80037d0: b2db uxtb r3, r3 - 80037d2: 2b22 cmp r3, #34 ; 0x22 - 80037d4: f040 80aa bne.w 800392c - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80037d8: 687b ldr r3, [r7, #4] - 80037da: 689b ldr r3, [r3, #8] - 80037dc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80037e0: d115 bne.n 800380e - 80037e2: 687b ldr r3, [r7, #4] - 80037e4: 691b ldr r3, [r3, #16] - 80037e6: 2b00 cmp r3, #0 - 80037e8: d111 bne.n 800380e - { - /* Unused pdata8bits */ - UNUSED(pdata8bits); - pdata16bits = (uint16_t *) huart->pRxBuffPtr; - 80037ea: 687b ldr r3, [r7, #4] - 80037ec: 6a9b ldr r3, [r3, #40] ; 0x28 - 80037ee: 62bb str r3, [r7, #40] ; 0x28 - *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - 80037f0: 687b ldr r3, [r7, #4] - 80037f2: 681b ldr r3, [r3, #0] - 80037f4: 685b ldr r3, [r3, #4] - 80037f6: b29b uxth r3, r3 - 80037f8: f3c3 0308 ubfx r3, r3, #0, #9 - 80037fc: b29a uxth r2, r3 - 80037fe: 6abb ldr r3, [r7, #40] ; 0x28 - 8003800: 801a strh r2, [r3, #0] - huart->pRxBuffPtr += 2U; - 8003802: 687b ldr r3, [r7, #4] - 8003804: 6a9b ldr r3, [r3, #40] ; 0x28 - 8003806: 1c9a adds r2, r3, #2 - 8003808: 687b ldr r3, [r7, #4] - 800380a: 629a str r2, [r3, #40] ; 0x28 - 800380c: e024 b.n 8003858 - } - else - { - pdata8bits = (uint8_t *) huart->pRxBuffPtr; - 800380e: 687b ldr r3, [r7, #4] - 8003810: 6a9b ldr r3, [r3, #40] ; 0x28 - 8003812: 62fb str r3, [r7, #44] ; 0x2c - /* Unused pdata16bits */ - UNUSED(pdata16bits); - - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 8003814: 687b ldr r3, [r7, #4] - 8003816: 689b ldr r3, [r3, #8] - 8003818: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 800381c: d007 beq.n 800382e - 800381e: 687b ldr r3, [r7, #4] - 8003820: 689b ldr r3, [r3, #8] - 8003822: 2b00 cmp r3, #0 - 8003824: d10a bne.n 800383c - 8003826: 687b ldr r3, [r7, #4] - 8003828: 691b ldr r3, [r3, #16] - 800382a: 2b00 cmp r3, #0 - 800382c: d106 bne.n 800383c - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 800382e: 687b ldr r3, [r7, #4] - 8003830: 681b ldr r3, [r3, #0] - 8003832: 685b ldr r3, [r3, #4] - 8003834: b2da uxtb r2, r3 - 8003836: 6afb ldr r3, [r7, #44] ; 0x2c - 8003838: 701a strb r2, [r3, #0] - 800383a: e008 b.n 800384e - } - else - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 800383c: 687b ldr r3, [r7, #4] - 800383e: 681b ldr r3, [r3, #0] - 8003840: 685b ldr r3, [r3, #4] - 8003842: b2db uxtb r3, r3 - 8003844: f003 037f and.w r3, r3, #127 ; 0x7f - 8003848: b2da uxtb r2, r3 - 800384a: 6afb ldr r3, [r7, #44] ; 0x2c - 800384c: 701a strb r2, [r3, #0] - } - huart->pRxBuffPtr += 1U; - 800384e: 687b ldr r3, [r7, #4] - 8003850: 6a9b ldr r3, [r3, #40] ; 0x28 - 8003852: 1c5a adds r2, r3, #1 - 8003854: 687b ldr r3, [r7, #4] - 8003856: 629a str r2, [r3, #40] ; 0x28 - } - - if (--huart->RxXferCount == 0U) - 8003858: 687b ldr r3, [r7, #4] - 800385a: 8ddb ldrh r3, [r3, #46] ; 0x2e - 800385c: b29b uxth r3, r3 - 800385e: 3b01 subs r3, #1 - 8003860: b29b uxth r3, r3 - 8003862: 687a ldr r2, [r7, #4] - 8003864: 4619 mov r1, r3 - 8003866: 85d1 strh r1, [r2, #46] ; 0x2e - 8003868: 2b00 cmp r3, #0 - 800386a: d15d bne.n 8003928 - { - /* Disable the UART Data Register not empty Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - 800386c: 687b ldr r3, [r7, #4] - 800386e: 681b ldr r3, [r3, #0] - 8003870: 68da ldr r2, [r3, #12] - 8003872: 687b ldr r3, [r7, #4] - 8003874: 681b ldr r3, [r3, #0] - 8003876: f022 0220 bic.w r2, r2, #32 - 800387a: 60da str r2, [r3, #12] - - /* Disable the UART Parity Error Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - 800387c: 687b ldr r3, [r7, #4] - 800387e: 681b ldr r3, [r3, #0] - 8003880: 68da ldr r2, [r3, #12] - 8003882: 687b ldr r3, [r7, #4] - 8003884: 681b ldr r3, [r3, #0] - 8003886: f422 7280 bic.w r2, r2, #256 ; 0x100 - 800388a: 60da str r2, [r3, #12] - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - 800388c: 687b ldr r3, [r7, #4] - 800388e: 681b ldr r3, [r3, #0] - 8003890: 695a ldr r2, [r3, #20] - 8003892: 687b ldr r3, [r7, #4] - 8003894: 681b ldr r3, [r3, #0] - 8003896: f022 0201 bic.w r2, r2, #1 - 800389a: 615a str r2, [r3, #20] - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 800389c: 687b ldr r3, [r7, #4] - 800389e: 2220 movs r2, #32 - 80038a0: f883 2042 strb.w r2, [r3, #66] ; 0x42 - - /* Initialize type of RxEvent to Transfer Complete */ - huart->RxEventType = HAL_UART_RXEVENT_TC; - 80038a4: 687b ldr r3, [r7, #4] - 80038a6: 2200 movs r2, #0 - 80038a8: 635a str r2, [r3, #52] ; 0x34 - - /* Check current reception Mode : - If Reception till IDLE event has been selected : */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80038aa: 687b ldr r3, [r7, #4] - 80038ac: 6b1b ldr r3, [r3, #48] ; 0x30 - 80038ae: 2b01 cmp r3, #1 - 80038b0: d135 bne.n 800391e - { - /* Set reception type to Standard */ - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80038b2: 687b ldr r3, [r7, #4] - 80038b4: 2200 movs r2, #0 - 80038b6: 631a str r2, [r3, #48] ; 0x30 - - /* Disable IDLE interrupt */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 80038b8: 687b ldr r3, [r7, #4] - 80038ba: 681b ldr r3, [r3, #0] - 80038bc: 330c adds r3, #12 - 80038be: 617b str r3, [r7, #20] - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80038c0: 697b ldr r3, [r7, #20] - 80038c2: e853 3f00 ldrex r3, [r3] - 80038c6: 613b str r3, [r7, #16] - return(result); - 80038c8: 693b ldr r3, [r7, #16] - 80038ca: f023 0310 bic.w r3, r3, #16 - 80038ce: 627b str r3, [r7, #36] ; 0x24 - 80038d0: 687b ldr r3, [r7, #4] - 80038d2: 681b ldr r3, [r3, #0] - 80038d4: 330c adds r3, #12 - 80038d6: 6a7a ldr r2, [r7, #36] ; 0x24 - 80038d8: 623a str r2, [r7, #32] - 80038da: 61fb str r3, [r7, #28] - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80038dc: 69f9 ldr r1, [r7, #28] - 80038de: 6a3a ldr r2, [r7, #32] - 80038e0: e841 2300 strex r3, r2, [r1] - 80038e4: 61bb str r3, [r7, #24] - return(result); - 80038e6: 69bb ldr r3, [r7, #24] - 80038e8: 2b00 cmp r3, #0 - 80038ea: d1e5 bne.n 80038b8 - - /* Check if IDLE flag is set */ - if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - 80038ec: 687b ldr r3, [r7, #4] - 80038ee: 681b ldr r3, [r3, #0] - 80038f0: 681b ldr r3, [r3, #0] - 80038f2: f003 0310 and.w r3, r3, #16 - 80038f6: 2b10 cmp r3, #16 - 80038f8: d10a bne.n 8003910 - { - /* Clear IDLE flag in ISR */ - __HAL_UART_CLEAR_IDLEFLAG(huart); - 80038fa: 2300 movs r3, #0 - 80038fc: 60fb str r3, [r7, #12] - 80038fe: 687b ldr r3, [r7, #4] - 8003900: 681b ldr r3, [r3, #0] - 8003902: 681b ldr r3, [r3, #0] - 8003904: 60fb str r3, [r7, #12] - 8003906: 687b ldr r3, [r7, #4] - 8003908: 681b ldr r3, [r3, #0] - 800390a: 685b ldr r3, [r3, #4] - 800390c: 60fb str r3, [r7, #12] - 800390e: 68fb ldr r3, [r7, #12] -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8003910: 687b ldr r3, [r7, #4] - 8003912: 8d9b ldrh r3, [r3, #44] ; 0x2c - 8003914: 4619 mov r1, r3 - 8003916: 6878 ldr r0, [r7, #4] - 8003918: f7ff fe0e bl 8003538 - 800391c: e002 b.n 8003924 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxCpltCallback(huart); -#else - /*Call legacy weak Rx complete callback*/ - HAL_UART_RxCpltCallback(huart); - 800391e: 6878 ldr r0, [r7, #4] - 8003920: f7ff fdf6 bl 8003510 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - - return HAL_OK; - 8003924: 2300 movs r3, #0 - 8003926: e002 b.n 800392e - } - return HAL_OK; - 8003928: 2300 movs r3, #0 - 800392a: e000 b.n 800392e - } - else - { - return HAL_BUSY; - 800392c: 2302 movs r3, #2 - } -} - 800392e: 4618 mov r0, r3 - 8003930: 3730 adds r7, #48 ; 0x30 - 8003932: 46bd mov sp, r7 - 8003934: bd80 pop {r7, pc} - ... - -08003938 : +08003038 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8003938: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 800393c: b0c0 sub sp, #256 ; 0x100 - 800393e: af00 add r7, sp, #0 - 8003940: f8c7 00f4 str.w r0, [r7, #244] ; 0xf4 + 8003038: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 800303c: b0c0 sub sp, #256 ; 0x100 + 800303e: af00 add r7, sp, #0 + 8003040: f8c7 00f4 str.w r0, [r7, #244] ; 0xf4 assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8003944: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003948: 681b ldr r3, [r3, #0] - 800394a: 691b ldr r3, [r3, #16] - 800394c: f423 5040 bic.w r0, r3, #12288 ; 0x3000 - 8003950: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003954: 68d9 ldr r1, [r3, #12] - 8003956: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 800395a: 681a ldr r2, [r3, #0] - 800395c: ea40 0301 orr.w r3, r0, r1 - 8003960: 6113 str r3, [r2, #16] + 8003044: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003048: 681b ldr r3, [r3, #0] + 800304a: 691b ldr r3, [r3, #16] + 800304c: f423 5040 bic.w r0, r3, #12288 ; 0x3000 + 8003050: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003054: 68d9 ldr r1, [r3, #12] + 8003056: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 800305a: 681a ldr r2, [r3, #0] + 800305c: ea40 0301 orr.w r3, r0, r1 + 8003060: 6113 str r3, [r2, #16] Set the M bits according to huart->Init.WordLength value Set PCE and PS bits according to huart->Init.Parity value Set TE and RE bits according to huart->Init.Mode value Set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; - 8003962: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003966: 689a ldr r2, [r3, #8] - 8003968: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 800396c: 691b ldr r3, [r3, #16] - 800396e: 431a orrs r2, r3 - 8003970: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003974: 695b ldr r3, [r3, #20] - 8003976: 431a orrs r2, r3 - 8003978: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 800397c: 69db ldr r3, [r3, #28] - 800397e: 4313 orrs r3, r2 - 8003980: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8 + 8003062: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003066: 689a ldr r2, [r3, #8] + 8003068: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 800306c: 691b ldr r3, [r3, #16] + 800306e: 431a orrs r2, r3 + 8003070: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003074: 695b ldr r3, [r3, #20] + 8003076: 431a orrs r2, r3 + 8003078: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 800307c: 69db ldr r3, [r3, #28] + 800307e: 4313 orrs r3, r2 + 8003080: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8 MODIFY_REG(huart->Instance->CR1, - 8003984: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003988: 681b ldr r3, [r3, #0] - 800398a: 68db ldr r3, [r3, #12] - 800398c: f423 4116 bic.w r1, r3, #38400 ; 0x9600 - 8003990: f021 010c bic.w r1, r1, #12 - 8003994: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003998: 681a ldr r2, [r3, #0] - 800399a: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8 - 800399e: 430b orrs r3, r1 - 80039a0: 60d3 str r3, [r2, #12] + 8003084: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003088: 681b ldr r3, [r3, #0] + 800308a: 68db ldr r3, [r3, #12] + 800308c: f423 4116 bic.w r1, r3, #38400 ; 0x9600 + 8003090: f021 010c bic.w r1, r1, #12 + 8003094: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003098: 681a ldr r2, [r3, #0] + 800309a: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8 + 800309e: 430b orrs r3, r1 + 80030a0: 60d3 str r3, [r2, #12] (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 80039a2: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 80039a6: 681b ldr r3, [r3, #0] - 80039a8: 695b ldr r3, [r3, #20] - 80039aa: f423 7040 bic.w r0, r3, #768 ; 0x300 - 80039ae: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 80039b2: 6999 ldr r1, [r3, #24] - 80039b4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 80039b8: 681a ldr r2, [r3, #0] - 80039ba: ea40 0301 orr.w r3, r0, r1 - 80039be: 6153 str r3, [r2, #20] + 80030a2: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80030a6: 681b ldr r3, [r3, #0] + 80030a8: 695b ldr r3, [r3, #20] + 80030aa: f423 7040 bic.w r0, r3, #768 ; 0x300 + 80030ae: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80030b2: 6999 ldr r1, [r3, #24] + 80030b4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80030b8: 681a ldr r2, [r3, #0] + 80030ba: ea40 0301 orr.w r3, r0, r1 + 80030be: 6153 str r3, [r2, #20] if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10)) { pclk = HAL_RCC_GetPCLK2Freq(); } #elif defined(USART6) if ((huart->Instance == USART1) || (huart->Instance == USART6)) - 80039c0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 80039c4: 681a ldr r2, [r3, #0] - 80039c6: 4b8f ldr r3, [pc, #572] ; (8003c04 ) - 80039c8: 429a cmp r2, r3 - 80039ca: d005 beq.n 80039d8 - 80039cc: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 80039d0: 681a ldr r2, [r3, #0] - 80039d2: 4b8d ldr r3, [pc, #564] ; (8003c08 ) - 80039d4: 429a cmp r2, r3 - 80039d6: d104 bne.n 80039e2 + 80030c0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80030c4: 681a ldr r2, [r3, #0] + 80030c6: 4b8f ldr r3, [pc, #572] ; (8003304 ) + 80030c8: 429a cmp r2, r3 + 80030ca: d005 beq.n 80030d8 + 80030cc: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80030d0: 681a ldr r2, [r3, #0] + 80030d2: 4b8d ldr r3, [pc, #564] ; (8003308 ) + 80030d4: 429a cmp r2, r3 + 80030d6: d104 bne.n 80030e2 { pclk = HAL_RCC_GetPCLK2Freq(); - 80039d8: f7ff f940 bl 8002c5c - 80039dc: f8c7 00fc str.w r0, [r7, #252] ; 0xfc - 80039e0: e003 b.n 80039ea + 80030d8: f7ff fd42 bl 8002b60 + 80030dc: f8c7 00fc str.w r0, [r7, #252] ; 0xfc + 80030e0: e003 b.n 80030ea pclk = HAL_RCC_GetPCLK2Freq(); } #endif /* USART6 */ else { pclk = HAL_RCC_GetPCLK1Freq(); - 80039e2: f7ff f927 bl 8002c34 - 80039e6: f8c7 00fc str.w r0, [r7, #252] ; 0xfc + 80030e2: f7ff fd29 bl 8002b38 + 80030e6: f8c7 00fc str.w r0, [r7, #252] ; 0xfc } /*-------------------------- USART BRR Configuration ---------------------*/ if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 80039ea: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 80039ee: 69db ldr r3, [r3, #28] - 80039f0: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 80039f4: f040 810c bne.w 8003c10 + 80030ea: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80030ee: 69db ldr r3, [r3, #28] + 80030f0: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 80030f4: f040 810c bne.w 8003310 { huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate); - 80039f8: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 80039fc: 2200 movs r2, #0 - 80039fe: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8 - 8003a02: f8c7 20ec str.w r2, [r7, #236] ; 0xec - 8003a06: e9d7 453a ldrd r4, r5, [r7, #232] ; 0xe8 - 8003a0a: 4622 mov r2, r4 - 8003a0c: 462b mov r3, r5 - 8003a0e: 1891 adds r1, r2, r2 - 8003a10: 65b9 str r1, [r7, #88] ; 0x58 - 8003a12: 415b adcs r3, r3 - 8003a14: 65fb str r3, [r7, #92] ; 0x5c - 8003a16: e9d7 2316 ldrd r2, r3, [r7, #88] ; 0x58 - 8003a1a: 4621 mov r1, r4 - 8003a1c: eb12 0801 adds.w r8, r2, r1 - 8003a20: 4629 mov r1, r5 - 8003a22: eb43 0901 adc.w r9, r3, r1 - 8003a26: f04f 0200 mov.w r2, #0 - 8003a2a: f04f 0300 mov.w r3, #0 - 8003a2e: ea4f 03c9 mov.w r3, r9, lsl #3 - 8003a32: ea43 7358 orr.w r3, r3, r8, lsr #29 - 8003a36: ea4f 02c8 mov.w r2, r8, lsl #3 - 8003a3a: 4690 mov r8, r2 - 8003a3c: 4699 mov r9, r3 - 8003a3e: 4623 mov r3, r4 - 8003a40: eb18 0303 adds.w r3, r8, r3 - 8003a44: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 - 8003a48: 462b mov r3, r5 - 8003a4a: eb49 0303 adc.w r3, r9, r3 - 8003a4e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 - 8003a52: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003a56: 685b ldr r3, [r3, #4] - 8003a58: 2200 movs r2, #0 - 8003a5a: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 - 8003a5e: f8c7 20dc str.w r2, [r7, #220] ; 0xdc - 8003a62: e9d7 1236 ldrd r1, r2, [r7, #216] ; 0xd8 - 8003a66: 460b mov r3, r1 - 8003a68: 18db adds r3, r3, r3 - 8003a6a: 653b str r3, [r7, #80] ; 0x50 - 8003a6c: 4613 mov r3, r2 - 8003a6e: eb42 0303 adc.w r3, r2, r3 - 8003a72: 657b str r3, [r7, #84] ; 0x54 - 8003a74: e9d7 2314 ldrd r2, r3, [r7, #80] ; 0x50 - 8003a78: e9d7 0138 ldrd r0, r1, [r7, #224] ; 0xe0 - 8003a7c: f7fc fbbe bl 80001fc <__aeabi_uldivmod> - 8003a80: 4602 mov r2, r0 - 8003a82: 460b mov r3, r1 - 8003a84: 4b61 ldr r3, [pc, #388] ; (8003c0c ) - 8003a86: fba3 2302 umull r2, r3, r3, r2 - 8003a8a: 095b lsrs r3, r3, #5 - 8003a8c: 011c lsls r4, r3, #4 - 8003a8e: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8003a92: 2200 movs r2, #0 - 8003a94: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 - 8003a98: f8c7 20d4 str.w r2, [r7, #212] ; 0xd4 - 8003a9c: e9d7 8934 ldrd r8, r9, [r7, #208] ; 0xd0 - 8003aa0: 4642 mov r2, r8 - 8003aa2: 464b mov r3, r9 - 8003aa4: 1891 adds r1, r2, r2 - 8003aa6: 64b9 str r1, [r7, #72] ; 0x48 - 8003aa8: 415b adcs r3, r3 - 8003aaa: 64fb str r3, [r7, #76] ; 0x4c - 8003aac: e9d7 2312 ldrd r2, r3, [r7, #72] ; 0x48 - 8003ab0: 4641 mov r1, r8 - 8003ab2: eb12 0a01 adds.w sl, r2, r1 - 8003ab6: 4649 mov r1, r9 - 8003ab8: eb43 0b01 adc.w fp, r3, r1 - 8003abc: f04f 0200 mov.w r2, #0 - 8003ac0: f04f 0300 mov.w r3, #0 - 8003ac4: ea4f 03cb mov.w r3, fp, lsl #3 - 8003ac8: ea43 735a orr.w r3, r3, sl, lsr #29 - 8003acc: ea4f 02ca mov.w r2, sl, lsl #3 - 8003ad0: 4692 mov sl, r2 - 8003ad2: 469b mov fp, r3 - 8003ad4: 4643 mov r3, r8 - 8003ad6: eb1a 0303 adds.w r3, sl, r3 - 8003ada: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 - 8003ade: 464b mov r3, r9 - 8003ae0: eb4b 0303 adc.w r3, fp, r3 - 8003ae4: f8c7 30cc str.w r3, [r7, #204] ; 0xcc - 8003ae8: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003aec: 685b ldr r3, [r3, #4] - 8003aee: 2200 movs r2, #0 - 8003af0: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 - 8003af4: f8c7 20c4 str.w r2, [r7, #196] ; 0xc4 - 8003af8: e9d7 1230 ldrd r1, r2, [r7, #192] ; 0xc0 - 8003afc: 460b mov r3, r1 - 8003afe: 18db adds r3, r3, r3 - 8003b00: 643b str r3, [r7, #64] ; 0x40 - 8003b02: 4613 mov r3, r2 - 8003b04: eb42 0303 adc.w r3, r2, r3 - 8003b08: 647b str r3, [r7, #68] ; 0x44 - 8003b0a: e9d7 2310 ldrd r2, r3, [r7, #64] ; 0x40 - 8003b0e: e9d7 0132 ldrd r0, r1, [r7, #200] ; 0xc8 - 8003b12: f7fc fb73 bl 80001fc <__aeabi_uldivmod> - 8003b16: 4602 mov r2, r0 - 8003b18: 460b mov r3, r1 - 8003b1a: 4611 mov r1, r2 - 8003b1c: 4b3b ldr r3, [pc, #236] ; (8003c0c ) - 8003b1e: fba3 2301 umull r2, r3, r3, r1 - 8003b22: 095b lsrs r3, r3, #5 - 8003b24: 2264 movs r2, #100 ; 0x64 - 8003b26: fb02 f303 mul.w r3, r2, r3 - 8003b2a: 1acb subs r3, r1, r3 - 8003b2c: 00db lsls r3, r3, #3 - 8003b2e: f103 0232 add.w r2, r3, #50 ; 0x32 - 8003b32: 4b36 ldr r3, [pc, #216] ; (8003c0c ) - 8003b34: fba3 2302 umull r2, r3, r3, r2 - 8003b38: 095b lsrs r3, r3, #5 - 8003b3a: 005b lsls r3, r3, #1 - 8003b3c: f403 73f8 and.w r3, r3, #496 ; 0x1f0 - 8003b40: 441c add r4, r3 - 8003b42: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8003b46: 2200 movs r2, #0 - 8003b48: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 - 8003b4c: f8c7 20bc str.w r2, [r7, #188] ; 0xbc - 8003b50: e9d7 892e ldrd r8, r9, [r7, #184] ; 0xb8 - 8003b54: 4642 mov r2, r8 - 8003b56: 464b mov r3, r9 - 8003b58: 1891 adds r1, r2, r2 - 8003b5a: 63b9 str r1, [r7, #56] ; 0x38 - 8003b5c: 415b adcs r3, r3 - 8003b5e: 63fb str r3, [r7, #60] ; 0x3c - 8003b60: e9d7 230e ldrd r2, r3, [r7, #56] ; 0x38 - 8003b64: 4641 mov r1, r8 - 8003b66: 1851 adds r1, r2, r1 - 8003b68: 6339 str r1, [r7, #48] ; 0x30 - 8003b6a: 4649 mov r1, r9 - 8003b6c: 414b adcs r3, r1 - 8003b6e: 637b str r3, [r7, #52] ; 0x34 - 8003b70: f04f 0200 mov.w r2, #0 - 8003b74: f04f 0300 mov.w r3, #0 - 8003b78: e9d7 ab0c ldrd sl, fp, [r7, #48] ; 0x30 - 8003b7c: 4659 mov r1, fp - 8003b7e: 00cb lsls r3, r1, #3 - 8003b80: 4651 mov r1, sl - 8003b82: ea43 7351 orr.w r3, r3, r1, lsr #29 - 8003b86: 4651 mov r1, sl - 8003b88: 00ca lsls r2, r1, #3 - 8003b8a: 4610 mov r0, r2 - 8003b8c: 4619 mov r1, r3 - 8003b8e: 4603 mov r3, r0 - 8003b90: 4642 mov r2, r8 - 8003b92: 189b adds r3, r3, r2 - 8003b94: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 - 8003b98: 464b mov r3, r9 - 8003b9a: 460a mov r2, r1 - 8003b9c: eb42 0303 adc.w r3, r2, r3 - 8003ba0: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 - 8003ba4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003ba8: 685b ldr r3, [r3, #4] - 8003baa: 2200 movs r2, #0 - 8003bac: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 - 8003bb0: f8c7 20ac str.w r2, [r7, #172] ; 0xac - 8003bb4: e9d7 122a ldrd r1, r2, [r7, #168] ; 0xa8 - 8003bb8: 460b mov r3, r1 - 8003bba: 18db adds r3, r3, r3 - 8003bbc: 62bb str r3, [r7, #40] ; 0x28 - 8003bbe: 4613 mov r3, r2 - 8003bc0: eb42 0303 adc.w r3, r2, r3 - 8003bc4: 62fb str r3, [r7, #44] ; 0x2c - 8003bc6: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 - 8003bca: e9d7 012c ldrd r0, r1, [r7, #176] ; 0xb0 - 8003bce: f7fc fb15 bl 80001fc <__aeabi_uldivmod> - 8003bd2: 4602 mov r2, r0 - 8003bd4: 460b mov r3, r1 - 8003bd6: 4b0d ldr r3, [pc, #52] ; (8003c0c ) - 8003bd8: fba3 1302 umull r1, r3, r3, r2 - 8003bdc: 095b lsrs r3, r3, #5 - 8003bde: 2164 movs r1, #100 ; 0x64 - 8003be0: fb01 f303 mul.w r3, r1, r3 - 8003be4: 1ad3 subs r3, r2, r3 - 8003be6: 00db lsls r3, r3, #3 - 8003be8: 3332 adds r3, #50 ; 0x32 - 8003bea: 4a08 ldr r2, [pc, #32] ; (8003c0c ) - 8003bec: fba2 2303 umull r2, r3, r2, r3 - 8003bf0: 095b lsrs r3, r3, #5 - 8003bf2: f003 0207 and.w r2, r3, #7 - 8003bf6: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003bfa: 681b ldr r3, [r3, #0] - 8003bfc: 4422 add r2, r4 - 8003bfe: 609a str r2, [r3, #8] + 80030f8: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 80030fc: 2200 movs r2, #0 + 80030fe: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8 + 8003102: f8c7 20ec str.w r2, [r7, #236] ; 0xec + 8003106: e9d7 453a ldrd r4, r5, [r7, #232] ; 0xe8 + 800310a: 4622 mov r2, r4 + 800310c: 462b mov r3, r5 + 800310e: 1891 adds r1, r2, r2 + 8003110: 65b9 str r1, [r7, #88] ; 0x58 + 8003112: 415b adcs r3, r3 + 8003114: 65fb str r3, [r7, #92] ; 0x5c + 8003116: e9d7 2316 ldrd r2, r3, [r7, #88] ; 0x58 + 800311a: 4621 mov r1, r4 + 800311c: eb12 0801 adds.w r8, r2, r1 + 8003120: 4629 mov r1, r5 + 8003122: eb43 0901 adc.w r9, r3, r1 + 8003126: f04f 0200 mov.w r2, #0 + 800312a: f04f 0300 mov.w r3, #0 + 800312e: ea4f 03c9 mov.w r3, r9, lsl #3 + 8003132: ea43 7358 orr.w r3, r3, r8, lsr #29 + 8003136: ea4f 02c8 mov.w r2, r8, lsl #3 + 800313a: 4690 mov r8, r2 + 800313c: 4699 mov r9, r3 + 800313e: 4623 mov r3, r4 + 8003140: eb18 0303 adds.w r3, r8, r3 + 8003144: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 8003148: 462b mov r3, r5 + 800314a: eb49 0303 adc.w r3, r9, r3 + 800314e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 8003152: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003156: 685b ldr r3, [r3, #4] + 8003158: 2200 movs r2, #0 + 800315a: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 800315e: f8c7 20dc str.w r2, [r7, #220] ; 0xdc + 8003162: e9d7 1236 ldrd r1, r2, [r7, #216] ; 0xd8 + 8003166: 460b mov r3, r1 + 8003168: 18db adds r3, r3, r3 + 800316a: 653b str r3, [r7, #80] ; 0x50 + 800316c: 4613 mov r3, r2 + 800316e: eb42 0303 adc.w r3, r2, r3 + 8003172: 657b str r3, [r7, #84] ; 0x54 + 8003174: e9d7 2314 ldrd r2, r3, [r7, #80] ; 0x50 + 8003178: e9d7 0138 ldrd r0, r1, [r7, #224] ; 0xe0 + 800317c: f7fd f83e bl 80001fc <__aeabi_uldivmod> + 8003180: 4602 mov r2, r0 + 8003182: 460b mov r3, r1 + 8003184: 4b61 ldr r3, [pc, #388] ; (800330c ) + 8003186: fba3 2302 umull r2, r3, r3, r2 + 800318a: 095b lsrs r3, r3, #5 + 800318c: 011c lsls r4, r3, #4 + 800318e: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8003192: 2200 movs r2, #0 + 8003194: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 + 8003198: f8c7 20d4 str.w r2, [r7, #212] ; 0xd4 + 800319c: e9d7 8934 ldrd r8, r9, [r7, #208] ; 0xd0 + 80031a0: 4642 mov r2, r8 + 80031a2: 464b mov r3, r9 + 80031a4: 1891 adds r1, r2, r2 + 80031a6: 64b9 str r1, [r7, #72] ; 0x48 + 80031a8: 415b adcs r3, r3 + 80031aa: 64fb str r3, [r7, #76] ; 0x4c + 80031ac: e9d7 2312 ldrd r2, r3, [r7, #72] ; 0x48 + 80031b0: 4641 mov r1, r8 + 80031b2: eb12 0a01 adds.w sl, r2, r1 + 80031b6: 4649 mov r1, r9 + 80031b8: eb43 0b01 adc.w fp, r3, r1 + 80031bc: f04f 0200 mov.w r2, #0 + 80031c0: f04f 0300 mov.w r3, #0 + 80031c4: ea4f 03cb mov.w r3, fp, lsl #3 + 80031c8: ea43 735a orr.w r3, r3, sl, lsr #29 + 80031cc: ea4f 02ca mov.w r2, sl, lsl #3 + 80031d0: 4692 mov sl, r2 + 80031d2: 469b mov fp, r3 + 80031d4: 4643 mov r3, r8 + 80031d6: eb1a 0303 adds.w r3, sl, r3 + 80031da: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 80031de: 464b mov r3, r9 + 80031e0: eb4b 0303 adc.w r3, fp, r3 + 80031e4: f8c7 30cc str.w r3, [r7, #204] ; 0xcc + 80031e8: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80031ec: 685b ldr r3, [r3, #4] + 80031ee: 2200 movs r2, #0 + 80031f0: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 + 80031f4: f8c7 20c4 str.w r2, [r7, #196] ; 0xc4 + 80031f8: e9d7 1230 ldrd r1, r2, [r7, #192] ; 0xc0 + 80031fc: 460b mov r3, r1 + 80031fe: 18db adds r3, r3, r3 + 8003200: 643b str r3, [r7, #64] ; 0x40 + 8003202: 4613 mov r3, r2 + 8003204: eb42 0303 adc.w r3, r2, r3 + 8003208: 647b str r3, [r7, #68] ; 0x44 + 800320a: e9d7 2310 ldrd r2, r3, [r7, #64] ; 0x40 + 800320e: e9d7 0132 ldrd r0, r1, [r7, #200] ; 0xc8 + 8003212: f7fc fff3 bl 80001fc <__aeabi_uldivmod> + 8003216: 4602 mov r2, r0 + 8003218: 460b mov r3, r1 + 800321a: 4611 mov r1, r2 + 800321c: 4b3b ldr r3, [pc, #236] ; (800330c ) + 800321e: fba3 2301 umull r2, r3, r3, r1 + 8003222: 095b lsrs r3, r3, #5 + 8003224: 2264 movs r2, #100 ; 0x64 + 8003226: fb02 f303 mul.w r3, r2, r3 + 800322a: 1acb subs r3, r1, r3 + 800322c: 00db lsls r3, r3, #3 + 800322e: f103 0232 add.w r2, r3, #50 ; 0x32 + 8003232: 4b36 ldr r3, [pc, #216] ; (800330c ) + 8003234: fba3 2302 umull r2, r3, r3, r2 + 8003238: 095b lsrs r3, r3, #5 + 800323a: 005b lsls r3, r3, #1 + 800323c: f403 73f8 and.w r3, r3, #496 ; 0x1f0 + 8003240: 441c add r4, r3 + 8003242: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8003246: 2200 movs r2, #0 + 8003248: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 + 800324c: f8c7 20bc str.w r2, [r7, #188] ; 0xbc + 8003250: e9d7 892e ldrd r8, r9, [r7, #184] ; 0xb8 + 8003254: 4642 mov r2, r8 + 8003256: 464b mov r3, r9 + 8003258: 1891 adds r1, r2, r2 + 800325a: 63b9 str r1, [r7, #56] ; 0x38 + 800325c: 415b adcs r3, r3 + 800325e: 63fb str r3, [r7, #60] ; 0x3c + 8003260: e9d7 230e ldrd r2, r3, [r7, #56] ; 0x38 + 8003264: 4641 mov r1, r8 + 8003266: 1851 adds r1, r2, r1 + 8003268: 6339 str r1, [r7, #48] ; 0x30 + 800326a: 4649 mov r1, r9 + 800326c: 414b adcs r3, r1 + 800326e: 637b str r3, [r7, #52] ; 0x34 + 8003270: f04f 0200 mov.w r2, #0 + 8003274: f04f 0300 mov.w r3, #0 + 8003278: e9d7 ab0c ldrd sl, fp, [r7, #48] ; 0x30 + 800327c: 4659 mov r1, fp + 800327e: 00cb lsls r3, r1, #3 + 8003280: 4651 mov r1, sl + 8003282: ea43 7351 orr.w r3, r3, r1, lsr #29 + 8003286: 4651 mov r1, sl + 8003288: 00ca lsls r2, r1, #3 + 800328a: 4610 mov r0, r2 + 800328c: 4619 mov r1, r3 + 800328e: 4603 mov r3, r0 + 8003290: 4642 mov r2, r8 + 8003292: 189b adds r3, r3, r2 + 8003294: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 + 8003298: 464b mov r3, r9 + 800329a: 460a mov r2, r1 + 800329c: eb42 0303 adc.w r3, r2, r3 + 80032a0: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 + 80032a4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80032a8: 685b ldr r3, [r3, #4] + 80032aa: 2200 movs r2, #0 + 80032ac: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 + 80032b0: f8c7 20ac str.w r2, [r7, #172] ; 0xac + 80032b4: e9d7 122a ldrd r1, r2, [r7, #168] ; 0xa8 + 80032b8: 460b mov r3, r1 + 80032ba: 18db adds r3, r3, r3 + 80032bc: 62bb str r3, [r7, #40] ; 0x28 + 80032be: 4613 mov r3, r2 + 80032c0: eb42 0303 adc.w r3, r2, r3 + 80032c4: 62fb str r3, [r7, #44] ; 0x2c + 80032c6: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 + 80032ca: e9d7 012c ldrd r0, r1, [r7, #176] ; 0xb0 + 80032ce: f7fc ff95 bl 80001fc <__aeabi_uldivmod> + 80032d2: 4602 mov r2, r0 + 80032d4: 460b mov r3, r1 + 80032d6: 4b0d ldr r3, [pc, #52] ; (800330c ) + 80032d8: fba3 1302 umull r1, r3, r3, r2 + 80032dc: 095b lsrs r3, r3, #5 + 80032de: 2164 movs r1, #100 ; 0x64 + 80032e0: fb01 f303 mul.w r3, r1, r3 + 80032e4: 1ad3 subs r3, r2, r3 + 80032e6: 00db lsls r3, r3, #3 + 80032e8: 3332 adds r3, #50 ; 0x32 + 80032ea: 4a08 ldr r2, [pc, #32] ; (800330c ) + 80032ec: fba2 2303 umull r2, r3, r2, r3 + 80032f0: 095b lsrs r3, r3, #5 + 80032f2: f003 0207 and.w r2, r3, #7 + 80032f6: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80032fa: 681b ldr r3, [r3, #0] + 80032fc: 4422 add r2, r4 + 80032fe: 609a str r2, [r3, #8] } else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } } - 8003c00: e106 b.n 8003e10 - 8003c02: bf00 nop - 8003c04: 40011000 .word 0x40011000 - 8003c08: 40011400 .word 0x40011400 - 8003c0c: 51eb851f .word 0x51eb851f + 8003300: e106 b.n 8003510 + 8003302: bf00 nop + 8003304: 40011000 .word 0x40011000 + 8003308: 40011400 .word 0x40011400 + 800330c: 51eb851f .word 0x51eb851f huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 8003c10: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8003c14: 2200 movs r2, #0 - 8003c16: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 - 8003c1a: f8c7 20a4 str.w r2, [r7, #164] ; 0xa4 - 8003c1e: e9d7 8928 ldrd r8, r9, [r7, #160] ; 0xa0 - 8003c22: 4642 mov r2, r8 - 8003c24: 464b mov r3, r9 - 8003c26: 1891 adds r1, r2, r2 - 8003c28: 6239 str r1, [r7, #32] - 8003c2a: 415b adcs r3, r3 - 8003c2c: 627b str r3, [r7, #36] ; 0x24 - 8003c2e: e9d7 2308 ldrd r2, r3, [r7, #32] - 8003c32: 4641 mov r1, r8 - 8003c34: 1854 adds r4, r2, r1 - 8003c36: 4649 mov r1, r9 - 8003c38: eb43 0501 adc.w r5, r3, r1 - 8003c3c: f04f 0200 mov.w r2, #0 - 8003c40: f04f 0300 mov.w r3, #0 - 8003c44: 00eb lsls r3, r5, #3 - 8003c46: ea43 7354 orr.w r3, r3, r4, lsr #29 - 8003c4a: 00e2 lsls r2, r4, #3 - 8003c4c: 4614 mov r4, r2 - 8003c4e: 461d mov r5, r3 - 8003c50: 4643 mov r3, r8 - 8003c52: 18e3 adds r3, r4, r3 - 8003c54: f8c7 3098 str.w r3, [r7, #152] ; 0x98 - 8003c58: 464b mov r3, r9 - 8003c5a: eb45 0303 adc.w r3, r5, r3 - 8003c5e: f8c7 309c str.w r3, [r7, #156] ; 0x9c - 8003c62: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003c66: 685b ldr r3, [r3, #4] - 8003c68: 2200 movs r2, #0 - 8003c6a: f8c7 3090 str.w r3, [r7, #144] ; 0x90 - 8003c6e: f8c7 2094 str.w r2, [r7, #148] ; 0x94 - 8003c72: f04f 0200 mov.w r2, #0 - 8003c76: f04f 0300 mov.w r3, #0 - 8003c7a: e9d7 4524 ldrd r4, r5, [r7, #144] ; 0x90 - 8003c7e: 4629 mov r1, r5 - 8003c80: 008b lsls r3, r1, #2 - 8003c82: 4621 mov r1, r4 - 8003c84: ea43 7391 orr.w r3, r3, r1, lsr #30 - 8003c88: 4621 mov r1, r4 - 8003c8a: 008a lsls r2, r1, #2 - 8003c8c: e9d7 0126 ldrd r0, r1, [r7, #152] ; 0x98 - 8003c90: f7fc fab4 bl 80001fc <__aeabi_uldivmod> - 8003c94: 4602 mov r2, r0 - 8003c96: 460b mov r3, r1 - 8003c98: 4b60 ldr r3, [pc, #384] ; (8003e1c ) - 8003c9a: fba3 2302 umull r2, r3, r3, r2 - 8003c9e: 095b lsrs r3, r3, #5 - 8003ca0: 011c lsls r4, r3, #4 - 8003ca2: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8003ca6: 2200 movs r2, #0 - 8003ca8: f8c7 3088 str.w r3, [r7, #136] ; 0x88 - 8003cac: f8c7 208c str.w r2, [r7, #140] ; 0x8c - 8003cb0: e9d7 8922 ldrd r8, r9, [r7, #136] ; 0x88 - 8003cb4: 4642 mov r2, r8 - 8003cb6: 464b mov r3, r9 - 8003cb8: 1891 adds r1, r2, r2 - 8003cba: 61b9 str r1, [r7, #24] - 8003cbc: 415b adcs r3, r3 - 8003cbe: 61fb str r3, [r7, #28] - 8003cc0: e9d7 2306 ldrd r2, r3, [r7, #24] - 8003cc4: 4641 mov r1, r8 - 8003cc6: 1851 adds r1, r2, r1 - 8003cc8: 6139 str r1, [r7, #16] - 8003cca: 4649 mov r1, r9 - 8003ccc: 414b adcs r3, r1 - 8003cce: 617b str r3, [r7, #20] - 8003cd0: f04f 0200 mov.w r2, #0 - 8003cd4: f04f 0300 mov.w r3, #0 - 8003cd8: e9d7 ab04 ldrd sl, fp, [r7, #16] - 8003cdc: 4659 mov r1, fp - 8003cde: 00cb lsls r3, r1, #3 - 8003ce0: 4651 mov r1, sl - 8003ce2: ea43 7351 orr.w r3, r3, r1, lsr #29 - 8003ce6: 4651 mov r1, sl - 8003ce8: 00ca lsls r2, r1, #3 - 8003cea: 4610 mov r0, r2 - 8003cec: 4619 mov r1, r3 - 8003cee: 4603 mov r3, r0 - 8003cf0: 4642 mov r2, r8 - 8003cf2: 189b adds r3, r3, r2 - 8003cf4: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 8003cf8: 464b mov r3, r9 - 8003cfa: 460a mov r2, r1 - 8003cfc: eb42 0303 adc.w r3, r2, r3 - 8003d00: f8c7 3084 str.w r3, [r7, #132] ; 0x84 - 8003d04: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003d08: 685b ldr r3, [r3, #4] - 8003d0a: 2200 movs r2, #0 - 8003d0c: 67bb str r3, [r7, #120] ; 0x78 - 8003d0e: 67fa str r2, [r7, #124] ; 0x7c - 8003d10: f04f 0200 mov.w r2, #0 - 8003d14: f04f 0300 mov.w r3, #0 - 8003d18: e9d7 891e ldrd r8, r9, [r7, #120] ; 0x78 - 8003d1c: 4649 mov r1, r9 - 8003d1e: 008b lsls r3, r1, #2 - 8003d20: 4641 mov r1, r8 - 8003d22: ea43 7391 orr.w r3, r3, r1, lsr #30 - 8003d26: 4641 mov r1, r8 - 8003d28: 008a lsls r2, r1, #2 - 8003d2a: e9d7 0120 ldrd r0, r1, [r7, #128] ; 0x80 - 8003d2e: f7fc fa65 bl 80001fc <__aeabi_uldivmod> - 8003d32: 4602 mov r2, r0 - 8003d34: 460b mov r3, r1 - 8003d36: 4611 mov r1, r2 - 8003d38: 4b38 ldr r3, [pc, #224] ; (8003e1c ) - 8003d3a: fba3 2301 umull r2, r3, r3, r1 - 8003d3e: 095b lsrs r3, r3, #5 - 8003d40: 2264 movs r2, #100 ; 0x64 - 8003d42: fb02 f303 mul.w r3, r2, r3 - 8003d46: 1acb subs r3, r1, r3 - 8003d48: 011b lsls r3, r3, #4 - 8003d4a: 3332 adds r3, #50 ; 0x32 - 8003d4c: 4a33 ldr r2, [pc, #204] ; (8003e1c ) - 8003d4e: fba2 2303 umull r2, r3, r2, r3 - 8003d52: 095b lsrs r3, r3, #5 - 8003d54: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 8003d58: 441c add r4, r3 - 8003d5a: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8003d5e: 2200 movs r2, #0 - 8003d60: 673b str r3, [r7, #112] ; 0x70 - 8003d62: 677a str r2, [r7, #116] ; 0x74 - 8003d64: e9d7 891c ldrd r8, r9, [r7, #112] ; 0x70 - 8003d68: 4642 mov r2, r8 - 8003d6a: 464b mov r3, r9 - 8003d6c: 1891 adds r1, r2, r2 - 8003d6e: 60b9 str r1, [r7, #8] - 8003d70: 415b adcs r3, r3 - 8003d72: 60fb str r3, [r7, #12] - 8003d74: e9d7 2302 ldrd r2, r3, [r7, #8] - 8003d78: 4641 mov r1, r8 - 8003d7a: 1851 adds r1, r2, r1 - 8003d7c: 6039 str r1, [r7, #0] - 8003d7e: 4649 mov r1, r9 - 8003d80: 414b adcs r3, r1 - 8003d82: 607b str r3, [r7, #4] - 8003d84: f04f 0200 mov.w r2, #0 - 8003d88: f04f 0300 mov.w r3, #0 - 8003d8c: e9d7 ab00 ldrd sl, fp, [r7] - 8003d90: 4659 mov r1, fp - 8003d92: 00cb lsls r3, r1, #3 - 8003d94: 4651 mov r1, sl - 8003d96: ea43 7351 orr.w r3, r3, r1, lsr #29 - 8003d9a: 4651 mov r1, sl - 8003d9c: 00ca lsls r2, r1, #3 - 8003d9e: 4610 mov r0, r2 - 8003da0: 4619 mov r1, r3 - 8003da2: 4603 mov r3, r0 - 8003da4: 4642 mov r2, r8 - 8003da6: 189b adds r3, r3, r2 - 8003da8: 66bb str r3, [r7, #104] ; 0x68 - 8003daa: 464b mov r3, r9 - 8003dac: 460a mov r2, r1 - 8003dae: eb42 0303 adc.w r3, r2, r3 - 8003db2: 66fb str r3, [r7, #108] ; 0x6c - 8003db4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003db8: 685b ldr r3, [r3, #4] - 8003dba: 2200 movs r2, #0 - 8003dbc: 663b str r3, [r7, #96] ; 0x60 - 8003dbe: 667a str r2, [r7, #100] ; 0x64 - 8003dc0: f04f 0200 mov.w r2, #0 - 8003dc4: f04f 0300 mov.w r3, #0 - 8003dc8: e9d7 8918 ldrd r8, r9, [r7, #96] ; 0x60 - 8003dcc: 4649 mov r1, r9 - 8003dce: 008b lsls r3, r1, #2 - 8003dd0: 4641 mov r1, r8 - 8003dd2: ea43 7391 orr.w r3, r3, r1, lsr #30 - 8003dd6: 4641 mov r1, r8 - 8003dd8: 008a lsls r2, r1, #2 - 8003dda: e9d7 011a ldrd r0, r1, [r7, #104] ; 0x68 - 8003dde: f7fc fa0d bl 80001fc <__aeabi_uldivmod> - 8003de2: 4602 mov r2, r0 - 8003de4: 460b mov r3, r1 - 8003de6: 4b0d ldr r3, [pc, #52] ; (8003e1c ) - 8003de8: fba3 1302 umull r1, r3, r3, r2 - 8003dec: 095b lsrs r3, r3, #5 - 8003dee: 2164 movs r1, #100 ; 0x64 - 8003df0: fb01 f303 mul.w r3, r1, r3 - 8003df4: 1ad3 subs r3, r2, r3 - 8003df6: 011b lsls r3, r3, #4 - 8003df8: 3332 adds r3, #50 ; 0x32 - 8003dfa: 4a08 ldr r2, [pc, #32] ; (8003e1c ) - 8003dfc: fba2 2303 umull r2, r3, r2, r3 - 8003e00: 095b lsrs r3, r3, #5 - 8003e02: f003 020f and.w r2, r3, #15 - 8003e06: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8003e0a: 681b ldr r3, [r3, #0] - 8003e0c: 4422 add r2, r4 - 8003e0e: 609a str r2, [r3, #8] + 8003310: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8003314: 2200 movs r2, #0 + 8003316: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 + 800331a: f8c7 20a4 str.w r2, [r7, #164] ; 0xa4 + 800331e: e9d7 8928 ldrd r8, r9, [r7, #160] ; 0xa0 + 8003322: 4642 mov r2, r8 + 8003324: 464b mov r3, r9 + 8003326: 1891 adds r1, r2, r2 + 8003328: 6239 str r1, [r7, #32] + 800332a: 415b adcs r3, r3 + 800332c: 627b str r3, [r7, #36] ; 0x24 + 800332e: e9d7 2308 ldrd r2, r3, [r7, #32] + 8003332: 4641 mov r1, r8 + 8003334: 1854 adds r4, r2, r1 + 8003336: 4649 mov r1, r9 + 8003338: eb43 0501 adc.w r5, r3, r1 + 800333c: f04f 0200 mov.w r2, #0 + 8003340: f04f 0300 mov.w r3, #0 + 8003344: 00eb lsls r3, r5, #3 + 8003346: ea43 7354 orr.w r3, r3, r4, lsr #29 + 800334a: 00e2 lsls r2, r4, #3 + 800334c: 4614 mov r4, r2 + 800334e: 461d mov r5, r3 + 8003350: 4643 mov r3, r8 + 8003352: 18e3 adds r3, r4, r3 + 8003354: f8c7 3098 str.w r3, [r7, #152] ; 0x98 + 8003358: 464b mov r3, r9 + 800335a: eb45 0303 adc.w r3, r5, r3 + 800335e: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 8003362: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003366: 685b ldr r3, [r3, #4] + 8003368: 2200 movs r2, #0 + 800336a: f8c7 3090 str.w r3, [r7, #144] ; 0x90 + 800336e: f8c7 2094 str.w r2, [r7, #148] ; 0x94 + 8003372: f04f 0200 mov.w r2, #0 + 8003376: f04f 0300 mov.w r3, #0 + 800337a: e9d7 4524 ldrd r4, r5, [r7, #144] ; 0x90 + 800337e: 4629 mov r1, r5 + 8003380: 008b lsls r3, r1, #2 + 8003382: 4621 mov r1, r4 + 8003384: ea43 7391 orr.w r3, r3, r1, lsr #30 + 8003388: 4621 mov r1, r4 + 800338a: 008a lsls r2, r1, #2 + 800338c: e9d7 0126 ldrd r0, r1, [r7, #152] ; 0x98 + 8003390: f7fc ff34 bl 80001fc <__aeabi_uldivmod> + 8003394: 4602 mov r2, r0 + 8003396: 460b mov r3, r1 + 8003398: 4b60 ldr r3, [pc, #384] ; (800351c ) + 800339a: fba3 2302 umull r2, r3, r3, r2 + 800339e: 095b lsrs r3, r3, #5 + 80033a0: 011c lsls r4, r3, #4 + 80033a2: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 80033a6: 2200 movs r2, #0 + 80033a8: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 80033ac: f8c7 208c str.w r2, [r7, #140] ; 0x8c + 80033b0: e9d7 8922 ldrd r8, r9, [r7, #136] ; 0x88 + 80033b4: 4642 mov r2, r8 + 80033b6: 464b mov r3, r9 + 80033b8: 1891 adds r1, r2, r2 + 80033ba: 61b9 str r1, [r7, #24] + 80033bc: 415b adcs r3, r3 + 80033be: 61fb str r3, [r7, #28] + 80033c0: e9d7 2306 ldrd r2, r3, [r7, #24] + 80033c4: 4641 mov r1, r8 + 80033c6: 1851 adds r1, r2, r1 + 80033c8: 6139 str r1, [r7, #16] + 80033ca: 4649 mov r1, r9 + 80033cc: 414b adcs r3, r1 + 80033ce: 617b str r3, [r7, #20] + 80033d0: f04f 0200 mov.w r2, #0 + 80033d4: f04f 0300 mov.w r3, #0 + 80033d8: e9d7 ab04 ldrd sl, fp, [r7, #16] + 80033dc: 4659 mov r1, fp + 80033de: 00cb lsls r3, r1, #3 + 80033e0: 4651 mov r1, sl + 80033e2: ea43 7351 orr.w r3, r3, r1, lsr #29 + 80033e6: 4651 mov r1, sl + 80033e8: 00ca lsls r2, r1, #3 + 80033ea: 4610 mov r0, r2 + 80033ec: 4619 mov r1, r3 + 80033ee: 4603 mov r3, r0 + 80033f0: 4642 mov r2, r8 + 80033f2: 189b adds r3, r3, r2 + 80033f4: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 80033f8: 464b mov r3, r9 + 80033fa: 460a mov r2, r1 + 80033fc: eb42 0303 adc.w r3, r2, r3 + 8003400: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 8003404: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8003408: 685b ldr r3, [r3, #4] + 800340a: 2200 movs r2, #0 + 800340c: 67bb str r3, [r7, #120] ; 0x78 + 800340e: 67fa str r2, [r7, #124] ; 0x7c + 8003410: f04f 0200 mov.w r2, #0 + 8003414: f04f 0300 mov.w r3, #0 + 8003418: e9d7 891e ldrd r8, r9, [r7, #120] ; 0x78 + 800341c: 4649 mov r1, r9 + 800341e: 008b lsls r3, r1, #2 + 8003420: 4641 mov r1, r8 + 8003422: ea43 7391 orr.w r3, r3, r1, lsr #30 + 8003426: 4641 mov r1, r8 + 8003428: 008a lsls r2, r1, #2 + 800342a: e9d7 0120 ldrd r0, r1, [r7, #128] ; 0x80 + 800342e: f7fc fee5 bl 80001fc <__aeabi_uldivmod> + 8003432: 4602 mov r2, r0 + 8003434: 460b mov r3, r1 + 8003436: 4611 mov r1, r2 + 8003438: 4b38 ldr r3, [pc, #224] ; (800351c ) + 800343a: fba3 2301 umull r2, r3, r3, r1 + 800343e: 095b lsrs r3, r3, #5 + 8003440: 2264 movs r2, #100 ; 0x64 + 8003442: fb02 f303 mul.w r3, r2, r3 + 8003446: 1acb subs r3, r1, r3 + 8003448: 011b lsls r3, r3, #4 + 800344a: 3332 adds r3, #50 ; 0x32 + 800344c: 4a33 ldr r2, [pc, #204] ; (800351c ) + 800344e: fba2 2303 umull r2, r3, r2, r3 + 8003452: 095b lsrs r3, r3, #5 + 8003454: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 8003458: 441c add r4, r3 + 800345a: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 800345e: 2200 movs r2, #0 + 8003460: 673b str r3, [r7, #112] ; 0x70 + 8003462: 677a str r2, [r7, #116] ; 0x74 + 8003464: e9d7 891c ldrd r8, r9, [r7, #112] ; 0x70 + 8003468: 4642 mov r2, r8 + 800346a: 464b mov r3, r9 + 800346c: 1891 adds r1, r2, r2 + 800346e: 60b9 str r1, [r7, #8] + 8003470: 415b adcs r3, r3 + 8003472: 60fb str r3, [r7, #12] + 8003474: e9d7 2302 ldrd r2, r3, [r7, #8] + 8003478: 4641 mov r1, r8 + 800347a: 1851 adds r1, r2, r1 + 800347c: 6039 str r1, [r7, #0] + 800347e: 4649 mov r1, r9 + 8003480: 414b adcs r3, r1 + 8003482: 607b str r3, [r7, #4] + 8003484: f04f 0200 mov.w r2, #0 + 8003488: f04f 0300 mov.w r3, #0 + 800348c: e9d7 ab00 ldrd sl, fp, [r7] + 8003490: 4659 mov r1, fp + 8003492: 00cb lsls r3, r1, #3 + 8003494: 4651 mov r1, sl + 8003496: ea43 7351 orr.w r3, r3, r1, lsr #29 + 800349a: 4651 mov r1, sl + 800349c: 00ca lsls r2, r1, #3 + 800349e: 4610 mov r0, r2 + 80034a0: 4619 mov r1, r3 + 80034a2: 4603 mov r3, r0 + 80034a4: 4642 mov r2, r8 + 80034a6: 189b adds r3, r3, r2 + 80034a8: 66bb str r3, [r7, #104] ; 0x68 + 80034aa: 464b mov r3, r9 + 80034ac: 460a mov r2, r1 + 80034ae: eb42 0303 adc.w r3, r2, r3 + 80034b2: 66fb str r3, [r7, #108] ; 0x6c + 80034b4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 80034b8: 685b ldr r3, [r3, #4] + 80034ba: 2200 movs r2, #0 + 80034bc: 663b str r3, [r7, #96] ; 0x60 + 80034be: 667a str r2, [r7, #100] ; 0x64 + 80034c0: f04f 0200 mov.w r2, #0 + 80034c4: f04f 0300 mov.w r3, #0 + 80034c8: e9d7 8918 ldrd r8, r9, [r7, #96] ; 0x60 + 80034cc: 4649 mov r1, r9 + 80034ce: 008b lsls r3, r1, #2 + 80034d0: 4641 mov r1, r8 + 80034d2: ea43 7391 orr.w r3, r3, r1, lsr #30 + 80034d6: 4641 mov r1, r8 + 80034d8: 008a lsls r2, r1, #2 + 80034da: e9d7 011a ldrd r0, r1, [r7, #104] ; 0x68 + 80034de: f7fc fe8d bl 80001fc <__aeabi_uldivmod> + 80034e2: 4602 mov r2, r0 + 80034e4: 460b mov r3, r1 + 80034e6: 4b0d ldr r3, [pc, #52] ; (800351c ) + 80034e8: fba3 1302 umull r1, r3, r3, r2 + 80034ec: 095b lsrs r3, r3, #5 + 80034ee: 2164 movs r1, #100 ; 0x64 + 80034f0: fb01 f303 mul.w r3, r1, r3 + 80034f4: 1ad3 subs r3, r2, r3 + 80034f6: 011b lsls r3, r3, #4 + 80034f8: 3332 adds r3, #50 ; 0x32 + 80034fa: 4a08 ldr r2, [pc, #32] ; (800351c ) + 80034fc: fba2 2303 umull r2, r3, r2, r3 + 8003500: 095b lsrs r3, r3, #5 + 8003502: f003 020f and.w r2, r3, #15 + 8003506: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 800350a: 681b ldr r3, [r3, #0] + 800350c: 4422 add r2, r4 + 800350e: 609a str r2, [r3, #8] } - 8003e10: bf00 nop - 8003e12: f507 7780 add.w r7, r7, #256 ; 0x100 - 8003e16: 46bd mov sp, r7 - 8003e18: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 8003e1c: 51eb851f .word 0x51eb851f + 8003510: bf00 nop + 8003512: f507 7780 add.w r7, r7, #256 ; 0x100 + 8003516: 46bd mov sp, r7 + 8003518: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 800351c: 51eb851f .word 0x51eb851f -08003e20 : +08003520 : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { - 8003e20: b084 sub sp, #16 - 8003e22: b580 push {r7, lr} - 8003e24: b084 sub sp, #16 - 8003e26: af00 add r7, sp, #0 - 8003e28: 6078 str r0, [r7, #4] - 8003e2a: f107 001c add.w r0, r7, #28 - 8003e2e: e880 000e stmia.w r0, {r1, r2, r3} + 8003520: b084 sub sp, #16 + 8003522: b580 push {r7, lr} + 8003524: b084 sub sp, #16 + 8003526: af00 add r7, sp, #0 + 8003528: 6078 str r0, [r7, #4] + 800352a: f107 001c add.w r0, r7, #28 + 800352e: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret; if (cfg.phy_itface == USB_OTG_ULPI_PHY) - 8003e32: f897 3021 ldrb.w r3, [r7, #33] ; 0x21 - 8003e36: 2b01 cmp r3, #1 - 8003e38: d123 bne.n 8003e82 + 8003532: f897 3021 ldrb.w r3, [r7, #33] ; 0x21 + 8003536: 2b01 cmp r3, #1 + 8003538: d123 bne.n 8003582 { USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN); - 8003e3a: 687b ldr r3, [r7, #4] - 8003e3c: 6b9b ldr r3, [r3, #56] ; 0x38 - 8003e3e: f423 3280 bic.w r2, r3, #65536 ; 0x10000 - 8003e42: 687b ldr r3, [r7, #4] - 8003e44: 639a str r2, [r3, #56] ; 0x38 + 800353a: 687b ldr r3, [r7, #4] + 800353c: 6b9b ldr r3, [r3, #56] ; 0x38 + 800353e: f423 3280 bic.w r2, r3, #65536 ; 0x10000 + 8003542: 687b ldr r3, [r7, #4] + 8003544: 639a str r2, [r3, #56] ; 0x38 /* Init The ULPI Interface */ USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL); - 8003e46: 687b ldr r3, [r7, #4] - 8003e48: 68db ldr r3, [r3, #12] - 8003e4a: f423 0384 bic.w r3, r3, #4325376 ; 0x420000 - 8003e4e: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8003e52: 687a ldr r2, [r7, #4] - 8003e54: 60d3 str r3, [r2, #12] + 8003546: 687b ldr r3, [r7, #4] + 8003548: 68db ldr r3, [r3, #12] + 800354a: f423 0384 bic.w r3, r3, #4325376 ; 0x420000 + 800354e: f023 0340 bic.w r3, r3, #64 ; 0x40 + 8003552: 687a ldr r2, [r7, #4] + 8003554: 60d3 str r3, [r2, #12] /* Select vbus source */ USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI); - 8003e56: 687b ldr r3, [r7, #4] - 8003e58: 68db ldr r3, [r3, #12] - 8003e5a: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 8003e5e: 687b ldr r3, [r7, #4] - 8003e60: 60da str r2, [r3, #12] + 8003556: 687b ldr r3, [r7, #4] + 8003558: 68db ldr r3, [r3, #12] + 800355a: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 + 800355e: 687b ldr r3, [r7, #4] + 8003560: 60da str r2, [r3, #12] if (cfg.use_external_vbus == 1U) - 8003e62: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 - 8003e66: 2b01 cmp r3, #1 - 8003e68: d105 bne.n 8003e76 + 8003562: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 + 8003566: 2b01 cmp r3, #1 + 8003568: d105 bne.n 8003576 { USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD; - 8003e6a: 687b ldr r3, [r7, #4] - 8003e6c: 68db ldr r3, [r3, #12] - 8003e6e: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 - 8003e72: 687b ldr r3, [r7, #4] - 8003e74: 60da str r2, [r3, #12] + 800356a: 687b ldr r3, [r7, #4] + 800356c: 68db ldr r3, [r3, #12] + 800356e: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 + 8003572: 687b ldr r3, [r7, #4] + 8003574: 60da str r2, [r3, #12] } /* Reset after a PHY select */ ret = USB_CoreReset(USBx); - 8003e76: 6878 ldr r0, [r7, #4] - 8003e78: f000 faa0 bl 80043bc - 8003e7c: 4603 mov r3, r0 - 8003e7e: 73fb strb r3, [r7, #15] - 8003e80: e01b b.n 8003eba + 8003576: 6878 ldr r0, [r7, #4] + 8003578: f000 faa0 bl 8003abc + 800357c: 4603 mov r3, r0 + 800357e: 73fb strb r3, [r7, #15] + 8003580: e01b b.n 80035ba } else /* FS interface (embedded Phy) */ { /* Select FS Embedded PHY */ USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; - 8003e82: 687b ldr r3, [r7, #4] - 8003e84: 68db ldr r3, [r3, #12] - 8003e86: f043 0240 orr.w r2, r3, #64 ; 0x40 - 8003e8a: 687b ldr r3, [r7, #4] - 8003e8c: 60da str r2, [r3, #12] + 8003582: 687b ldr r3, [r7, #4] + 8003584: 68db ldr r3, [r3, #12] + 8003586: f043 0240 orr.w r2, r3, #64 ; 0x40 + 800358a: 687b ldr r3, [r7, #4] + 800358c: 60da str r2, [r3, #12] /* Reset after a PHY select */ ret = USB_CoreReset(USBx); - 8003e8e: 6878 ldr r0, [r7, #4] - 8003e90: f000 fa94 bl 80043bc - 8003e94: 4603 mov r3, r0 - 8003e96: 73fb strb r3, [r7, #15] + 800358e: 6878 ldr r0, [r7, #4] + 8003590: f000 fa94 bl 8003abc + 8003594: 4603 mov r3, r0 + 8003596: 73fb strb r3, [r7, #15] if (cfg.battery_charging_enable == 0U) - 8003e98: f897 3025 ldrb.w r3, [r7, #37] ; 0x25 - 8003e9c: 2b00 cmp r3, #0 - 8003e9e: d106 bne.n 8003eae + 8003598: f897 3025 ldrb.w r3, [r7, #37] ; 0x25 + 800359c: 2b00 cmp r3, #0 + 800359e: d106 bne.n 80035ae { /* Activate the USB Transceiver */ USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN; - 8003ea0: 687b ldr r3, [r7, #4] - 8003ea2: 6b9b ldr r3, [r3, #56] ; 0x38 - 8003ea4: f443 3280 orr.w r2, r3, #65536 ; 0x10000 - 8003ea8: 687b ldr r3, [r7, #4] - 8003eaa: 639a str r2, [r3, #56] ; 0x38 - 8003eac: e005 b.n 8003eba + 80035a0: 687b ldr r3, [r7, #4] + 80035a2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80035a4: f443 3280 orr.w r2, r3, #65536 ; 0x10000 + 80035a8: 687b ldr r3, [r7, #4] + 80035aa: 639a str r2, [r3, #56] ; 0x38 + 80035ac: e005 b.n 80035ba } else { /* Deactivate the USB Transceiver */ USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN); - 8003eae: 687b ldr r3, [r7, #4] - 8003eb0: 6b9b ldr r3, [r3, #56] ; 0x38 - 8003eb2: f423 3280 bic.w r2, r3, #65536 ; 0x10000 - 8003eb6: 687b ldr r3, [r7, #4] - 8003eb8: 639a str r2, [r3, #56] ; 0x38 + 80035ae: 687b ldr r3, [r7, #4] + 80035b0: 6b9b ldr r3, [r3, #56] ; 0x38 + 80035b2: f423 3280 bic.w r2, r3, #65536 ; 0x10000 + 80035b6: 687b ldr r3, [r7, #4] + 80035b8: 639a str r2, [r3, #56] ; 0x38 } } if (cfg.dma_enable == 1U) - 8003eba: 7fbb ldrb r3, [r7, #30] - 8003ebc: 2b01 cmp r3, #1 - 8003ebe: d10b bne.n 8003ed8 + 80035ba: 7fbb ldrb r3, [r7, #30] + 80035bc: 2b01 cmp r3, #1 + 80035be: d10b bne.n 80035d8 { USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2; - 8003ec0: 687b ldr r3, [r7, #4] - 8003ec2: 689b ldr r3, [r3, #8] - 8003ec4: f043 0206 orr.w r2, r3, #6 - 8003ec8: 687b ldr r3, [r7, #4] - 8003eca: 609a str r2, [r3, #8] + 80035c0: 687b ldr r3, [r7, #4] + 80035c2: 689b ldr r3, [r3, #8] + 80035c4: f043 0206 orr.w r2, r3, #6 + 80035c8: 687b ldr r3, [r7, #4] + 80035ca: 609a str r2, [r3, #8] USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN; - 8003ecc: 687b ldr r3, [r7, #4] - 8003ece: 689b ldr r3, [r3, #8] - 8003ed0: f043 0220 orr.w r2, r3, #32 - 8003ed4: 687b ldr r3, [r7, #4] - 8003ed6: 609a str r2, [r3, #8] + 80035cc: 687b ldr r3, [r7, #4] + 80035ce: 689b ldr r3, [r3, #8] + 80035d0: f043 0220 orr.w r2, r3, #32 + 80035d4: 687b ldr r3, [r7, #4] + 80035d6: 609a str r2, [r3, #8] } return ret; - 8003ed8: 7bfb ldrb r3, [r7, #15] + 80035d8: 7bfb ldrb r3, [r7, #15] } - 8003eda: 4618 mov r0, r3 - 8003edc: 3710 adds r7, #16 - 8003ede: 46bd mov sp, r7 - 8003ee0: e8bd 4080 ldmia.w sp!, {r7, lr} - 8003ee4: b004 add sp, #16 - 8003ee6: 4770 bx lr + 80035da: 4618 mov r0, r3 + 80035dc: 3710 adds r7, #16 + 80035de: 46bd mov sp, r7 + 80035e0: e8bd 4080 ldmia.w sp!, {r7, lr} + 80035e4: b004 add sp, #16 + 80035e6: 4770 bx lr -08003ee8 : +080035e8 : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx) { - 8003ee8: b480 push {r7} - 8003eea: b083 sub sp, #12 - 8003eec: af00 add r7, sp, #0 - 8003eee: 6078 str r0, [r7, #4] + 80035e8: b480 push {r7} + 80035ea: b083 sub sp, #12 + 80035ec: af00 add r7, sp, #0 + 80035ee: 6078 str r0, [r7, #4] USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT; - 8003ef0: 687b ldr r3, [r7, #4] - 8003ef2: 689b ldr r3, [r3, #8] - 8003ef4: f023 0201 bic.w r2, r3, #1 - 8003ef8: 687b ldr r3, [r7, #4] - 8003efa: 609a str r2, [r3, #8] + 80035f0: 687b ldr r3, [r7, #4] + 80035f2: 689b ldr r3, [r3, #8] + 80035f4: f023 0201 bic.w r2, r3, #1 + 80035f8: 687b ldr r3, [r7, #4] + 80035fa: 609a str r2, [r3, #8] return HAL_OK; - 8003efc: 2300 movs r3, #0 + 80035fc: 2300 movs r3, #0 } - 8003efe: 4618 mov r0, r3 - 8003f00: 370c adds r7, #12 - 8003f02: 46bd mov sp, r7 - 8003f04: f85d 7b04 ldr.w r7, [sp], #4 - 8003f08: 4770 bx lr + 80035fe: 4618 mov r0, r3 + 8003600: 370c adds r7, #12 + 8003602: 46bd mov sp, r7 + 8003604: f85d 7b04 ldr.w r7, [sp], #4 + 8003608: 4770 bx lr -08003f0a : +0800360a : * @arg USB_DEVICE_MODE Peripheral mode * @arg USB_HOST_MODE Host mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode) { - 8003f0a: b580 push {r7, lr} - 8003f0c: b084 sub sp, #16 - 8003f0e: af00 add r7, sp, #0 - 8003f10: 6078 str r0, [r7, #4] - 8003f12: 460b mov r3, r1 - 8003f14: 70fb strb r3, [r7, #3] + 800360a: b580 push {r7, lr} + 800360c: b084 sub sp, #16 + 800360e: af00 add r7, sp, #0 + 8003610: 6078 str r0, [r7, #4] + 8003612: 460b mov r3, r1 + 8003614: 70fb strb r3, [r7, #3] uint32_t ms = 0U; - 8003f16: 2300 movs r3, #0 - 8003f18: 60fb str r3, [r7, #12] + 8003616: 2300 movs r3, #0 + 8003618: 60fb str r3, [r7, #12] USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD); - 8003f1a: 687b ldr r3, [r7, #4] - 8003f1c: 68db ldr r3, [r3, #12] - 8003f1e: f023 42c0 bic.w r2, r3, #1610612736 ; 0x60000000 - 8003f22: 687b ldr r3, [r7, #4] - 8003f24: 60da str r2, [r3, #12] + 800361a: 687b ldr r3, [r7, #4] + 800361c: 68db ldr r3, [r3, #12] + 800361e: f023 42c0 bic.w r2, r3, #1610612736 ; 0x60000000 + 8003622: 687b ldr r3, [r7, #4] + 8003624: 60da str r2, [r3, #12] if (mode == USB_HOST_MODE) - 8003f26: 78fb ldrb r3, [r7, #3] - 8003f28: 2b01 cmp r3, #1 - 8003f2a: d115 bne.n 8003f58 + 8003626: 78fb ldrb r3, [r7, #3] + 8003628: 2b01 cmp r3, #1 + 800362a: d115 bne.n 8003658 { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD; - 8003f2c: 687b ldr r3, [r7, #4] - 8003f2e: 68db ldr r3, [r3, #12] - 8003f30: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000 - 8003f34: 687b ldr r3, [r7, #4] - 8003f36: 60da str r2, [r3, #12] + 800362c: 687b ldr r3, [r7, #4] + 800362e: 68db ldr r3, [r3, #12] + 8003630: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000 + 8003634: 687b ldr r3, [r7, #4] + 8003636: 60da str r2, [r3, #12] do { HAL_Delay(10U); - 8003f38: 200a movs r0, #10 - 8003f3a: f7fd fa05 bl 8001348 + 8003638: 200a movs r0, #10 + 800363a: f7fd fec5 bl 80013c8 ms += 10U; - 8003f3e: 68fb ldr r3, [r7, #12] - 8003f40: 330a adds r3, #10 - 8003f42: 60fb str r3, [r7, #12] + 800363e: 68fb ldr r3, [r7, #12] + 8003640: 330a adds r3, #10 + 8003642: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); - 8003f44: 6878 ldr r0, [r7, #4] - 8003f46: f000 fa2b bl 80043a0 - 8003f4a: 4603 mov r3, r0 - 8003f4c: 2b01 cmp r3, #1 - 8003f4e: d01e beq.n 8003f8e - 8003f50: 68fb ldr r3, [r7, #12] - 8003f52: 2bc7 cmp r3, #199 ; 0xc7 - 8003f54: d9f0 bls.n 8003f38 - 8003f56: e01a b.n 8003f8e + 8003644: 6878 ldr r0, [r7, #4] + 8003646: f000 fa2b bl 8003aa0 + 800364a: 4603 mov r3, r0 + 800364c: 2b01 cmp r3, #1 + 800364e: d01e beq.n 800368e + 8003650: 68fb ldr r3, [r7, #12] + 8003652: 2bc7 cmp r3, #199 ; 0xc7 + 8003654: d9f0 bls.n 8003638 + 8003656: e01a b.n 800368e } else if (mode == USB_DEVICE_MODE) - 8003f58: 78fb ldrb r3, [r7, #3] - 8003f5a: 2b00 cmp r3, #0 - 8003f5c: d115 bne.n 8003f8a + 8003658: 78fb ldrb r3, [r7, #3] + 800365a: 2b00 cmp r3, #0 + 800365c: d115 bne.n 800368a { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; - 8003f5e: 687b ldr r3, [r7, #4] - 8003f60: 68db ldr r3, [r3, #12] - 8003f62: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000 - 8003f66: 687b ldr r3, [r7, #4] - 8003f68: 60da str r2, [r3, #12] + 800365e: 687b ldr r3, [r7, #4] + 8003660: 68db ldr r3, [r3, #12] + 8003662: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000 + 8003666: 687b ldr r3, [r7, #4] + 8003668: 60da str r2, [r3, #12] do { HAL_Delay(10U); - 8003f6a: 200a movs r0, #10 - 8003f6c: f7fd f9ec bl 8001348 + 800366a: 200a movs r0, #10 + 800366c: f7fd feac bl 80013c8 ms += 10U; - 8003f70: 68fb ldr r3, [r7, #12] - 8003f72: 330a adds r3, #10 - 8003f74: 60fb str r3, [r7, #12] + 8003670: 68fb ldr r3, [r7, #12] + 8003672: 330a adds r3, #10 + 8003674: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); - 8003f76: 6878 ldr r0, [r7, #4] - 8003f78: f000 fa12 bl 80043a0 - 8003f7c: 4603 mov r3, r0 - 8003f7e: 2b00 cmp r3, #0 - 8003f80: d005 beq.n 8003f8e - 8003f82: 68fb ldr r3, [r7, #12] - 8003f84: 2bc7 cmp r3, #199 ; 0xc7 - 8003f86: d9f0 bls.n 8003f6a - 8003f88: e001 b.n 8003f8e + 8003676: 6878 ldr r0, [r7, #4] + 8003678: f000 fa12 bl 8003aa0 + 800367c: 4603 mov r3, r0 + 800367e: 2b00 cmp r3, #0 + 8003680: d005 beq.n 800368e + 8003682: 68fb ldr r3, [r7, #12] + 8003684: 2bc7 cmp r3, #199 ; 0xc7 + 8003686: d9f0 bls.n 800366a + 8003688: e001 b.n 800368e } else { return HAL_ERROR; - 8003f8a: 2301 movs r3, #1 - 8003f8c: e005 b.n 8003f9a + 800368a: 2301 movs r3, #1 + 800368c: e005 b.n 800369a } if (ms == HAL_USB_CURRENT_MODE_MAX_DELAY_MS) - 8003f8e: 68fb ldr r3, [r7, #12] - 8003f90: 2bc8 cmp r3, #200 ; 0xc8 - 8003f92: d101 bne.n 8003f98 + 800368e: 68fb ldr r3, [r7, #12] + 8003690: 2bc8 cmp r3, #200 ; 0xc8 + 8003692: d101 bne.n 8003698 { return HAL_ERROR; - 8003f94: 2301 movs r3, #1 - 8003f96: e000 b.n 8003f9a + 8003694: 2301 movs r3, #1 + 8003696: e000 b.n 800369a } return HAL_OK; - 8003f98: 2300 movs r3, #0 + 8003698: 2300 movs r3, #0 } - 8003f9a: 4618 mov r0, r3 - 8003f9c: 3710 adds r7, #16 - 8003f9e: 46bd mov sp, r7 - 8003fa0: bd80 pop {r7, pc} + 800369a: 4618 mov r0, r3 + 800369c: 3710 adds r7, #16 + 800369e: 46bd mov sp, r7 + 80036a0: bd80 pop {r7, pc} ... -08003fa4 : +080036a4 : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { - 8003fa4: b084 sub sp, #16 - 8003fa6: b580 push {r7, lr} - 8003fa8: b086 sub sp, #24 - 8003faa: af00 add r7, sp, #0 - 8003fac: 6078 str r0, [r7, #4] - 8003fae: f107 0024 add.w r0, r7, #36 ; 0x24 - 8003fb2: e880 000e stmia.w r0, {r1, r2, r3} + 80036a4: b084 sub sp, #16 + 80036a6: b580 push {r7, lr} + 80036a8: b086 sub sp, #24 + 80036aa: af00 add r7, sp, #0 + 80036ac: 6078 str r0, [r7, #4] + 80036ae: f107 0024 add.w r0, r7, #36 ; 0x24 + 80036b2: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret = HAL_OK; - 8003fb6: 2300 movs r3, #0 - 8003fb8: 75fb strb r3, [r7, #23] + 80036b6: 2300 movs r3, #0 + 80036b8: 75fb strb r3, [r7, #23] uint32_t USBx_BASE = (uint32_t)USBx; - 8003fba: 687b ldr r3, [r7, #4] - 8003fbc: 60fb str r3, [r7, #12] + 80036ba: 687b ldr r3, [r7, #4] + 80036bc: 60fb str r3, [r7, #12] uint32_t i; for (i = 0U; i < 15U; i++) - 8003fbe: 2300 movs r3, #0 - 8003fc0: 613b str r3, [r7, #16] - 8003fc2: e009 b.n 8003fd8 + 80036be: 2300 movs r3, #0 + 80036c0: 613b str r3, [r7, #16] + 80036c2: e009 b.n 80036d8 { USBx->DIEPTXF[i] = 0U; - 8003fc4: 687a ldr r2, [r7, #4] - 8003fc6: 693b ldr r3, [r7, #16] - 8003fc8: 3340 adds r3, #64 ; 0x40 - 8003fca: 009b lsls r3, r3, #2 - 8003fcc: 4413 add r3, r2 - 8003fce: 2200 movs r2, #0 - 8003fd0: 605a str r2, [r3, #4] + 80036c4: 687a ldr r2, [r7, #4] + 80036c6: 693b ldr r3, [r7, #16] + 80036c8: 3340 adds r3, #64 ; 0x40 + 80036ca: 009b lsls r3, r3, #2 + 80036cc: 4413 add r3, r2 + 80036ce: 2200 movs r2, #0 + 80036d0: 605a str r2, [r3, #4] for (i = 0U; i < 15U; i++) - 8003fd2: 693b ldr r3, [r7, #16] - 8003fd4: 3301 adds r3, #1 - 8003fd6: 613b str r3, [r7, #16] - 8003fd8: 693b ldr r3, [r7, #16] - 8003fda: 2b0e cmp r3, #14 - 8003fdc: d9f2 bls.n 8003fc4 + 80036d2: 693b ldr r3, [r7, #16] + 80036d4: 3301 adds r3, #1 + 80036d6: 613b str r3, [r7, #16] + 80036d8: 693b ldr r3, [r7, #16] + 80036da: 2b0e cmp r3, #14 + 80036dc: d9f2 bls.n 80036c4 /* Enable HW VBUS sensing */ USBx->GCCFG |= USB_OTG_GCCFG_VBDEN; } #else /* VBUS Sensing setup */ if (cfg.vbus_sensing_enable == 0U) - 8003fde: f897 302e ldrb.w r3, [r7, #46] ; 0x2e - 8003fe2: 2b00 cmp r3, #0 - 8003fe4: d11c bne.n 8004020 + 80036de: f897 302e ldrb.w r3, [r7, #46] ; 0x2e + 80036e2: 2b00 cmp r3, #0 + 80036e4: d11c bne.n 8003720 { /* * Disable HW VBUS sensing. VBUS is internally considered to be always * at VBUS-Valid level (5V). */ USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; - 8003fe6: 68fb ldr r3, [r7, #12] - 8003fe8: f503 6300 add.w r3, r3, #2048 ; 0x800 - 8003fec: 685b ldr r3, [r3, #4] - 8003fee: 68fa ldr r2, [r7, #12] - 8003ff0: f502 6200 add.w r2, r2, #2048 ; 0x800 - 8003ff4: f043 0302 orr.w r3, r3, #2 - 8003ff8: 6053 str r3, [r2, #4] + 80036e6: 68fb ldr r3, [r7, #12] + 80036e8: f503 6300 add.w r3, r3, #2048 ; 0x800 + 80036ec: 685b ldr r3, [r3, #4] + 80036ee: 68fa ldr r2, [r7, #12] + 80036f0: f502 6200 add.w r2, r2, #2048 ; 0x800 + 80036f4: f043 0302 orr.w r3, r3, #2 + 80036f8: 6053 str r3, [r2, #4] USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; - 8003ffa: 687b ldr r3, [r7, #4] - 8003ffc: 6b9b ldr r3, [r3, #56] ; 0x38 - 8003ffe: f443 1200 orr.w r2, r3, #2097152 ; 0x200000 - 8004002: 687b ldr r3, [r7, #4] - 8004004: 639a str r2, [r3, #56] ; 0x38 + 80036fa: 687b ldr r3, [r7, #4] + 80036fc: 6b9b ldr r3, [r3, #56] ; 0x38 + 80036fe: f443 1200 orr.w r2, r3, #2097152 ; 0x200000 + 8003702: 687b ldr r3, [r7, #4] + 8003704: 639a str r2, [r3, #56] ; 0x38 USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; - 8004006: 687b ldr r3, [r7, #4] - 8004008: 6b9b ldr r3, [r3, #56] ; 0x38 - 800400a: f423 2200 bic.w r2, r3, #524288 ; 0x80000 - 800400e: 687b ldr r3, [r7, #4] - 8004010: 639a str r2, [r3, #56] ; 0x38 + 8003706: 687b ldr r3, [r7, #4] + 8003708: 6b9b ldr r3, [r3, #56] ; 0x38 + 800370a: f423 2200 bic.w r2, r3, #524288 ; 0x80000 + 800370e: 687b ldr r3, [r7, #4] + 8003710: 639a str r2, [r3, #56] ; 0x38 USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; - 8004012: 687b ldr r3, [r7, #4] - 8004014: 6b9b ldr r3, [r3, #56] ; 0x38 - 8004016: f423 2280 bic.w r2, r3, #262144 ; 0x40000 - 800401a: 687b ldr r3, [r7, #4] - 800401c: 639a str r2, [r3, #56] ; 0x38 - 800401e: e00b b.n 8004038 + 8003712: 687b ldr r3, [r7, #4] + 8003714: 6b9b ldr r3, [r3, #56] ; 0x38 + 8003716: f423 2280 bic.w r2, r3, #262144 ; 0x40000 + 800371a: 687b ldr r3, [r7, #4] + 800371c: 639a str r2, [r3, #56] ; 0x38 + 800371e: e00b b.n 8003738 } else { /* Enable HW VBUS sensing */ USBx->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS; - 8004020: 687b ldr r3, [r7, #4] - 8004022: 6b9b ldr r3, [r3, #56] ; 0x38 - 8004024: f423 1200 bic.w r2, r3, #2097152 ; 0x200000 - 8004028: 687b ldr r3, [r7, #4] - 800402a: 639a str r2, [r3, #56] ; 0x38 + 8003720: 687b ldr r3, [r7, #4] + 8003722: 6b9b ldr r3, [r3, #56] ; 0x38 + 8003724: f423 1200 bic.w r2, r3, #2097152 ; 0x200000 + 8003728: 687b ldr r3, [r7, #4] + 800372a: 639a str r2, [r3, #56] ; 0x38 USBx->GCCFG |= USB_OTG_GCCFG_VBUSBSEN; - 800402c: 687b ldr r3, [r7, #4] - 800402e: 6b9b ldr r3, [r3, #56] ; 0x38 - 8004030: f443 2200 orr.w r2, r3, #524288 ; 0x80000 - 8004034: 687b ldr r3, [r7, #4] - 8004036: 639a str r2, [r3, #56] ; 0x38 + 800372c: 687b ldr r3, [r7, #4] + 800372e: 6b9b ldr r3, [r3, #56] ; 0x38 + 8003730: f443 2200 orr.w r2, r3, #524288 ; 0x80000 + 8003734: 687b ldr r3, [r7, #4] + 8003736: 639a str r2, [r3, #56] ; 0x38 #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ /* Restart the Phy Clock */ USBx_PCGCCTL = 0U; - 8004038: 68fb ldr r3, [r7, #12] - 800403a: f503 6360 add.w r3, r3, #3584 ; 0xe00 - 800403e: 461a mov r2, r3 - 8004040: 2300 movs r3, #0 - 8004042: 6013 str r3, [r2, #0] + 8003738: 68fb ldr r3, [r7, #12] + 800373a: f503 6360 add.w r3, r3, #3584 ; 0xe00 + 800373e: 461a mov r2, r3 + 8003740: 2300 movs r3, #0 + 8003742: 6013 str r3, [r2, #0] if (cfg.phy_itface == USB_OTG_ULPI_PHY) - 8004044: f897 3029 ldrb.w r3, [r7, #41] ; 0x29 - 8004048: 2b01 cmp r3, #1 - 800404a: d10d bne.n 8004068 + 8003744: f897 3029 ldrb.w r3, [r7, #41] ; 0x29 + 8003748: 2b01 cmp r3, #1 + 800374a: d10d bne.n 8003768 { if (cfg.speed == USBD_HS_SPEED) - 800404c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8004050: 2b00 cmp r3, #0 - 8004052: d104 bne.n 800405e + 800374c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8003750: 2b00 cmp r3, #0 + 8003752: d104 bne.n 800375e { /* Set Core speed to High speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH); - 8004054: 2100 movs r1, #0 - 8004056: 6878 ldr r0, [r7, #4] - 8004058: f000 f968 bl 800432c - 800405c: e008 b.n 8004070 + 8003754: 2100 movs r1, #0 + 8003756: 6878 ldr r0, [r7, #4] + 8003758: f000 f968 bl 8003a2c + 800375c: e008 b.n 8003770 } else { /* Set Core speed to Full speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH_IN_FULL); - 800405e: 2101 movs r1, #1 - 8004060: 6878 ldr r0, [r7, #4] - 8004062: f000 f963 bl 800432c - 8004066: e003 b.n 8004070 + 800375e: 2101 movs r1, #1 + 8003760: 6878 ldr r0, [r7, #4] + 8003762: f000 f963 bl 8003a2c + 8003766: e003 b.n 8003770 } } else { /* Set Core speed to Full speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_FULL); - 8004068: 2103 movs r1, #3 - 800406a: 6878 ldr r0, [r7, #4] - 800406c: f000 f95e bl 800432c + 8003768: 2103 movs r1, #3 + 800376a: 6878 ldr r0, [r7, #4] + 800376c: f000 f95e bl 8003a2c } /* Flush the FIFOs */ if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */ - 8004070: 2110 movs r1, #16 - 8004072: 6878 ldr r0, [r7, #4] - 8004074: f000 f8fa bl 800426c - 8004078: 4603 mov r3, r0 - 800407a: 2b00 cmp r3, #0 - 800407c: d001 beq.n 8004082 + 8003770: 2110 movs r1, #16 + 8003772: 6878 ldr r0, [r7, #4] + 8003774: f000 f8fa bl 800396c + 8003778: 4603 mov r3, r0 + 800377a: 2b00 cmp r3, #0 + 800377c: d001 beq.n 8003782 { ret = HAL_ERROR; - 800407e: 2301 movs r3, #1 - 8004080: 75fb strb r3, [r7, #23] + 800377e: 2301 movs r3, #1 + 8003780: 75fb strb r3, [r7, #23] } if (USB_FlushRxFifo(USBx) != HAL_OK) - 8004082: 6878 ldr r0, [r7, #4] - 8004084: f000 f924 bl 80042d0 - 8004088: 4603 mov r3, r0 - 800408a: 2b00 cmp r3, #0 - 800408c: d001 beq.n 8004092 + 8003782: 6878 ldr r0, [r7, #4] + 8003784: f000 f924 bl 80039d0 + 8003788: 4603 mov r3, r0 + 800378a: 2b00 cmp r3, #0 + 800378c: d001 beq.n 8003792 { ret = HAL_ERROR; - 800408e: 2301 movs r3, #1 - 8004090: 75fb strb r3, [r7, #23] + 800378e: 2301 movs r3, #1 + 8003790: 75fb strb r3, [r7, #23] } /* Clear all pending Device Interrupts */ USBx_DEVICE->DIEPMSK = 0U; - 8004092: 68fb ldr r3, [r7, #12] - 8004094: f503 6300 add.w r3, r3, #2048 ; 0x800 - 8004098: 461a mov r2, r3 - 800409a: 2300 movs r3, #0 - 800409c: 6113 str r3, [r2, #16] + 8003792: 68fb ldr r3, [r7, #12] + 8003794: f503 6300 add.w r3, r3, #2048 ; 0x800 + 8003798: 461a mov r2, r3 + 800379a: 2300 movs r3, #0 + 800379c: 6113 str r3, [r2, #16] USBx_DEVICE->DOEPMSK = 0U; - 800409e: 68fb ldr r3, [r7, #12] - 80040a0: f503 6300 add.w r3, r3, #2048 ; 0x800 - 80040a4: 461a mov r2, r3 - 80040a6: 2300 movs r3, #0 - 80040a8: 6153 str r3, [r2, #20] + 800379e: 68fb ldr r3, [r7, #12] + 80037a0: f503 6300 add.w r3, r3, #2048 ; 0x800 + 80037a4: 461a mov r2, r3 + 80037a6: 2300 movs r3, #0 + 80037a8: 6153 str r3, [r2, #20] USBx_DEVICE->DAINTMSK = 0U; - 80040aa: 68fb ldr r3, [r7, #12] - 80040ac: f503 6300 add.w r3, r3, #2048 ; 0x800 - 80040b0: 461a mov r2, r3 - 80040b2: 2300 movs r3, #0 - 80040b4: 61d3 str r3, [r2, #28] + 80037aa: 68fb ldr r3, [r7, #12] + 80037ac: f503 6300 add.w r3, r3, #2048 ; 0x800 + 80037b0: 461a mov r2, r3 + 80037b2: 2300 movs r3, #0 + 80037b4: 61d3 str r3, [r2, #28] for (i = 0U; i < cfg.dev_endpoints; i++) - 80040b6: 2300 movs r3, #0 - 80040b8: 613b str r3, [r7, #16] - 80040ba: e043 b.n 8004144 + 80037b6: 2300 movs r3, #0 + 80037b8: 613b str r3, [r7, #16] + 80037ba: e043 b.n 8003844 { if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - 80040bc: 693b ldr r3, [r7, #16] - 80040be: 015a lsls r2, r3, #5 - 80040c0: 68fb ldr r3, [r7, #12] - 80040c2: 4413 add r3, r2 - 80040c4: f503 6310 add.w r3, r3, #2304 ; 0x900 - 80040c8: 681b ldr r3, [r3, #0] - 80040ca: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 80040ce: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 80040d2: d118 bne.n 8004106 + 80037bc: 693b ldr r3, [r7, #16] + 80037be: 015a lsls r2, r3, #5 + 80037c0: 68fb ldr r3, [r7, #12] + 80037c2: 4413 add r3, r2 + 80037c4: f503 6310 add.w r3, r3, #2304 ; 0x900 + 80037c8: 681b ldr r3, [r3, #0] + 80037ca: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 80037ce: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 80037d2: d118 bne.n 8003806 { if (i == 0U) - 80040d4: 693b ldr r3, [r7, #16] - 80040d6: 2b00 cmp r3, #0 - 80040d8: d10a bne.n 80040f0 + 80037d4: 693b ldr r3, [r7, #16] + 80037d6: 2b00 cmp r3, #0 + 80037d8: d10a bne.n 80037f0 { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_SNAK; - 80040da: 693b ldr r3, [r7, #16] - 80040dc: 015a lsls r2, r3, #5 - 80040de: 68fb ldr r3, [r7, #12] - 80040e0: 4413 add r3, r2 - 80040e2: f503 6310 add.w r3, r3, #2304 ; 0x900 - 80040e6: 461a mov r2, r3 - 80040e8: f04f 6300 mov.w r3, #134217728 ; 0x8000000 - 80040ec: 6013 str r3, [r2, #0] - 80040ee: e013 b.n 8004118 + 80037da: 693b ldr r3, [r7, #16] + 80037dc: 015a lsls r2, r3, #5 + 80037de: 68fb ldr r3, [r7, #12] + 80037e0: 4413 add r3, r2 + 80037e2: f503 6310 add.w r3, r3, #2304 ; 0x900 + 80037e6: 461a mov r2, r3 + 80037e8: f04f 6300 mov.w r3, #134217728 ; 0x8000000 + 80037ec: 6013 str r3, [r2, #0] + 80037ee: e013 b.n 8003818 } else { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK; - 80040f0: 693b ldr r3, [r7, #16] - 80040f2: 015a lsls r2, r3, #5 - 80040f4: 68fb ldr r3, [r7, #12] - 80040f6: 4413 add r3, r2 - 80040f8: f503 6310 add.w r3, r3, #2304 ; 0x900 - 80040fc: 461a mov r2, r3 - 80040fe: f04f 4390 mov.w r3, #1207959552 ; 0x48000000 - 8004102: 6013 str r3, [r2, #0] - 8004104: e008 b.n 8004118 + 80037f0: 693b ldr r3, [r7, #16] + 80037f2: 015a lsls r2, r3, #5 + 80037f4: 68fb ldr r3, [r7, #12] + 80037f6: 4413 add r3, r2 + 80037f8: f503 6310 add.w r3, r3, #2304 ; 0x900 + 80037fc: 461a mov r2, r3 + 80037fe: f04f 4390 mov.w r3, #1207959552 ; 0x48000000 + 8003802: 6013 str r3, [r2, #0] + 8003804: e008 b.n 8003818 } } else { USBx_INEP(i)->DIEPCTL = 0U; - 8004106: 693b ldr r3, [r7, #16] - 8004108: 015a lsls r2, r3, #5 - 800410a: 68fb ldr r3, [r7, #12] - 800410c: 4413 add r3, r2 - 800410e: f503 6310 add.w r3, r3, #2304 ; 0x900 - 8004112: 461a mov r2, r3 - 8004114: 2300 movs r3, #0 - 8004116: 6013 str r3, [r2, #0] + 8003806: 693b ldr r3, [r7, #16] + 8003808: 015a lsls r2, r3, #5 + 800380a: 68fb ldr r3, [r7, #12] + 800380c: 4413 add r3, r2 + 800380e: f503 6310 add.w r3, r3, #2304 ; 0x900 + 8003812: 461a mov r2, r3 + 8003814: 2300 movs r3, #0 + 8003816: 6013 str r3, [r2, #0] } USBx_INEP(i)->DIEPTSIZ = 0U; - 8004118: 693b ldr r3, [r7, #16] - 800411a: 015a lsls r2, r3, #5 - 800411c: 68fb ldr r3, [r7, #12] - 800411e: 4413 add r3, r2 - 8004120: f503 6310 add.w r3, r3, #2304 ; 0x900 - 8004124: 461a mov r2, r3 - 8004126: 2300 movs r3, #0 - 8004128: 6113 str r3, [r2, #16] + 8003818: 693b ldr r3, [r7, #16] + 800381a: 015a lsls r2, r3, #5 + 800381c: 68fb ldr r3, [r7, #12] + 800381e: 4413 add r3, r2 + 8003820: f503 6310 add.w r3, r3, #2304 ; 0x900 + 8003824: 461a mov r2, r3 + 8003826: 2300 movs r3, #0 + 8003828: 6113 str r3, [r2, #16] USBx_INEP(i)->DIEPINT = 0xFB7FU; - 800412a: 693b ldr r3, [r7, #16] - 800412c: 015a lsls r2, r3, #5 - 800412e: 68fb ldr r3, [r7, #12] - 8004130: 4413 add r3, r2 - 8004132: f503 6310 add.w r3, r3, #2304 ; 0x900 - 8004136: 461a mov r2, r3 - 8004138: f64f 337f movw r3, #64383 ; 0xfb7f - 800413c: 6093 str r3, [r2, #8] + 800382a: 693b ldr r3, [r7, #16] + 800382c: 015a lsls r2, r3, #5 + 800382e: 68fb ldr r3, [r7, #12] + 8003830: 4413 add r3, r2 + 8003832: f503 6310 add.w r3, r3, #2304 ; 0x900 + 8003836: 461a mov r2, r3 + 8003838: f64f 337f movw r3, #64383 ; 0xfb7f + 800383c: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) - 800413e: 693b ldr r3, [r7, #16] - 8004140: 3301 adds r3, #1 - 8004142: 613b str r3, [r7, #16] - 8004144: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 - 8004148: 461a mov r2, r3 - 800414a: 693b ldr r3, [r7, #16] - 800414c: 4293 cmp r3, r2 - 800414e: d3b5 bcc.n 80040bc + 800383e: 693b ldr r3, [r7, #16] + 8003840: 3301 adds r3, #1 + 8003842: 613b str r3, [r7, #16] + 8003844: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 + 8003848: 461a mov r2, r3 + 800384a: 693b ldr r3, [r7, #16] + 800384c: 4293 cmp r3, r2 + 800384e: d3b5 bcc.n 80037bc } for (i = 0U; i < cfg.dev_endpoints; i++) - 8004150: 2300 movs r3, #0 - 8004152: 613b str r3, [r7, #16] - 8004154: e043 b.n 80041de + 8003850: 2300 movs r3, #0 + 8003852: 613b str r3, [r7, #16] + 8003854: e043 b.n 80038de { if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - 8004156: 693b ldr r3, [r7, #16] - 8004158: 015a lsls r2, r3, #5 - 800415a: 68fb ldr r3, [r7, #12] - 800415c: 4413 add r3, r2 - 800415e: f503 6330 add.w r3, r3, #2816 ; 0xb00 - 8004162: 681b ldr r3, [r3, #0] - 8004164: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 8004168: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 800416c: d118 bne.n 80041a0 + 8003856: 693b ldr r3, [r7, #16] + 8003858: 015a lsls r2, r3, #5 + 800385a: 68fb ldr r3, [r7, #12] + 800385c: 4413 add r3, r2 + 800385e: f503 6330 add.w r3, r3, #2816 ; 0xb00 + 8003862: 681b ldr r3, [r3, #0] + 8003864: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 8003868: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 800386c: d118 bne.n 80038a0 { if (i == 0U) - 800416e: 693b ldr r3, [r7, #16] - 8004170: 2b00 cmp r3, #0 - 8004172: d10a bne.n 800418a + 800386e: 693b ldr r3, [r7, #16] + 8003870: 2b00 cmp r3, #0 + 8003872: d10a bne.n 800388a { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_SNAK; - 8004174: 693b ldr r3, [r7, #16] - 8004176: 015a lsls r2, r3, #5 - 8004178: 68fb ldr r3, [r7, #12] - 800417a: 4413 add r3, r2 - 800417c: f503 6330 add.w r3, r3, #2816 ; 0xb00 - 8004180: 461a mov r2, r3 - 8004182: f04f 6300 mov.w r3, #134217728 ; 0x8000000 - 8004186: 6013 str r3, [r2, #0] - 8004188: e013 b.n 80041b2 + 8003874: 693b ldr r3, [r7, #16] + 8003876: 015a lsls r2, r3, #5 + 8003878: 68fb ldr r3, [r7, #12] + 800387a: 4413 add r3, r2 + 800387c: f503 6330 add.w r3, r3, #2816 ; 0xb00 + 8003880: 461a mov r2, r3 + 8003882: f04f 6300 mov.w r3, #134217728 ; 0x8000000 + 8003886: 6013 str r3, [r2, #0] + 8003888: e013 b.n 80038b2 } else { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK; - 800418a: 693b ldr r3, [r7, #16] - 800418c: 015a lsls r2, r3, #5 - 800418e: 68fb ldr r3, [r7, #12] - 8004190: 4413 add r3, r2 - 8004192: f503 6330 add.w r3, r3, #2816 ; 0xb00 - 8004196: 461a mov r2, r3 - 8004198: f04f 4390 mov.w r3, #1207959552 ; 0x48000000 - 800419c: 6013 str r3, [r2, #0] - 800419e: e008 b.n 80041b2 + 800388a: 693b ldr r3, [r7, #16] + 800388c: 015a lsls r2, r3, #5 + 800388e: 68fb ldr r3, [r7, #12] + 8003890: 4413 add r3, r2 + 8003892: f503 6330 add.w r3, r3, #2816 ; 0xb00 + 8003896: 461a mov r2, r3 + 8003898: f04f 4390 mov.w r3, #1207959552 ; 0x48000000 + 800389c: 6013 str r3, [r2, #0] + 800389e: e008 b.n 80038b2 } } else { USBx_OUTEP(i)->DOEPCTL = 0U; - 80041a0: 693b ldr r3, [r7, #16] - 80041a2: 015a lsls r2, r3, #5 - 80041a4: 68fb ldr r3, [r7, #12] - 80041a6: 4413 add r3, r2 - 80041a8: f503 6330 add.w r3, r3, #2816 ; 0xb00 - 80041ac: 461a mov r2, r3 - 80041ae: 2300 movs r3, #0 - 80041b0: 6013 str r3, [r2, #0] + 80038a0: 693b ldr r3, [r7, #16] + 80038a2: 015a lsls r2, r3, #5 + 80038a4: 68fb ldr r3, [r7, #12] + 80038a6: 4413 add r3, r2 + 80038a8: f503 6330 add.w r3, r3, #2816 ; 0xb00 + 80038ac: 461a mov r2, r3 + 80038ae: 2300 movs r3, #0 + 80038b0: 6013 str r3, [r2, #0] } USBx_OUTEP(i)->DOEPTSIZ = 0U; - 80041b2: 693b ldr r3, [r7, #16] - 80041b4: 015a lsls r2, r3, #5 - 80041b6: 68fb ldr r3, [r7, #12] - 80041b8: 4413 add r3, r2 - 80041ba: f503 6330 add.w r3, r3, #2816 ; 0xb00 - 80041be: 461a mov r2, r3 - 80041c0: 2300 movs r3, #0 - 80041c2: 6113 str r3, [r2, #16] + 80038b2: 693b ldr r3, [r7, #16] + 80038b4: 015a lsls r2, r3, #5 + 80038b6: 68fb ldr r3, [r7, #12] + 80038b8: 4413 add r3, r2 + 80038ba: f503 6330 add.w r3, r3, #2816 ; 0xb00 + 80038be: 461a mov r2, r3 + 80038c0: 2300 movs r3, #0 + 80038c2: 6113 str r3, [r2, #16] USBx_OUTEP(i)->DOEPINT = 0xFB7FU; - 80041c4: 693b ldr r3, [r7, #16] - 80041c6: 015a lsls r2, r3, #5 - 80041c8: 68fb ldr r3, [r7, #12] - 80041ca: 4413 add r3, r2 - 80041cc: f503 6330 add.w r3, r3, #2816 ; 0xb00 - 80041d0: 461a mov r2, r3 - 80041d2: f64f 337f movw r3, #64383 ; 0xfb7f - 80041d6: 6093 str r3, [r2, #8] + 80038c4: 693b ldr r3, [r7, #16] + 80038c6: 015a lsls r2, r3, #5 + 80038c8: 68fb ldr r3, [r7, #12] + 80038ca: 4413 add r3, r2 + 80038cc: f503 6330 add.w r3, r3, #2816 ; 0xb00 + 80038d0: 461a mov r2, r3 + 80038d2: f64f 337f movw r3, #64383 ; 0xfb7f + 80038d6: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) - 80041d8: 693b ldr r3, [r7, #16] - 80041da: 3301 adds r3, #1 - 80041dc: 613b str r3, [r7, #16] - 80041de: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 - 80041e2: 461a mov r2, r3 - 80041e4: 693b ldr r3, [r7, #16] - 80041e6: 4293 cmp r3, r2 - 80041e8: d3b5 bcc.n 8004156 + 80038d8: 693b ldr r3, [r7, #16] + 80038da: 3301 adds r3, #1 + 80038dc: 613b str r3, [r7, #16] + 80038de: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 + 80038e2: 461a mov r2, r3 + 80038e4: 693b ldr r3, [r7, #16] + 80038e6: 4293 cmp r3, r2 + 80038e8: d3b5 bcc.n 8003856 } USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM); - 80041ea: 68fb ldr r3, [r7, #12] - 80041ec: f503 6300 add.w r3, r3, #2048 ; 0x800 - 80041f0: 691b ldr r3, [r3, #16] - 80041f2: 68fa ldr r2, [r7, #12] - 80041f4: f502 6200 add.w r2, r2, #2048 ; 0x800 - 80041f8: f423 7380 bic.w r3, r3, #256 ; 0x100 - 80041fc: 6113 str r3, [r2, #16] + 80038ea: 68fb ldr r3, [r7, #12] + 80038ec: f503 6300 add.w r3, r3, #2048 ; 0x800 + 80038f0: 691b ldr r3, [r3, #16] + 80038f2: 68fa ldr r2, [r7, #12] + 80038f4: f502 6200 add.w r2, r2, #2048 ; 0x800 + 80038f8: f423 7380 bic.w r3, r3, #256 ; 0x100 + 80038fc: 6113 str r3, [r2, #16] /* Disable all interrupts. */ USBx->GINTMSK = 0U; - 80041fe: 687b ldr r3, [r7, #4] - 8004200: 2200 movs r2, #0 - 8004202: 619a str r2, [r3, #24] + 80038fe: 687b ldr r3, [r7, #4] + 8003900: 2200 movs r2, #0 + 8003902: 619a str r2, [r3, #24] /* Clear any pending interrupts */ USBx->GINTSTS = 0xBFFFFFFFU; - 8004204: 687b ldr r3, [r7, #4] - 8004206: f06f 4280 mvn.w r2, #1073741824 ; 0x40000000 - 800420a: 615a str r2, [r3, #20] + 8003904: 687b ldr r3, [r7, #4] + 8003906: f06f 4280 mvn.w r2, #1073741824 ; 0x40000000 + 800390a: 615a str r2, [r3, #20] /* Enable the common interrupts */ if (cfg.dma_enable == 0U) - 800420c: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 - 8004210: 2b00 cmp r3, #0 - 8004212: d105 bne.n 8004220 + 800390c: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 + 8003910: 2b00 cmp r3, #0 + 8003912: d105 bne.n 8003920 { USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; - 8004214: 687b ldr r3, [r7, #4] - 8004216: 699b ldr r3, [r3, #24] - 8004218: f043 0210 orr.w r2, r3, #16 - 800421c: 687b ldr r3, [r7, #4] - 800421e: 619a str r2, [r3, #24] + 8003914: 687b ldr r3, [r7, #4] + 8003916: 699b ldr r3, [r3, #24] + 8003918: f043 0210 orr.w r2, r3, #16 + 800391c: 687b ldr r3, [r7, #4] + 800391e: 619a str r2, [r3, #24] } /* Enable interrupts matching to the Device mode ONLY */ USBx->GINTMSK |= USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST | - 8004220: 687b ldr r3, [r7, #4] - 8004222: 699a ldr r2, [r3, #24] - 8004224: 4b10 ldr r3, [pc, #64] ; (8004268 ) - 8004226: 4313 orrs r3, r2 - 8004228: 687a ldr r2, [r7, #4] - 800422a: 6193 str r3, [r2, #24] + 8003920: 687b ldr r3, [r7, #4] + 8003922: 699a ldr r2, [r3, #24] + 8003924: 4b10 ldr r3, [pc, #64] ; (8003968 ) + 8003926: 4313 orrs r3, r2 + 8003928: 687a ldr r2, [r7, #4] + 800392a: 6193 str r3, [r2, #24] USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT | USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM | USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM; if (cfg.Sof_enable != 0U) - 800422c: f897 302a ldrb.w r3, [r7, #42] ; 0x2a - 8004230: 2b00 cmp r3, #0 - 8004232: d005 beq.n 8004240 + 800392c: f897 302a ldrb.w r3, [r7, #42] ; 0x2a + 8003930: 2b00 cmp r3, #0 + 8003932: d005 beq.n 8003940 { USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM; - 8004234: 687b ldr r3, [r7, #4] - 8004236: 699b ldr r3, [r3, #24] - 8004238: f043 0208 orr.w r2, r3, #8 - 800423c: 687b ldr r3, [r7, #4] - 800423e: 619a str r2, [r3, #24] + 8003934: 687b ldr r3, [r7, #4] + 8003936: 699b ldr r3, [r3, #24] + 8003938: f043 0208 orr.w r2, r3, #8 + 800393c: 687b ldr r3, [r7, #4] + 800393e: 619a str r2, [r3, #24] } if (cfg.vbus_sensing_enable == 1U) - 8004240: f897 302e ldrb.w r3, [r7, #46] ; 0x2e - 8004244: 2b01 cmp r3, #1 - 8004246: d107 bne.n 8004258 + 8003940: f897 302e ldrb.w r3, [r7, #46] ; 0x2e + 8003944: 2b01 cmp r3, #1 + 8003946: d107 bne.n 8003958 { USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT); - 8004248: 687b ldr r3, [r7, #4] - 800424a: 699b ldr r3, [r3, #24] - 800424c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 8004250: f043 0304 orr.w r3, r3, #4 - 8004254: 687a ldr r2, [r7, #4] - 8004256: 6193 str r3, [r2, #24] + 8003948: 687b ldr r3, [r7, #4] + 800394a: 699b ldr r3, [r3, #24] + 800394c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 8003950: f043 0304 orr.w r3, r3, #4 + 8003954: 687a ldr r2, [r7, #4] + 8003956: 6193 str r3, [r2, #24] } return ret; - 8004258: 7dfb ldrb r3, [r7, #23] + 8003958: 7dfb ldrb r3, [r7, #23] } - 800425a: 4618 mov r0, r3 - 800425c: 3718 adds r7, #24 - 800425e: 46bd mov sp, r7 - 8004260: e8bd 4080 ldmia.w sp!, {r7, lr} - 8004264: b004 add sp, #16 - 8004266: 4770 bx lr - 8004268: 803c3800 .word 0x803c3800 + 800395a: 4618 mov r0, r3 + 800395c: 3718 adds r7, #24 + 800395e: 46bd mov sp, r7 + 8003960: e8bd 4080 ldmia.w sp!, {r7, lr} + 8003964: b004 add sp, #16 + 8003966: 4770 bx lr + 8003968: 803c3800 .word 0x803c3800 -0800426c : +0800396c : * This parameter can be a value from 1 to 15 15 means Flush all Tx FIFOs * @retval HAL status */ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num) { - 800426c: b480 push {r7} - 800426e: b085 sub sp, #20 - 8004270: af00 add r7, sp, #0 - 8004272: 6078 str r0, [r7, #4] - 8004274: 6039 str r1, [r7, #0] + 800396c: b480 push {r7} + 800396e: b085 sub sp, #20 + 8003970: af00 add r7, sp, #0 + 8003972: 6078 str r0, [r7, #4] + 8003974: 6039 str r1, [r7, #0] __IO uint32_t count = 0U; - 8004276: 2300 movs r3, #0 - 8004278: 60fb str r3, [r7, #12] + 8003976: 2300 movs r3, #0 + 8003978: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; - 800427a: 68fb ldr r3, [r7, #12] - 800427c: 3301 adds r3, #1 - 800427e: 60fb str r3, [r7, #12] + 800397a: 68fb ldr r3, [r7, #12] + 800397c: 3301 adds r3, #1 + 800397e: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) - 8004280: 68fb ldr r3, [r7, #12] - 8004282: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 - 8004286: d901 bls.n 800428c + 8003980: 68fb ldr r3, [r7, #12] + 8003982: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 + 8003986: d901 bls.n 800398c { return HAL_TIMEOUT; - 8004288: 2303 movs r3, #3 - 800428a: e01b b.n 80042c4 + 8003988: 2303 movs r3, #3 + 800398a: e01b b.n 80039c4 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); - 800428c: 687b ldr r3, [r7, #4] - 800428e: 691b ldr r3, [r3, #16] - 8004290: 2b00 cmp r3, #0 - 8004292: daf2 bge.n 800427a + 800398c: 687b ldr r3, [r7, #4] + 800398e: 691b ldr r3, [r3, #16] + 8003990: 2b00 cmp r3, #0 + 8003992: daf2 bge.n 800397a /* Flush TX Fifo */ count = 0U; - 8004294: 2300 movs r3, #0 - 8004296: 60fb str r3, [r7, #12] + 8003994: 2300 movs r3, #0 + 8003996: 60fb str r3, [r7, #12] USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6)); - 8004298: 683b ldr r3, [r7, #0] - 800429a: 019b lsls r3, r3, #6 - 800429c: f043 0220 orr.w r2, r3, #32 - 80042a0: 687b ldr r3, [r7, #4] - 80042a2: 611a str r2, [r3, #16] + 8003998: 683b ldr r3, [r7, #0] + 800399a: 019b lsls r3, r3, #6 + 800399c: f043 0220 orr.w r2, r3, #32 + 80039a0: 687b ldr r3, [r7, #4] + 80039a2: 611a str r2, [r3, #16] do { count++; - 80042a4: 68fb ldr r3, [r7, #12] - 80042a6: 3301 adds r3, #1 - 80042a8: 60fb str r3, [r7, #12] + 80039a4: 68fb ldr r3, [r7, #12] + 80039a6: 3301 adds r3, #1 + 80039a8: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) - 80042aa: 68fb ldr r3, [r7, #12] - 80042ac: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 - 80042b0: d901 bls.n 80042b6 + 80039aa: 68fb ldr r3, [r7, #12] + 80039ac: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 + 80039b0: d901 bls.n 80039b6 { return HAL_TIMEOUT; - 80042b2: 2303 movs r3, #3 - 80042b4: e006 b.n 80042c4 + 80039b2: 2303 movs r3, #3 + 80039b4: e006 b.n 80039c4 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH); - 80042b6: 687b ldr r3, [r7, #4] - 80042b8: 691b ldr r3, [r3, #16] - 80042ba: f003 0320 and.w r3, r3, #32 - 80042be: 2b20 cmp r3, #32 - 80042c0: d0f0 beq.n 80042a4 + 80039b6: 687b ldr r3, [r7, #4] + 80039b8: 691b ldr r3, [r3, #16] + 80039ba: f003 0320 and.w r3, r3, #32 + 80039be: 2b20 cmp r3, #32 + 80039c0: d0f0 beq.n 80039a4 return HAL_OK; - 80042c2: 2300 movs r3, #0 + 80039c2: 2300 movs r3, #0 } - 80042c4: 4618 mov r0, r3 - 80042c6: 3714 adds r7, #20 - 80042c8: 46bd mov sp, r7 - 80042ca: f85d 7b04 ldr.w r7, [sp], #4 - 80042ce: 4770 bx lr + 80039c4: 4618 mov r0, r3 + 80039c6: 3714 adds r7, #20 + 80039c8: 46bd mov sp, r7 + 80039ca: f85d 7b04 ldr.w r7, [sp], #4 + 80039ce: 4770 bx lr -080042d0 : +080039d0 : * @brief USB_FlushRxFifo Flush Rx FIFO * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx) { - 80042d0: b480 push {r7} - 80042d2: b085 sub sp, #20 - 80042d4: af00 add r7, sp, #0 - 80042d6: 6078 str r0, [r7, #4] + 80039d0: b480 push {r7} + 80039d2: b085 sub sp, #20 + 80039d4: af00 add r7, sp, #0 + 80039d6: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; - 80042d8: 2300 movs r3, #0 - 80042da: 60fb str r3, [r7, #12] + 80039d8: 2300 movs r3, #0 + 80039da: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; - 80042dc: 68fb ldr r3, [r7, #12] - 80042de: 3301 adds r3, #1 - 80042e0: 60fb str r3, [r7, #12] + 80039dc: 68fb ldr r3, [r7, #12] + 80039de: 3301 adds r3, #1 + 80039e0: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) - 80042e2: 68fb ldr r3, [r7, #12] - 80042e4: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 - 80042e8: d901 bls.n 80042ee + 80039e2: 68fb ldr r3, [r7, #12] + 80039e4: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 + 80039e8: d901 bls.n 80039ee { return HAL_TIMEOUT; - 80042ea: 2303 movs r3, #3 - 80042ec: e018 b.n 8004320 + 80039ea: 2303 movs r3, #3 + 80039ec: e018 b.n 8003a20 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); - 80042ee: 687b ldr r3, [r7, #4] - 80042f0: 691b ldr r3, [r3, #16] - 80042f2: 2b00 cmp r3, #0 - 80042f4: daf2 bge.n 80042dc + 80039ee: 687b ldr r3, [r7, #4] + 80039f0: 691b ldr r3, [r3, #16] + 80039f2: 2b00 cmp r3, #0 + 80039f4: daf2 bge.n 80039dc /* Flush RX Fifo */ count = 0U; - 80042f6: 2300 movs r3, #0 - 80042f8: 60fb str r3, [r7, #12] + 80039f6: 2300 movs r3, #0 + 80039f8: 60fb str r3, [r7, #12] USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH; - 80042fa: 687b ldr r3, [r7, #4] - 80042fc: 2210 movs r2, #16 - 80042fe: 611a str r2, [r3, #16] + 80039fa: 687b ldr r3, [r7, #4] + 80039fc: 2210 movs r2, #16 + 80039fe: 611a str r2, [r3, #16] do { count++; - 8004300: 68fb ldr r3, [r7, #12] - 8004302: 3301 adds r3, #1 - 8004304: 60fb str r3, [r7, #12] + 8003a00: 68fb ldr r3, [r7, #12] + 8003a02: 3301 adds r3, #1 + 8003a04: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) - 8004306: 68fb ldr r3, [r7, #12] - 8004308: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 - 800430c: d901 bls.n 8004312 + 8003a06: 68fb ldr r3, [r7, #12] + 8003a08: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 + 8003a0c: d901 bls.n 8003a12 { return HAL_TIMEOUT; - 800430e: 2303 movs r3, #3 - 8004310: e006 b.n 8004320 + 8003a0e: 2303 movs r3, #3 + 8003a10: e006 b.n 8003a20 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH); - 8004312: 687b ldr r3, [r7, #4] - 8004314: 691b ldr r3, [r3, #16] - 8004316: f003 0310 and.w r3, r3, #16 - 800431a: 2b10 cmp r3, #16 - 800431c: d0f0 beq.n 8004300 + 8003a12: 687b ldr r3, [r7, #4] + 8003a14: 691b ldr r3, [r3, #16] + 8003a16: f003 0310 and.w r3, r3, #16 + 8003a1a: 2b10 cmp r3, #16 + 8003a1c: d0f0 beq.n 8003a00 return HAL_OK; - 800431e: 2300 movs r3, #0 + 8003a1e: 2300 movs r3, #0 } - 8004320: 4618 mov r0, r3 - 8004322: 3714 adds r7, #20 - 8004324: 46bd mov sp, r7 - 8004326: f85d 7b04 ldr.w r7, [sp], #4 - 800432a: 4770 bx lr + 8003a20: 4618 mov r0, r3 + 8003a22: 3714 adds r7, #20 + 8003a24: 46bd mov sp, r7 + 8003a26: f85d 7b04 ldr.w r7, [sp], #4 + 8003a2a: 4770 bx lr -0800432c : +08003a2c : * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode * @arg USB_OTG_SPEED_FULL: Full speed mode * @retval Hal status */ HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed) { - 800432c: b480 push {r7} - 800432e: b085 sub sp, #20 - 8004330: af00 add r7, sp, #0 - 8004332: 6078 str r0, [r7, #4] - 8004334: 460b mov r3, r1 - 8004336: 70fb strb r3, [r7, #3] + 8003a2c: b480 push {r7} + 8003a2e: b085 sub sp, #20 + 8003a30: af00 add r7, sp, #0 + 8003a32: 6078 str r0, [r7, #4] + 8003a34: 460b mov r3, r1 + 8003a36: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; - 8004338: 687b ldr r3, [r7, #4] - 800433a: 60fb str r3, [r7, #12] + 8003a38: 687b ldr r3, [r7, #4] + 8003a3a: 60fb str r3, [r7, #12] USBx_DEVICE->DCFG |= speed; - 800433c: 68fb ldr r3, [r7, #12] - 800433e: f503 6300 add.w r3, r3, #2048 ; 0x800 - 8004342: 681a ldr r2, [r3, #0] - 8004344: 78fb ldrb r3, [r7, #3] - 8004346: 68f9 ldr r1, [r7, #12] - 8004348: f501 6100 add.w r1, r1, #2048 ; 0x800 - 800434c: 4313 orrs r3, r2 - 800434e: 600b str r3, [r1, #0] + 8003a3c: 68fb ldr r3, [r7, #12] + 8003a3e: f503 6300 add.w r3, r3, #2048 ; 0x800 + 8003a42: 681a ldr r2, [r3, #0] + 8003a44: 78fb ldrb r3, [r7, #3] + 8003a46: 68f9 ldr r1, [r7, #12] + 8003a48: f501 6100 add.w r1, r1, #2048 ; 0x800 + 8003a4c: 4313 orrs r3, r2 + 8003a4e: 600b str r3, [r1, #0] return HAL_OK; - 8004350: 2300 movs r3, #0 + 8003a50: 2300 movs r3, #0 } - 8004352: 4618 mov r0, r3 - 8004354: 3714 adds r7, #20 - 8004356: 46bd mov sp, r7 - 8004358: f85d 7b04 ldr.w r7, [sp], #4 - 800435c: 4770 bx lr + 8003a52: 4618 mov r0, r3 + 8003a54: 3714 adds r7, #20 + 8003a56: 46bd mov sp, r7 + 8003a58: f85d 7b04 ldr.w r7, [sp], #4 + 8003a5c: 4770 bx lr -0800435e : +08003a5e : * @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx) { - 800435e: b480 push {r7} - 8004360: b085 sub sp, #20 - 8004362: af00 add r7, sp, #0 - 8004364: 6078 str r0, [r7, #4] + 8003a5e: b480 push {r7} + 8003a60: b085 sub sp, #20 + 8003a62: af00 add r7, sp, #0 + 8003a64: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; - 8004366: 687b ldr r3, [r7, #4] - 8004368: 60fb str r3, [r7, #12] + 8003a66: 687b ldr r3, [r7, #4] + 8003a68: 60fb str r3, [r7, #12] /* In case phy is stopped, ensure to ungate and restore the phy CLK */ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK); - 800436a: 68fb ldr r3, [r7, #12] - 800436c: f503 6360 add.w r3, r3, #3584 ; 0xe00 - 8004370: 681b ldr r3, [r3, #0] - 8004372: 68fa ldr r2, [r7, #12] - 8004374: f502 6260 add.w r2, r2, #3584 ; 0xe00 - 8004378: f023 0303 bic.w r3, r3, #3 - 800437c: 6013 str r3, [r2, #0] + 8003a6a: 68fb ldr r3, [r7, #12] + 8003a6c: f503 6360 add.w r3, r3, #3584 ; 0xe00 + 8003a70: 681b ldr r3, [r3, #0] + 8003a72: 68fa ldr r2, [r7, #12] + 8003a74: f502 6260 add.w r2, r2, #3584 ; 0xe00 + 8003a78: f023 0303 bic.w r3, r3, #3 + 8003a7c: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; - 800437e: 68fb ldr r3, [r7, #12] - 8004380: f503 6300 add.w r3, r3, #2048 ; 0x800 - 8004384: 685b ldr r3, [r3, #4] - 8004386: 68fa ldr r2, [r7, #12] - 8004388: f502 6200 add.w r2, r2, #2048 ; 0x800 - 800438c: f043 0302 orr.w r3, r3, #2 - 8004390: 6053 str r3, [r2, #4] + 8003a7e: 68fb ldr r3, [r7, #12] + 8003a80: f503 6300 add.w r3, r3, #2048 ; 0x800 + 8003a84: 685b ldr r3, [r3, #4] + 8003a86: 68fa ldr r2, [r7, #12] + 8003a88: f502 6200 add.w r2, r2, #2048 ; 0x800 + 8003a8c: f043 0302 orr.w r3, r3, #2 + 8003a90: 6053 str r3, [r2, #4] return HAL_OK; - 8004392: 2300 movs r3, #0 + 8003a92: 2300 movs r3, #0 } - 8004394: 4618 mov r0, r3 - 8004396: 3714 adds r7, #20 - 8004398: 46bd mov sp, r7 - 800439a: f85d 7b04 ldr.w r7, [sp], #4 - 800439e: 4770 bx lr + 8003a94: 4618 mov r0, r3 + 8003a96: 3714 adds r7, #20 + 8003a98: 46bd mov sp, r7 + 8003a9a: f85d 7b04 ldr.w r7, [sp], #4 + 8003a9e: 4770 bx lr -080043a0 : +08003aa0 : * This parameter can be one of these values: * 1 : Host * 0 : Device */ uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx) { - 80043a0: b480 push {r7} - 80043a2: b083 sub sp, #12 - 80043a4: af00 add r7, sp, #0 - 80043a6: 6078 str r0, [r7, #4] + 8003aa0: b480 push {r7} + 8003aa2: b083 sub sp, #12 + 8003aa4: af00 add r7, sp, #0 + 8003aa6: 6078 str r0, [r7, #4] return ((USBx->GINTSTS) & 0x1U); - 80043a8: 687b ldr r3, [r7, #4] - 80043aa: 695b ldr r3, [r3, #20] - 80043ac: f003 0301 and.w r3, r3, #1 + 8003aa8: 687b ldr r3, [r7, #4] + 8003aaa: 695b ldr r3, [r3, #20] + 8003aac: f003 0301 and.w r3, r3, #1 } - 80043b0: 4618 mov r0, r3 - 80043b2: 370c adds r7, #12 - 80043b4: 46bd mov sp, r7 - 80043b6: f85d 7b04 ldr.w r7, [sp], #4 - 80043ba: 4770 bx lr + 8003ab0: 4618 mov r0, r3 + 8003ab2: 370c adds r7, #12 + 8003ab4: 46bd mov sp, r7 + 8003ab6: f85d 7b04 ldr.w r7, [sp], #4 + 8003aba: 4770 bx lr -080043bc : +08003abc : * @brief Reset the USB Core (needed after USB clock settings change) * @param USBx Selected device * @retval HAL status */ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) { - 80043bc: b480 push {r7} - 80043be: b085 sub sp, #20 - 80043c0: af00 add r7, sp, #0 - 80043c2: 6078 str r0, [r7, #4] + 8003abc: b480 push {r7} + 8003abe: b085 sub sp, #20 + 8003ac0: af00 add r7, sp, #0 + 8003ac2: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; - 80043c4: 2300 movs r3, #0 - 80043c6: 60fb str r3, [r7, #12] + 8003ac4: 2300 movs r3, #0 + 8003ac6: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; - 80043c8: 68fb ldr r3, [r7, #12] - 80043ca: 3301 adds r3, #1 - 80043cc: 60fb str r3, [r7, #12] + 8003ac8: 68fb ldr r3, [r7, #12] + 8003aca: 3301 adds r3, #1 + 8003acc: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) - 80043ce: 68fb ldr r3, [r7, #12] - 80043d0: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 - 80043d4: d901 bls.n 80043da + 8003ace: 68fb ldr r3, [r7, #12] + 8003ad0: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 + 8003ad4: d901 bls.n 8003ada { return HAL_TIMEOUT; - 80043d6: 2303 movs r3, #3 - 80043d8: e022 b.n 8004420 + 8003ad6: 2303 movs r3, #3 + 8003ad8: e022 b.n 8003b20 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); - 80043da: 687b ldr r3, [r7, #4] - 80043dc: 691b ldr r3, [r3, #16] - 80043de: 2b00 cmp r3, #0 - 80043e0: daf2 bge.n 80043c8 + 8003ada: 687b ldr r3, [r7, #4] + 8003adc: 691b ldr r3, [r3, #16] + 8003ade: 2b00 cmp r3, #0 + 8003ae0: daf2 bge.n 8003ac8 count = 10U; - 80043e2: 230a movs r3, #10 - 80043e4: 60fb str r3, [r7, #12] + 8003ae2: 230a movs r3, #10 + 8003ae4: 60fb str r3, [r7, #12] /* few cycles before setting core reset */ while (count > 0U) - 80043e6: e002 b.n 80043ee + 8003ae6: e002 b.n 8003aee { count--; - 80043e8: 68fb ldr r3, [r7, #12] - 80043ea: 3b01 subs r3, #1 - 80043ec: 60fb str r3, [r7, #12] + 8003ae8: 68fb ldr r3, [r7, #12] + 8003aea: 3b01 subs r3, #1 + 8003aec: 60fb str r3, [r7, #12] while (count > 0U) - 80043ee: 68fb ldr r3, [r7, #12] - 80043f0: 2b00 cmp r3, #0 - 80043f2: d1f9 bne.n 80043e8 + 8003aee: 68fb ldr r3, [r7, #12] + 8003af0: 2b00 cmp r3, #0 + 8003af2: d1f9 bne.n 8003ae8 } /* Core Soft Reset */ USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; - 80043f4: 687b ldr r3, [r7, #4] - 80043f6: 691b ldr r3, [r3, #16] - 80043f8: f043 0201 orr.w r2, r3, #1 - 80043fc: 687b ldr r3, [r7, #4] - 80043fe: 611a str r2, [r3, #16] + 8003af4: 687b ldr r3, [r7, #4] + 8003af6: 691b ldr r3, [r3, #16] + 8003af8: f043 0201 orr.w r2, r3, #1 + 8003afc: 687b ldr r3, [r7, #4] + 8003afe: 611a str r2, [r3, #16] do { count++; - 8004400: 68fb ldr r3, [r7, #12] - 8004402: 3301 adds r3, #1 - 8004404: 60fb str r3, [r7, #12] + 8003b00: 68fb ldr r3, [r7, #12] + 8003b02: 3301 adds r3, #1 + 8003b04: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) - 8004406: 68fb ldr r3, [r7, #12] - 8004408: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 - 800440c: d901 bls.n 8004412 + 8003b06: 68fb ldr r3, [r7, #12] + 8003b08: f1b3 6f70 cmp.w r3, #251658240 ; 0xf000000 + 8003b0c: d901 bls.n 8003b12 { return HAL_TIMEOUT; - 800440e: 2303 movs r3, #3 - 8004410: e006 b.n 8004420 + 8003b0e: 2303 movs r3, #3 + 8003b10: e006 b.n 8003b20 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); - 8004412: 687b ldr r3, [r7, #4] - 8004414: 691b ldr r3, [r3, #16] - 8004416: f003 0301 and.w r3, r3, #1 - 800441a: 2b01 cmp r3, #1 - 800441c: d0f0 beq.n 8004400 + 8003b12: 687b ldr r3, [r7, #4] + 8003b14: 691b ldr r3, [r3, #16] + 8003b16: f003 0301 and.w r3, r3, #1 + 8003b1a: 2b01 cmp r3, #1 + 8003b1c: d0f0 beq.n 8003b00 return HAL_OK; - 800441e: 2300 movs r3, #0 + 8003b1e: 2300 movs r3, #0 } - 8004420: 4618 mov r0, r3 - 8004422: 3714 adds r7, #20 - 8004424: 46bd mov sp, r7 - 8004426: f85d 7b04 ldr.w r7, [sp], #4 - 800442a: 4770 bx lr + 8003b20: 4618 mov r0, r3 + 8003b22: 3714 adds r7, #20 + 8003b24: 46bd mov sp, r7 + 8003b26: f85d 7b04 ldr.w r7, [sp], #4 + 8003b2a: 4770 bx lr -0800442c : - 800442c: 4402 add r2, r0 - 800442e: 4603 mov r3, r0 - 8004430: 4293 cmp r3, r2 - 8004432: d100 bne.n 8004436 - 8004434: 4770 bx lr - 8004436: f803 1b01 strb.w r1, [r3], #1 - 800443a: e7f9 b.n 8004430 +08003b2c : + 8003b2c: 4402 add r2, r0 + 8003b2e: 4603 mov r3, r0 + 8003b30: 4293 cmp r3, r2 + 8003b32: d100 bne.n 8003b36 + 8003b34: 4770 bx lr + 8003b36: f803 1b01 strb.w r1, [r3], #1 + 8003b3a: e7f9 b.n 8003b30 -0800443c <__libc_init_array>: - 800443c: b570 push {r4, r5, r6, lr} - 800443e: 4d0d ldr r5, [pc, #52] ; (8004474 <__libc_init_array+0x38>) - 8004440: 4c0d ldr r4, [pc, #52] ; (8004478 <__libc_init_array+0x3c>) - 8004442: 1b64 subs r4, r4, r5 - 8004444: 10a4 asrs r4, r4, #2 - 8004446: 2600 movs r6, #0 - 8004448: 42a6 cmp r6, r4 - 800444a: d109 bne.n 8004460 <__libc_init_array+0x24> - 800444c: 4d0b ldr r5, [pc, #44] ; (800447c <__libc_init_array+0x40>) - 800444e: 4c0c ldr r4, [pc, #48] ; (8004480 <__libc_init_array+0x44>) - 8004450: f000 f87e bl 8004550 <_init> - 8004454: 1b64 subs r4, r4, r5 - 8004456: 10a4 asrs r4, r4, #2 - 8004458: 2600 movs r6, #0 - 800445a: 42a6 cmp r6, r4 - 800445c: d105 bne.n 800446a <__libc_init_array+0x2e> - 800445e: bd70 pop {r4, r5, r6, pc} - 8004460: f855 3b04 ldr.w r3, [r5], #4 - 8004464: 4798 blx r3 - 8004466: 3601 adds r6, #1 - 8004468: e7ee b.n 8004448 <__libc_init_array+0xc> - 800446a: f855 3b04 ldr.w r3, [r5], #4 - 800446e: 4798 blx r3 - 8004470: 3601 adds r6, #1 - 8004472: e7f2 b.n 800445a <__libc_init_array+0x1e> - 8004474: 08004588 .word 0x08004588 - 8004478: 08004588 .word 0x08004588 - 800447c: 08004588 .word 0x08004588 - 8004480: 08004590 .word 0x08004590 +08003b3c <__libc_init_array>: + 8003b3c: b570 push {r4, r5, r6, lr} + 8003b3e: 4d0d ldr r5, [pc, #52] ; (8003b74 <__libc_init_array+0x38>) + 8003b40: 4c0d ldr r4, [pc, #52] ; (8003b78 <__libc_init_array+0x3c>) + 8003b42: 1b64 subs r4, r4, r5 + 8003b44: 10a4 asrs r4, r4, #2 + 8003b46: 2600 movs r6, #0 + 8003b48: 42a6 cmp r6, r4 + 8003b4a: d109 bne.n 8003b60 <__libc_init_array+0x24> + 8003b4c: 4d0b ldr r5, [pc, #44] ; (8003b7c <__libc_init_array+0x40>) + 8003b4e: 4c0c ldr r4, [pc, #48] ; (8003b80 <__libc_init_array+0x44>) + 8003b50: f000 f87e bl 8003c50 <_init> + 8003b54: 1b64 subs r4, r4, r5 + 8003b56: 10a4 asrs r4, r4, #2 + 8003b58: 2600 movs r6, #0 + 8003b5a: 42a6 cmp r6, r4 + 8003b5c: d105 bne.n 8003b6a <__libc_init_array+0x2e> + 8003b5e: bd70 pop {r4, r5, r6, pc} + 8003b60: f855 3b04 ldr.w r3, [r5], #4 + 8003b64: 4798 blx r3 + 8003b66: 3601 adds r6, #1 + 8003b68: e7ee b.n 8003b48 <__libc_init_array+0xc> + 8003b6a: f855 3b04 ldr.w r3, [r5], #4 + 8003b6e: 4798 blx r3 + 8003b70: 3601 adds r6, #1 + 8003b72: e7f2 b.n 8003b5a <__libc_init_array+0x1e> + 8003b74: 08003c88 .word 0x08003c88 + 8003b78: 08003c88 .word 0x08003c88 + 8003b7c: 08003c88 .word 0x08003c88 + 8003b80: 08003c90 .word 0x08003c90 -08004484 <__retarget_lock_acquire_recursive>: - 8004484: 4770 bx lr +08003b84 <__retarget_lock_acquire_recursive>: + 8003b84: 4770 bx lr -08004486 <__retarget_lock_release_recursive>: - 8004486: 4770 bx lr +08003b86 <__retarget_lock_release_recursive>: + 8003b86: 4770 bx lr -08004488 : - 8004488: 4b02 ldr r3, [pc, #8] ; (8004494 ) - 800448a: b113 cbz r3, 8004492 - 800448c: 4802 ldr r0, [pc, #8] ; (8004498 ) - 800448e: f000 b805 b.w 800449c - 8004492: 4770 bx lr - 8004494: 00000000 .word 0x00000000 - 8004498: 080044a9 .word 0x080044a9 +08003b88 : + 8003b88: 4b02 ldr r3, [pc, #8] ; (8003b94 ) + 8003b8a: b113 cbz r3, 8003b92 + 8003b8c: 4802 ldr r0, [pc, #8] ; (8003b98 ) + 8003b8e: f000 b805 b.w 8003b9c + 8003b92: 4770 bx lr + 8003b94: 00000000 .word 0x00000000 + 8003b98: 08003ba9 .word 0x08003ba9 -0800449c : - 800449c: 2300 movs r3, #0 - 800449e: 4601 mov r1, r0 - 80044a0: 461a mov r2, r3 - 80044a2: 4618 mov r0, r3 - 80044a4: f000 b814 b.w 80044d0 <__register_exitproc> +08003b9c : + 8003b9c: 2300 movs r3, #0 + 8003b9e: 4601 mov r1, r0 + 8003ba0: 461a mov r2, r3 + 8003ba2: 4618 mov r0, r3 + 8003ba4: f000 b814 b.w 8003bd0 <__register_exitproc> -080044a8 <__libc_fini_array>: - 80044a8: b538 push {r3, r4, r5, lr} - 80044aa: 4d07 ldr r5, [pc, #28] ; (80044c8 <__libc_fini_array+0x20>) - 80044ac: 4c07 ldr r4, [pc, #28] ; (80044cc <__libc_fini_array+0x24>) - 80044ae: 1b64 subs r4, r4, r5 - 80044b0: 10a4 asrs r4, r4, #2 - 80044b2: b91c cbnz r4, 80044bc <__libc_fini_array+0x14> - 80044b4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} - 80044b8: f000 b850 b.w 800455c <_fini> - 80044bc: 3c01 subs r4, #1 - 80044be: f855 3024 ldr.w r3, [r5, r4, lsl #2] - 80044c2: 4798 blx r3 - 80044c4: e7f5 b.n 80044b2 <__libc_fini_array+0xa> - 80044c6: bf00 nop - 80044c8: 08004590 .word 0x08004590 - 80044cc: 08004594 .word 0x08004594 +08003ba8 <__libc_fini_array>: + 8003ba8: b538 push {r3, r4, r5, lr} + 8003baa: 4d07 ldr r5, [pc, #28] ; (8003bc8 <__libc_fini_array+0x20>) + 8003bac: 4c07 ldr r4, [pc, #28] ; (8003bcc <__libc_fini_array+0x24>) + 8003bae: 1b64 subs r4, r4, r5 + 8003bb0: 10a4 asrs r4, r4, #2 + 8003bb2: b91c cbnz r4, 8003bbc <__libc_fini_array+0x14> + 8003bb4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 8003bb8: f000 b850 b.w 8003c5c <_fini> + 8003bbc: 3c01 subs r4, #1 + 8003bbe: f855 3024 ldr.w r3, [r5, r4, lsl #2] + 8003bc2: 4798 blx r3 + 8003bc4: e7f5 b.n 8003bb2 <__libc_fini_array+0xa> + 8003bc6: bf00 nop + 8003bc8: 08003c90 .word 0x08003c90 + 8003bcc: 08003c94 .word 0x08003c94 -080044d0 <__register_exitproc>: - 80044d0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 80044d4: f8df a074 ldr.w sl, [pc, #116] ; 800454c <__register_exitproc+0x7c> - 80044d8: 4606 mov r6, r0 - 80044da: f8da 0000 ldr.w r0, [sl] - 80044de: 4698 mov r8, r3 - 80044e0: 460f mov r7, r1 - 80044e2: 4691 mov r9, r2 - 80044e4: f7ff ffce bl 8004484 <__retarget_lock_acquire_recursive> - 80044e8: 4b16 ldr r3, [pc, #88] ; (8004544 <__register_exitproc+0x74>) - 80044ea: 681c ldr r4, [r3, #0] - 80044ec: b90c cbnz r4, 80044f2 <__register_exitproc+0x22> - 80044ee: 4c16 ldr r4, [pc, #88] ; (8004548 <__register_exitproc+0x78>) - 80044f0: 601c str r4, [r3, #0] - 80044f2: 6865 ldr r5, [r4, #4] - 80044f4: f8da 0000 ldr.w r0, [sl] - 80044f8: 2d1f cmp r5, #31 - 80044fa: dd05 ble.n 8004508 <__register_exitproc+0x38> - 80044fc: f7ff ffc3 bl 8004486 <__retarget_lock_release_recursive> - 8004500: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff - 8004504: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8004508: b19e cbz r6, 8004532 <__register_exitproc+0x62> - 800450a: eb04 0185 add.w r1, r4, r5, lsl #2 - 800450e: 2201 movs r2, #1 - 8004510: f8c1 9088 str.w r9, [r1, #136] ; 0x88 - 8004514: f8d4 3188 ldr.w r3, [r4, #392] ; 0x188 - 8004518: 40aa lsls r2, r5 - 800451a: 4313 orrs r3, r2 - 800451c: f8c4 3188 str.w r3, [r4, #392] ; 0x188 - 8004520: 2e02 cmp r6, #2 - 8004522: f8c1 8108 str.w r8, [r1, #264] ; 0x108 - 8004526: bf02 ittt eq - 8004528: f8d4 318c ldreq.w r3, [r4, #396] ; 0x18c - 800452c: 4313 orreq r3, r2 - 800452e: f8c4 318c streq.w r3, [r4, #396] ; 0x18c - 8004532: 1c6b adds r3, r5, #1 - 8004534: 3502 adds r5, #2 - 8004536: 6063 str r3, [r4, #4] - 8004538: f844 7025 str.w r7, [r4, r5, lsl #2] - 800453c: f7ff ffa3 bl 8004486 <__retarget_lock_release_recursive> - 8004540: 2000 movs r0, #0 - 8004542: e7df b.n 8004504 <__register_exitproc+0x34> - 8004544: 20001060 .word 0x20001060 - 8004548: 20001064 .word 0x20001064 - 800454c: 200006c4 .word 0x200006c4 +08003bd0 <__register_exitproc>: + 8003bd0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8003bd4: f8df a074 ldr.w sl, [pc, #116] ; 8003c4c <__register_exitproc+0x7c> + 8003bd8: 4606 mov r6, r0 + 8003bda: f8da 0000 ldr.w r0, [sl] + 8003bde: 4698 mov r8, r3 + 8003be0: 460f mov r7, r1 + 8003be2: 4691 mov r9, r2 + 8003be4: f7ff ffce bl 8003b84 <__retarget_lock_acquire_recursive> + 8003be8: 4b16 ldr r3, [pc, #88] ; (8003c44 <__register_exitproc+0x74>) + 8003bea: 681c ldr r4, [r3, #0] + 8003bec: b90c cbnz r4, 8003bf2 <__register_exitproc+0x22> + 8003bee: 4c16 ldr r4, [pc, #88] ; (8003c48 <__register_exitproc+0x78>) + 8003bf0: 601c str r4, [r3, #0] + 8003bf2: 6865 ldr r5, [r4, #4] + 8003bf4: f8da 0000 ldr.w r0, [sl] + 8003bf8: 2d1f cmp r5, #31 + 8003bfa: dd05 ble.n 8003c08 <__register_exitproc+0x38> + 8003bfc: f7ff ffc3 bl 8003b86 <__retarget_lock_release_recursive> + 8003c00: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff + 8003c04: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8003c08: b19e cbz r6, 8003c32 <__register_exitproc+0x62> + 8003c0a: eb04 0185 add.w r1, r4, r5, lsl #2 + 8003c0e: 2201 movs r2, #1 + 8003c10: f8c1 9088 str.w r9, [r1, #136] ; 0x88 + 8003c14: f8d4 3188 ldr.w r3, [r4, #392] ; 0x188 + 8003c18: 40aa lsls r2, r5 + 8003c1a: 4313 orrs r3, r2 + 8003c1c: f8c4 3188 str.w r3, [r4, #392] ; 0x188 + 8003c20: 2e02 cmp r6, #2 + 8003c22: f8c1 8108 str.w r8, [r1, #264] ; 0x108 + 8003c26: bf02 ittt eq + 8003c28: f8d4 318c ldreq.w r3, [r4, #396] ; 0x18c + 8003c2c: 4313 orreq r3, r2 + 8003c2e: f8c4 318c streq.w r3, [r4, #396] ; 0x18c + 8003c32: 1c6b adds r3, r5, #1 + 8003c34: 3502 adds r5, #2 + 8003c36: 6063 str r3, [r4, #4] + 8003c38: f844 7025 str.w r7, [r4, r5, lsl #2] + 8003c3c: f7ff ffa3 bl 8003b86 <__retarget_lock_release_recursive> + 8003c40: 2000 movs r0, #0 + 8003c42: e7df b.n 8003c04 <__register_exitproc+0x34> + 8003c44: 200010a8 .word 0x200010a8 + 8003c48: 200010ac .word 0x200010ac + 8003c4c: 200006c4 .word 0x200006c4 -08004550 <_init>: - 8004550: b5f8 push {r3, r4, r5, r6, r7, lr} - 8004552: bf00 nop - 8004554: bcf8 pop {r3, r4, r5, r6, r7} - 8004556: bc08 pop {r3} - 8004558: 469e mov lr, r3 - 800455a: 4770 bx lr +08003c50 <_init>: + 8003c50: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003c52: bf00 nop + 8003c54: bcf8 pop {r3, r4, r5, r6, r7} + 8003c56: bc08 pop {r3} + 8003c58: 469e mov lr, r3 + 8003c5a: 4770 bx lr -0800455c <_fini>: - 800455c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800455e: bf00 nop - 8004560: bcf8 pop {r3, r4, r5, r6, r7} - 8004562: bc08 pop {r3} - 8004564: 469e mov lr, r3 - 8004566: 4770 bx lr +08003c5c <_fini>: + 8003c5c: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003c5e: bf00 nop + 8003c60: bcf8 pop {r3, r4, r5, r6, r7} + 8003c62: bc08 pop {r3} + 8003c64: 469e mov lr, r3 + 8003c66: 4770 bx lr diff --git a/Debug/csprng.map b/Debug/csprng.map index d107f94..962a176 100644 --- a/Debug/csprng.map +++ b/Debug/csprng.map @@ -145,6 +145,8 @@ Discarded input sections .data 0x0000000000000000 0x0 ./Core/Src/main.o .bss 0x0000000000000000 0x0 ./Core/Src/main.o .text.csum 0x0000000000000000 0x56 ./Core/Src/main.o + .text.HAL_UART_TxCpltCallback + 0x0000000000000000 0x2c ./Core/Src/main.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_hal_msp.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_hal_msp.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_hal_msp.o @@ -195,7 +197,7 @@ Discarded input sections .text.HAL_RNG_MspDeInit 0x0000000000000000 0x34 ./Core/Src/stm32f4xx_hal_msp.o .text.HAL_UART_MspDeInit - 0x0000000000000000 0x44 ./Core/Src/stm32f4xx_hal_msp.o + 0x0000000000000000 0x68 ./Core/Src/stm32f4xx_hal_msp.o .text.HAL_PCD_MspDeInit 0x0000000000000000 0x38 ./Core/Src/stm32f4xx_hal_msp.o .debug_macro 0x0000000000000000 0xaa8 ./Core/Src/stm32f4xx_hal_msp.o @@ -239,7 +241,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x293 ./Core/Src/stm32f4xx_hal_msp.o .debug_macro 0x0000000000000000 0xba ./Core/Src/stm32f4xx_hal_msp.o .debug_macro 0x0000000000000000 0x134 ./Core/Src/stm32f4xx_hal_msp.o - .debug_macro 0x0000000000000000 0x130 ./Core/Src/stm32f4xx_hal_msp.o + .debug_macro 0x0000000000000000 0x13c ./Core/Src/stm32f4xx_hal_msp.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_it.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_it.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_it.o @@ -326,7 +328,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x293 ./Core/Src/stm32f4xx_it.o .debug_macro 0x0000000000000000 0xba ./Core/Src/stm32f4xx_it.o .debug_macro 0x0000000000000000 0x134 ./Core/Src/stm32f4xx_it.o - .debug_macro 0x0000000000000000 0x130 ./Core/Src/stm32f4xx_it.o + .debug_macro 0x0000000000000000 0x13c ./Core/Src/stm32f4xx_it.o .group 0x0000000000000000 0xc ./Core/Src/syscalls.o .group 0x0000000000000000 0xc ./Core/Src/syscalls.o .group 0x0000000000000000 0xc ./Core/Src/syscalls.o @@ -784,6 +786,8 @@ Discarded input sections .text 0x0000000000000000 0x0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .data 0x0000000000000000 0x0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .text.__NVIC_EnableIRQ + 0x0000000000000000 0x3c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_DisableIRQ 0x0000000000000000 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_GetPendingIRQ @@ -800,6 +804,8 @@ Discarded input sections 0x0000000000000000 0x6e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_SystemReset 0x0000000000000000 0x2c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .text.HAL_NVIC_EnableIRQ + 0x0000000000000000 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.HAL_NVIC_DisableIRQ 0x0000000000000000 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.HAL_NVIC_SystemReset @@ -927,6 +933,10 @@ Discarded input sections 0x0000000000000000 0x76 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .text.HAL_DMA_Start_IT 0x0000000000000000 0xb0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .text.HAL_DMA_Abort + 0x0000000000000000 0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .text.HAL_DMA_Abort_IT + 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .text.HAL_DMA_PollForTransfer 0x0000000000000000 0x1be ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .text.HAL_DMA_IRQHandler @@ -947,6 +957,13 @@ Discarded input sections 0x0000000000000000 0xf8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .rodata.flagBitshiftOffset.0 0x0000000000000000 0x8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_info 0x0000000000000000 0x8e7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_abbrev 0x0000000000000000 0x264 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_aranges + 0x0000000000000000 0x90 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_rnglists + 0x0000000000000000 0x70 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_macro 0x0000000000000000 0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_macro 0x0000000000000000 0xaa8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_macro 0x0000000000000000 0x2a7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o @@ -988,6 +1005,12 @@ Discarded input sections .debug_macro 0x0000000000000000 0x293 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_macro 0x0000000000000000 0xba ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_macro 0x0000000000000000 0x134 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_line 0x0000000000000000 0xf23 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_str 0x0000000000000000 0xd41d8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_frame 0x0000000000000000 0x250 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .ARM.attributes + 0x0000000000000000 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .group 0x0000000000000000 0xc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o @@ -2795,18 +2818,26 @@ Discarded input sections 0x0000000000000000 0xe8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_AbortReceive_IT 0x0000000000000000 0x164 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.HAL_UART_IRQHandler + 0x0000000000000000 0x554 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_TxCpltCallback 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_TxHalfCpltCallback 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.HAL_UART_RxCpltCallback + 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_RxHalfCpltCallback 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.HAL_UART_ErrorCallback + 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_AbortCpltCallback 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_AbortTransmitCpltCallback 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_AbortReceiveCpltCallback 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.HAL_UARTEx_RxEventCallback + 0x0000000000000000 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_LIN_SendBreak 0x0000000000000000 0x78 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_MultiProcessor_EnterMuteMode @@ -2837,6 +2868,8 @@ Discarded input sections 0x0000000000000000 0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.UART_EndTxTransfer 0x0000000000000000 0x50 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.UART_DMAAbortOnError + 0x0000000000000000 0x22 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.UART_DMATxAbortCallback 0x0000000000000000 0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.UART_DMARxAbortCallback @@ -2845,6 +2878,12 @@ Discarded input sections 0x0000000000000000 0x2a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.UART_DMARxOnlyAbortCallback 0x0000000000000000 0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.UART_Transmit_IT + 0x0000000000000000 0xa0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.UART_EndTransmit_IT + 0x0000000000000000 0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.UART_Receive_IT + 0x0000000000000000 0x17c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_macro 0x0000000000000000 0xaa8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_macro 0x0000000000000000 0x2a7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o @@ -3379,7 +3418,7 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. 0x0000000008000000 g_pfnVectors 0x00000000080001ac . = ALIGN (0x4) -.text 0x00000000080001ac 0x43bc +.text 0x00000000080001ac 0x3abc 0x00000000080001ac . = ALIGN (0x4) *(.text) .text 0x00000000080001ac 0x40 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o @@ -3411,439 +3450,404 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. 0x00000000080006e8 0x34 ./Core/Src/main.o 0x00000000080006e8 random_range .text.bbs 0x000000000800071c 0x250 ./Core/Src/main.o - .text.main 0x000000000800096c 0xc8 ./Core/Src/main.o + .text.main 0x000000000800096c 0xd4 ./Core/Src/main.o 0x000000000800096c main .text.SystemClock_Config - 0x0000000008000a34 0xd4 ./Core/Src/main.o - 0x0000000008000a34 SystemClock_Config + 0x0000000008000a40 0xd4 ./Core/Src/main.o + 0x0000000008000a40 SystemClock_Config .text.MX_ETH_Init - 0x0000000008000b08 0x9c ./Core/Src/main.o + 0x0000000008000b14 0x9c ./Core/Src/main.o .text.MX_RNG_Init - 0x0000000008000ba4 0x28 ./Core/Src/main.o + 0x0000000008000bb0 0x28 ./Core/Src/main.o .text.MX_USART3_UART_Init - 0x0000000008000bcc 0x54 ./Core/Src/main.o + 0x0000000008000bd8 0x54 ./Core/Src/main.o + .text.MX_USART6_UART_Init + 0x0000000008000c2c 0x54 ./Core/Src/main.o .text.MX_USB_OTG_FS_PCD_Init - 0x0000000008000c20 0x5c ./Core/Src/main.o + 0x0000000008000c80 0x5c ./Core/Src/main.o .text.MX_GPIO_Init - 0x0000000008000c7c 0x15c ./Core/Src/main.o - .text.HAL_UART_TxCpltCallback - 0x0000000008000dd8 0x2c ./Core/Src/main.o - 0x0000000008000dd8 HAL_UART_TxCpltCallback + 0x0000000008000cdc 0x15c ./Core/Src/main.o .text.Error_Handler - 0x0000000008000e04 0xa ./Core/Src/main.o - 0x0000000008000e04 Error_Handler - *fill* 0x0000000008000e0e 0x2 + 0x0000000008000e38 0xa ./Core/Src/main.o + 0x0000000008000e38 Error_Handler + *fill* 0x0000000008000e42 0x2 .text.HAL_MspInit - 0x0000000008000e10 0x50 ./Core/Src/stm32f4xx_hal_msp.o - 0x0000000008000e10 HAL_MspInit + 0x0000000008000e44 0x50 ./Core/Src/stm32f4xx_hal_msp.o + 0x0000000008000e44 HAL_MspInit .text.HAL_ETH_MspInit - 0x0000000008000e60 0x18c ./Core/Src/stm32f4xx_hal_msp.o - 0x0000000008000e60 HAL_ETH_MspInit + 0x0000000008000e94 0x18c ./Core/Src/stm32f4xx_hal_msp.o + 0x0000000008000e94 HAL_ETH_MspInit .text.HAL_RNG_MspInit - 0x0000000008000fec 0x44 ./Core/Src/stm32f4xx_hal_msp.o - 0x0000000008000fec HAL_RNG_MspInit + 0x0000000008001020 0x44 ./Core/Src/stm32f4xx_hal_msp.o + 0x0000000008001020 HAL_RNG_MspInit .text.HAL_UART_MspInit - 0x0000000008001030 0xa0 ./Core/Src/stm32f4xx_hal_msp.o - 0x0000000008001030 HAL_UART_MspInit + 0x0000000008001064 0x100 ./Core/Src/stm32f4xx_hal_msp.o + 0x0000000008001064 HAL_UART_MspInit .text.HAL_PCD_MspInit - 0x00000000080010d0 0xb4 ./Core/Src/stm32f4xx_hal_msp.o - 0x00000000080010d0 HAL_PCD_MspInit + 0x0000000008001164 0xb4 ./Core/Src/stm32f4xx_hal_msp.o + 0x0000000008001164 HAL_PCD_MspInit .text.NMI_Handler - 0x0000000008001184 0x6 ./Core/Src/stm32f4xx_it.o - 0x0000000008001184 NMI_Handler + 0x0000000008001218 0x6 ./Core/Src/stm32f4xx_it.o + 0x0000000008001218 NMI_Handler .text.HardFault_Handler - 0x000000000800118a 0x6 ./Core/Src/stm32f4xx_it.o - 0x000000000800118a HardFault_Handler + 0x000000000800121e 0x6 ./Core/Src/stm32f4xx_it.o + 0x000000000800121e HardFault_Handler .text.MemManage_Handler - 0x0000000008001190 0x6 ./Core/Src/stm32f4xx_it.o - 0x0000000008001190 MemManage_Handler + 0x0000000008001224 0x6 ./Core/Src/stm32f4xx_it.o + 0x0000000008001224 MemManage_Handler .text.BusFault_Handler - 0x0000000008001196 0x6 ./Core/Src/stm32f4xx_it.o - 0x0000000008001196 BusFault_Handler + 0x000000000800122a 0x6 ./Core/Src/stm32f4xx_it.o + 0x000000000800122a BusFault_Handler .text.UsageFault_Handler - 0x000000000800119c 0x6 ./Core/Src/stm32f4xx_it.o - 0x000000000800119c UsageFault_Handler + 0x0000000008001230 0x6 ./Core/Src/stm32f4xx_it.o + 0x0000000008001230 UsageFault_Handler .text.SVC_Handler - 0x00000000080011a2 0xe ./Core/Src/stm32f4xx_it.o - 0x00000000080011a2 SVC_Handler + 0x0000000008001236 0xe ./Core/Src/stm32f4xx_it.o + 0x0000000008001236 SVC_Handler .text.DebugMon_Handler - 0x00000000080011b0 0xe ./Core/Src/stm32f4xx_it.o - 0x00000000080011b0 DebugMon_Handler + 0x0000000008001244 0xe ./Core/Src/stm32f4xx_it.o + 0x0000000008001244 DebugMon_Handler .text.PendSV_Handler - 0x00000000080011be 0xe ./Core/Src/stm32f4xx_it.o - 0x00000000080011be PendSV_Handler + 0x0000000008001252 0xe ./Core/Src/stm32f4xx_it.o + 0x0000000008001252 PendSV_Handler .text.SysTick_Handler - 0x00000000080011cc 0xc ./Core/Src/stm32f4xx_it.o - 0x00000000080011cc SysTick_Handler - .text.USART3_IRQHandler - 0x00000000080011d8 0x14 ./Core/Src/stm32f4xx_it.o - 0x00000000080011d8 USART3_IRQHandler + 0x0000000008001260 0xc ./Core/Src/stm32f4xx_it.o + 0x0000000008001260 SysTick_Handler .text.SystemInit - 0x00000000080011ec 0x24 ./Core/Src/system_stm32f4xx.o - 0x00000000080011ec SystemInit + 0x000000000800126c 0x24 ./Core/Src/system_stm32f4xx.o + 0x000000000800126c SystemInit .text.Reset_Handler - 0x0000000008001210 0x50 ./Core/Startup/startup_stm32f439zitx.o - 0x0000000008001210 Reset_Handler + 0x0000000008001290 0x50 ./Core/Startup/startup_stm32f439zitx.o + 0x0000000008001290 Reset_Handler .text.Default_Handler - 0x0000000008001260 0x2 ./Core/Startup/startup_stm32f439zitx.o - 0x0000000008001260 RTC_Alarm_IRQHandler - 0x0000000008001260 HASH_RNG_IRQHandler - 0x0000000008001260 EXTI2_IRQHandler - 0x0000000008001260 TIM8_CC_IRQHandler - 0x0000000008001260 UART8_IRQHandler - 0x0000000008001260 SPI4_IRQHandler - 0x0000000008001260 TIM1_CC_IRQHandler - 0x0000000008001260 DMA2_Stream5_IRQHandler - 0x0000000008001260 DMA1_Stream5_IRQHandler - 0x0000000008001260 PVD_IRQHandler - 0x0000000008001260 SDIO_IRQHandler - 0x0000000008001260 TAMP_STAMP_IRQHandler - 0x0000000008001260 CAN2_RX1_IRQHandler - 0x0000000008001260 EXTI3_IRQHandler - 0x0000000008001260 TIM8_TRG_COM_TIM14_IRQHandler - 0x0000000008001260 TIM1_UP_TIM10_IRQHandler - 0x0000000008001260 TIM8_UP_TIM13_IRQHandler - 0x0000000008001260 I2C3_ER_IRQHandler - 0x0000000008001260 EXTI0_IRQHandler - 0x0000000008001260 I2C2_EV_IRQHandler - 0x0000000008001260 DMA1_Stream2_IRQHandler - 0x0000000008001260 CAN1_RX0_IRQHandler - 0x0000000008001260 FPU_IRQHandler - 0x0000000008001260 OTG_HS_WKUP_IRQHandler - 0x0000000008001260 LTDC_ER_IRQHandler - 0x0000000008001260 CAN2_SCE_IRQHandler - 0x0000000008001260 DMA2_Stream2_IRQHandler - 0x0000000008001260 SPI1_IRQHandler - 0x0000000008001260 TIM6_DAC_IRQHandler - 0x0000000008001260 TIM1_BRK_TIM9_IRQHandler - 0x0000000008001260 DCMI_IRQHandler - 0x0000000008001260 CAN2_RX0_IRQHandler - 0x0000000008001260 DMA2_Stream3_IRQHandler - 0x0000000008001260 USART6_IRQHandler - 0x0000000008001260 CRYP_IRQHandler - 0x0000000008001260 CAN1_RX1_IRQHandler - 0x0000000008001260 UART5_IRQHandler - 0x0000000008001260 DMA2_Stream0_IRQHandler - 0x0000000008001260 TIM4_IRQHandler - 0x0000000008001260 I2C1_EV_IRQHandler - 0x0000000008001260 DMA1_Stream6_IRQHandler - 0x0000000008001260 DMA1_Stream1_IRQHandler - 0x0000000008001260 UART4_IRQHandler - 0x0000000008001260 TIM3_IRQHandler - 0x0000000008001260 RCC_IRQHandler - 0x0000000008001260 TIM8_BRK_TIM12_IRQHandler - 0x0000000008001260 Default_Handler - 0x0000000008001260 EXTI15_10_IRQHandler - 0x0000000008001260 ADC_IRQHandler - 0x0000000008001260 DMA1_Stream7_IRQHandler - 0x0000000008001260 SPI5_IRQHandler - 0x0000000008001260 TIM7_IRQHandler - 0x0000000008001260 CAN2_TX_IRQHandler - 0x0000000008001260 TIM5_IRQHandler - 0x0000000008001260 DMA2_Stream7_IRQHandler - 0x0000000008001260 I2C3_EV_IRQHandler - 0x0000000008001260 EXTI9_5_IRQHandler - 0x0000000008001260 RTC_WKUP_IRQHandler - 0x0000000008001260 LTDC_IRQHandler - 0x0000000008001260 ETH_WKUP_IRQHandler - 0x0000000008001260 SPI2_IRQHandler - 0x0000000008001260 OTG_HS_EP1_IN_IRQHandler - 0x0000000008001260 DMA1_Stream0_IRQHandler - 0x0000000008001260 CAN1_TX_IRQHandler - 0x0000000008001260 EXTI4_IRQHandler - 0x0000000008001260 ETH_IRQHandler - 0x0000000008001260 OTG_HS_EP1_OUT_IRQHandler - 0x0000000008001260 WWDG_IRQHandler - 0x0000000008001260 SPI6_IRQHandler - 0x0000000008001260 TIM2_IRQHandler - 0x0000000008001260 OTG_FS_WKUP_IRQHandler - 0x0000000008001260 TIM1_TRG_COM_TIM11_IRQHandler - 0x0000000008001260 OTG_HS_IRQHandler - 0x0000000008001260 DMA2D_IRQHandler - 0x0000000008001260 EXTI1_IRQHandler - 0x0000000008001260 UART7_IRQHandler - 0x0000000008001260 USART2_IRQHandler - 0x0000000008001260 I2C2_ER_IRQHandler - 0x0000000008001260 DMA2_Stream1_IRQHandler - 0x0000000008001260 CAN1_SCE_IRQHandler - 0x0000000008001260 FLASH_IRQHandler - 0x0000000008001260 DMA2_Stream4_IRQHandler - 0x0000000008001260 USART1_IRQHandler - 0x0000000008001260 OTG_FS_IRQHandler - 0x0000000008001260 SPI3_IRQHandler - 0x0000000008001260 DMA1_Stream4_IRQHandler - 0x0000000008001260 I2C1_ER_IRQHandler - 0x0000000008001260 FMC_IRQHandler - 0x0000000008001260 DMA2_Stream6_IRQHandler - 0x0000000008001260 SAI1_IRQHandler - 0x0000000008001260 DMA1_Stream3_IRQHandler - *fill* 0x0000000008001262 0x2 + 0x00000000080012e0 0x2 ./Core/Startup/startup_stm32f439zitx.o + 0x00000000080012e0 RTC_Alarm_IRQHandler + 0x00000000080012e0 HASH_RNG_IRQHandler + 0x00000000080012e0 EXTI2_IRQHandler + 0x00000000080012e0 TIM8_CC_IRQHandler + 0x00000000080012e0 UART8_IRQHandler + 0x00000000080012e0 SPI4_IRQHandler + 0x00000000080012e0 TIM1_CC_IRQHandler + 0x00000000080012e0 DMA2_Stream5_IRQHandler + 0x00000000080012e0 DMA1_Stream5_IRQHandler + 0x00000000080012e0 PVD_IRQHandler + 0x00000000080012e0 SDIO_IRQHandler + 0x00000000080012e0 TAMP_STAMP_IRQHandler + 0x00000000080012e0 CAN2_RX1_IRQHandler + 0x00000000080012e0 EXTI3_IRQHandler + 0x00000000080012e0 TIM8_TRG_COM_TIM14_IRQHandler + 0x00000000080012e0 TIM1_UP_TIM10_IRQHandler + 0x00000000080012e0 TIM8_UP_TIM13_IRQHandler + 0x00000000080012e0 I2C3_ER_IRQHandler + 0x00000000080012e0 EXTI0_IRQHandler + 0x00000000080012e0 I2C2_EV_IRQHandler + 0x00000000080012e0 DMA1_Stream2_IRQHandler + 0x00000000080012e0 CAN1_RX0_IRQHandler + 0x00000000080012e0 FPU_IRQHandler + 0x00000000080012e0 OTG_HS_WKUP_IRQHandler + 0x00000000080012e0 LTDC_ER_IRQHandler + 0x00000000080012e0 CAN2_SCE_IRQHandler + 0x00000000080012e0 DMA2_Stream2_IRQHandler + 0x00000000080012e0 SPI1_IRQHandler + 0x00000000080012e0 TIM6_DAC_IRQHandler + 0x00000000080012e0 TIM1_BRK_TIM9_IRQHandler + 0x00000000080012e0 DCMI_IRQHandler + 0x00000000080012e0 CAN2_RX0_IRQHandler + 0x00000000080012e0 DMA2_Stream3_IRQHandler + 0x00000000080012e0 USART6_IRQHandler + 0x00000000080012e0 USART3_IRQHandler + 0x00000000080012e0 CRYP_IRQHandler + 0x00000000080012e0 CAN1_RX1_IRQHandler + 0x00000000080012e0 UART5_IRQHandler + 0x00000000080012e0 DMA2_Stream0_IRQHandler + 0x00000000080012e0 TIM4_IRQHandler + 0x00000000080012e0 I2C1_EV_IRQHandler + 0x00000000080012e0 DMA1_Stream6_IRQHandler + 0x00000000080012e0 DMA1_Stream1_IRQHandler + 0x00000000080012e0 UART4_IRQHandler + 0x00000000080012e0 TIM3_IRQHandler + 0x00000000080012e0 RCC_IRQHandler + 0x00000000080012e0 TIM8_BRK_TIM12_IRQHandler + 0x00000000080012e0 Default_Handler + 0x00000000080012e0 EXTI15_10_IRQHandler + 0x00000000080012e0 ADC_IRQHandler + 0x00000000080012e0 DMA1_Stream7_IRQHandler + 0x00000000080012e0 SPI5_IRQHandler + 0x00000000080012e0 TIM7_IRQHandler + 0x00000000080012e0 CAN2_TX_IRQHandler + 0x00000000080012e0 TIM5_IRQHandler + 0x00000000080012e0 DMA2_Stream7_IRQHandler + 0x00000000080012e0 I2C3_EV_IRQHandler + 0x00000000080012e0 EXTI9_5_IRQHandler + 0x00000000080012e0 RTC_WKUP_IRQHandler + 0x00000000080012e0 LTDC_IRQHandler + 0x00000000080012e0 ETH_WKUP_IRQHandler + 0x00000000080012e0 SPI2_IRQHandler + 0x00000000080012e0 OTG_HS_EP1_IN_IRQHandler + 0x00000000080012e0 DMA1_Stream0_IRQHandler + 0x00000000080012e0 CAN1_TX_IRQHandler + 0x00000000080012e0 EXTI4_IRQHandler + 0x00000000080012e0 ETH_IRQHandler + 0x00000000080012e0 OTG_HS_EP1_OUT_IRQHandler + 0x00000000080012e0 WWDG_IRQHandler + 0x00000000080012e0 SPI6_IRQHandler + 0x00000000080012e0 TIM2_IRQHandler + 0x00000000080012e0 OTG_FS_WKUP_IRQHandler + 0x00000000080012e0 TIM1_TRG_COM_TIM11_IRQHandler + 0x00000000080012e0 OTG_HS_IRQHandler + 0x00000000080012e0 DMA2D_IRQHandler + 0x00000000080012e0 EXTI1_IRQHandler + 0x00000000080012e0 UART7_IRQHandler + 0x00000000080012e0 USART2_IRQHandler + 0x00000000080012e0 I2C2_ER_IRQHandler + 0x00000000080012e0 DMA2_Stream1_IRQHandler + 0x00000000080012e0 CAN1_SCE_IRQHandler + 0x00000000080012e0 FLASH_IRQHandler + 0x00000000080012e0 DMA2_Stream4_IRQHandler + 0x00000000080012e0 USART1_IRQHandler + 0x00000000080012e0 OTG_FS_IRQHandler + 0x00000000080012e0 SPI3_IRQHandler + 0x00000000080012e0 DMA1_Stream4_IRQHandler + 0x00000000080012e0 I2C1_ER_IRQHandler + 0x00000000080012e0 FMC_IRQHandler + 0x00000000080012e0 DMA2_Stream6_IRQHandler + 0x00000000080012e0 SAI1_IRQHandler + 0x00000000080012e0 DMA1_Stream3_IRQHandler + *fill* 0x00000000080012e2 0x2 .text.HAL_Init - 0x0000000008001264 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008001264 HAL_Init + 0x00000000080012e4 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x00000000080012e4 HAL_Init .text.HAL_InitTick - 0x00000000080012a8 0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x00000000080012a8 HAL_InitTick + 0x0000000008001328 0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008001328 HAL_InitTick .text.HAL_IncTick - 0x0000000008001308 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008001308 HAL_IncTick + 0x0000000008001388 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008001388 HAL_IncTick .text.HAL_GetTick - 0x0000000008001330 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008001330 HAL_GetTick + 0x00000000080013b0 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x00000000080013b0 HAL_GetTick .text.HAL_Delay - 0x0000000008001348 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008001348 HAL_Delay + 0x00000000080013c8 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x00000000080013c8 HAL_Delay .text.__NVIC_SetPriorityGrouping - 0x0000000008001390 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008001410 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x00000000080013d8 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .text.__NVIC_EnableIRQ - 0x00000000080013f4 0x3c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008001458 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_SetPriority - 0x0000000008001430 0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008001474 0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.NVIC_EncodePriority - 0x0000000008001484 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - *fill* 0x00000000080014ea 0x2 + 0x00000000080014c8 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + *fill* 0x000000000800152e 0x2 .text.SysTick_Config - 0x00000000080014ec 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008001530 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x0000000008001530 0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x0000000008001530 HAL_NVIC_SetPriorityGrouping + 0x0000000008001574 0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008001574 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x0000000008001546 0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x0000000008001546 HAL_NVIC_SetPriority - .text.HAL_NVIC_EnableIRQ - 0x000000000800157e 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x000000000800157e HAL_NVIC_EnableIRQ + 0x000000000800158a 0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x000000000800158a HAL_NVIC_SetPriority .text.HAL_SYSTICK_Config - 0x000000000800159a 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x000000000800159a HAL_SYSTICK_Config - .text.HAL_DMA_Abort - 0x00000000080015b2 0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - 0x00000000080015b2 HAL_DMA_Abort - .text.HAL_DMA_Abort_IT - 0x0000000008001692 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - 0x0000000008001692 HAL_DMA_Abort_IT - *fill* 0x00000000080016d6 0x2 + 0x00000000080015c2 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x00000000080015c2 HAL_SYSTICK_Config + *fill* 0x00000000080015da 0x2 .text.HAL_ETH_Init - 0x00000000080016d8 0x138 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o - 0x00000000080016d8 HAL_ETH_Init + 0x00000000080015dc 0x138 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x00000000080015dc HAL_ETH_Init .text.ETH_SetMACConfig - 0x0000000008001810 0x168 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x0000000008001714 0x168 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .text.ETH_SetDMAConfig - 0x0000000008001978 0x114 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x000000000800187c 0x114 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .text.ETH_MACDMAConfig - 0x0000000008001a8c 0xea ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o - *fill* 0x0000000008001b76 0x2 + 0x0000000008001990 0xea ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + *fill* 0x0000000008001a7a 0x2 .text.ETH_MACAddressConfig - 0x0000000008001b78 0x70 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x0000000008001a7c 0x70 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .text.ETH_DMATxDescListInit - 0x0000000008001be8 0xb2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x0000000008001aec 0xb2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .text.ETH_DMARxDescListInit - 0x0000000008001c9a 0xde ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x0000000008001b9e 0xde ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .text.HAL_GPIO_Init - 0x0000000008001d78 0x358 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x0000000008001d78 HAL_GPIO_Init + 0x0000000008001c7c 0x358 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000008001c7c HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x00000000080020d0 0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x00000000080020d0 HAL_GPIO_WritePin + 0x0000000008001fd4 0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000008001fd4 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x0000000008002102 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x0000000008002102 HAL_GPIO_TogglePin + 0x0000000008002006 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000008002006 HAL_GPIO_TogglePin .text.HAL_PCD_Init - 0x0000000008002136 0x21e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o - 0x0000000008002136 HAL_PCD_Init + 0x000000000800203a 0x21e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + 0x000000000800203a HAL_PCD_Init .text.HAL_RCC_OscConfig - 0x0000000008002354 0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008002354 HAL_RCC_OscConfig + 0x0000000008002258 0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008002258 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x0000000008002844 0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008002844 HAL_RCC_ClockConfig + 0x0000000008002748 0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008002748 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x0000000008002a10 0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008002a10 HAL_RCC_GetSysClockFreq + 0x0000000008002914 0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008002914 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x0000000008002c1c 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008002c1c HAL_RCC_GetHCLKFreq + 0x0000000008002b20 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008002b20 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x0000000008002c34 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008002c34 HAL_RCC_GetPCLK1Freq + 0x0000000008002b38 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008002b38 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x0000000008002c5c 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008002c5c HAL_RCC_GetPCLK2Freq + 0x0000000008002b60 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008002b60 HAL_RCC_GetPCLK2Freq .text.HAL_RNG_Init - 0x0000000008002c84 0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o - 0x0000000008002c84 HAL_RNG_Init + 0x0000000008002b88 0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + 0x0000000008002b88 HAL_RNG_Init .text.HAL_UART_Init - 0x0000000008002cd8 0xa0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008002cd8 HAL_UART_Init + 0x0000000008002bdc 0xa0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x0000000008002bdc HAL_UART_Init .text.HAL_UART_Transmit - 0x0000000008002d78 0x116 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008002d78 HAL_UART_Transmit + 0x0000000008002c7c 0x116 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x0000000008002c7c HAL_UART_Transmit .text.HAL_UART_Receive - 0x0000000008002e8e 0x12e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008002e8e HAL_UART_Receive - .text.HAL_UART_IRQHandler - 0x0000000008002fbc 0x554 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008002fbc HAL_UART_IRQHandler - .text.HAL_UART_RxCpltCallback - 0x0000000008003510 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008003510 HAL_UART_RxCpltCallback - .text.HAL_UART_ErrorCallback - 0x0000000008003524 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008003524 HAL_UART_ErrorCallback - .text.HAL_UARTEx_RxEventCallback - 0x0000000008003538 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008003538 HAL_UARTEx_RxEventCallback + 0x0000000008002d92 0x12e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x0000000008002d92 HAL_UART_Receive .text.UART_WaitOnFlagUntilTimeout - 0x0000000008003550 0xb2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x0000000008002ec0 0xb2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.UART_EndRxTransfer - 0x0000000008003602 0xc6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .text.UART_DMAAbortOnError - 0x00000000080036c8 0x22 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .text.UART_Transmit_IT - 0x00000000080036ea 0xa0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .text.UART_EndTransmit_IT - 0x000000000800378a 0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .text.UART_Receive_IT - 0x00000000080037ba 0x17c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - *fill* 0x0000000008003936 0x2 + 0x0000000008002f72 0xc6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.UART_SetConfig - 0x0000000008003938 0x4e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x0000000008003038 0x4e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.USB_CoreInit - 0x0000000008003e20 0xc8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x0000000008003e20 USB_CoreInit + 0x0000000008003520 0xc8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x0000000008003520 USB_CoreInit .text.USB_DisableGlobalInt - 0x0000000008003ee8 0x22 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x0000000008003ee8 USB_DisableGlobalInt + 0x00000000080035e8 0x22 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x00000000080035e8 USB_DisableGlobalInt .text.USB_SetCurrentMode - 0x0000000008003f0a 0x98 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x0000000008003f0a USB_SetCurrentMode - *fill* 0x0000000008003fa2 0x2 + 0x000000000800360a 0x98 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x000000000800360a USB_SetCurrentMode + *fill* 0x00000000080036a2 0x2 .text.USB_DevInit - 0x0000000008003fa4 0x2c8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x0000000008003fa4 USB_DevInit + 0x00000000080036a4 0x2c8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x00000000080036a4 USB_DevInit .text.USB_FlushTxFifo - 0x000000000800426c 0x64 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x000000000800426c USB_FlushTxFifo + 0x000000000800396c 0x64 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x000000000800396c USB_FlushTxFifo .text.USB_FlushRxFifo - 0x00000000080042d0 0x5c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x00000000080042d0 USB_FlushRxFifo + 0x00000000080039d0 0x5c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x00000000080039d0 USB_FlushRxFifo .text.USB_SetDevSpeed - 0x000000000800432c 0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x000000000800432c USB_SetDevSpeed + 0x0000000008003a2c 0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x0000000008003a2c USB_SetDevSpeed .text.USB_DevDisconnect - 0x000000000800435e 0x42 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x000000000800435e USB_DevDisconnect + 0x0000000008003a5e 0x42 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x0000000008003a5e USB_DevDisconnect .text.USB_GetMode - 0x00000000080043a0 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - 0x00000000080043a0 USB_GetMode + 0x0000000008003aa0 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x0000000008003aa0 USB_GetMode .text.USB_CoreReset - 0x00000000080043bc 0x70 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - .text.memset 0x000000000800442c 0x10 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-memset.o) - 0x000000000800442c memset + 0x0000000008003abc 0x70 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + .text.memset 0x0000000008003b2c 0x10 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-memset.o) + 0x0000000008003b2c memset .text.__libc_init_array - 0x000000000800443c 0x48 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-init.o) - 0x000000000800443c __libc_init_array + 0x0000000008003b3c 0x48 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-init.o) + 0x0000000008003b3c __libc_init_array .text.__retarget_lock_acquire_recursive - 0x0000000008004484 0x2 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) - 0x0000000008004484 __retarget_lock_acquire_recursive + 0x0000000008003b84 0x2 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) + 0x0000000008003b84 __retarget_lock_acquire_recursive .text.__retarget_lock_release_recursive - 0x0000000008004486 0x2 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) - 0x0000000008004486 __retarget_lock_release_recursive + 0x0000000008003b86 0x2 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) + 0x0000000008003b86 __retarget_lock_release_recursive .text.startup.register_fini - 0x0000000008004488 0x14 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) - .text.atexit 0x000000000800449c 0xc /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-atexit.o) - 0x000000000800449c atexit + 0x0000000008003b88 0x14 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) + .text.atexit 0x0000000008003b9c 0xc /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-atexit.o) + 0x0000000008003b9c atexit .text.__libc_fini_array - 0x00000000080044a8 0x28 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-fini.o) - 0x00000000080044a8 __libc_fini_array + 0x0000000008003ba8 0x28 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-fini.o) + 0x0000000008003ba8 __libc_fini_array .text.__register_exitproc - 0x00000000080044d0 0x80 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) - 0x00000000080044d0 __register_exitproc + 0x0000000008003bd0 0x80 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) + 0x0000000008003bd0 __register_exitproc *(.glue_7) - .glue_7 0x0000000008004550 0x0 linker stubs + .glue_7 0x0000000008003c50 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0000000008004550 0x0 linker stubs + .glue_7t 0x0000000008003c50 0x0 linker stubs *(.eh_frame) - .eh_frame 0x0000000008004550 0x0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .eh_frame 0x0000000008003c50 0x0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x0000000008004550 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o - 0x0000000008004550 _init - .init 0x0000000008004554 0x8 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x0000000008003c50 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o + 0x0000000008003c50 _init + .init 0x0000000008003c54 0x8 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x000000000800455c 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o - 0x000000000800455c _fini - .fini 0x0000000008004560 0x8 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o - 0x0000000008004568 . = ALIGN (0x4) - 0x0000000008004568 _etext = . + .fini 0x0000000008003c5c 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o + 0x0000000008003c5c _fini + .fini 0x0000000008003c60 0x8 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x0000000008003c68 . = ALIGN (0x4) + 0x0000000008003c68 _etext = . -.vfp11_veneer 0x0000000008004568 0x0 - .vfp11_veneer 0x0000000008004568 0x0 linker stubs +.vfp11_veneer 0x0000000008003c68 0x0 + .vfp11_veneer 0x0000000008003c68 0x0 linker stubs -.v4_bx 0x0000000008004568 0x0 - .v4_bx 0x0000000008004568 0x0 linker stubs +.v4_bx 0x0000000008003c68 0x0 + .v4_bx 0x0000000008003c68 0x0 linker stubs -.iplt 0x0000000008004568 0x0 - .iplt 0x0000000008004568 0x0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x0000000008003c68 0x0 + .iplt 0x0000000008003c68 0x0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x0000000008004568 0x18 - 0x0000000008004568 . = ALIGN (0x4) +.rodata 0x0000000008003c68 0x18 + 0x0000000008003c68 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.AHBPrescTable - 0x0000000008004568 0x10 ./Core/Src/system_stm32f4xx.o - 0x0000000008004568 AHBPrescTable + 0x0000000008003c68 0x10 ./Core/Src/system_stm32f4xx.o + 0x0000000008003c68 AHBPrescTable .rodata.APBPrescTable - 0x0000000008004578 0x8 ./Core/Src/system_stm32f4xx.o - 0x0000000008004578 APBPrescTable - 0x0000000008004580 . = ALIGN (0x4) + 0x0000000008003c78 0x8 ./Core/Src/system_stm32f4xx.o + 0x0000000008003c78 APBPrescTable + 0x0000000008003c80 . = ALIGN (0x4) -.ARM.extab 0x0000000008004580 0x0 - 0x0000000008004580 . = ALIGN (0x4) +.ARM.extab 0x0000000008003c80 0x0 + 0x0000000008003c80 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x0000000008004580 . = ALIGN (0x4) + 0x0000000008003c80 . = ALIGN (0x4) -.ARM 0x0000000008004580 0x8 - 0x0000000008004580 . = ALIGN (0x4) - 0x0000000008004580 __exidx_start = . +.ARM 0x0000000008003c80 0x8 + 0x0000000008003c80 . = ALIGN (0x4) + 0x0000000008003c80 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0000000008004580 0x8 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - 0x0000000008004588 __exidx_end = . - 0x0000000008004588 . = ALIGN (0x4) + .ARM.exidx 0x0000000008003c80 0x8 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x0000000008003c88 __exidx_end = . + 0x0000000008003c88 . = ALIGN (0x4) -.preinit_array 0x0000000008004588 0x0 - 0x0000000008004588 . = ALIGN (0x4) - 0x0000000008004588 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0000000008003c88 0x0 + 0x0000000008003c88 . = ALIGN (0x4) + 0x0000000008003c88 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0000000008004588 PROVIDE (__preinit_array_end = .) - 0x0000000008004588 . = ALIGN (0x4) + 0x0000000008003c88 PROVIDE (__preinit_array_end = .) + 0x0000000008003c88 . = ALIGN (0x4) -.init_array 0x0000000008004588 0x8 - 0x0000000008004588 . = ALIGN (0x4) - 0x0000000008004588 PROVIDE (__init_array_start = .) +.init_array 0x0000000008003c88 0x8 + 0x0000000008003c88 . = ALIGN (0x4) + 0x0000000008003c88 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) .init_array.00000 - 0x0000000008004588 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) + 0x0000000008003c88 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) *(.init_array*) - .init_array 0x000000000800458c 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x0000000008004590 PROVIDE (__init_array_end = .) - 0x0000000008004590 . = ALIGN (0x4) + .init_array 0x0000000008003c8c 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x0000000008003c90 PROVIDE (__init_array_end = .) + 0x0000000008003c90 . = ALIGN (0x4) -.fini_array 0x0000000008004590 0x4 - 0x0000000008004590 . = ALIGN (0x4) - 0x0000000008004590 PROVIDE (__fini_array_start = .) +.fini_array 0x0000000008003c90 0x4 + 0x0000000008003c90 . = ALIGN (0x4) + 0x0000000008003c90 PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0000000008004590 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x0000000008004594 PROVIDE (__fini_array_end = .) - 0x0000000008004594 . = ALIGN (0x4) - 0x0000000008004594 _sidata = LOADADDR (.data) + .fini_array 0x0000000008003c90 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x0000000008003c94 PROVIDE (__fini_array_end = .) + 0x0000000008003c94 . = ALIGN (0x4) + 0x0000000008003c94 _sidata = LOADADDR (.data) -.rel.dyn 0x0000000008004594 0x0 - .rel.iplt 0x0000000008004594 0x0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x0000000008003c94 0x0 + .rel.iplt 0x0000000008003c94 0x0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.data 0x0000000020000000 0x6c8 load address 0x0000000008004594 +.data 0x0000000020000000 0x6c8 load address 0x0000000008003c94 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -3867,12 +3871,12 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. *(.RamFunc*) 0x00000000200006c8 . = ALIGN (0x4) 0x00000000200006c8 _edata = . - 0x0000000008004c5c _siccmram = LOADADDR (.ccmram) + 0x000000000800435c _siccmram = LOADADDR (.ccmram) -.igot.plt 0x00000000200006c8 0x0 load address 0x0000000008004c5c +.igot.plt 0x00000000200006c8 0x0 load address 0x000000000800435c .igot.plt 0x00000000200006c8 0x0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.ccmram 0x0000000010000000 0x0 load address 0x0000000008004c5c +.ccmram 0x0000000010000000 0x0 load address 0x000000000800435c 0x0000000010000000 . = ALIGN (0x4) 0x0000000010000000 _sccmram = . *(.ccmram) @@ -3881,7 +3885,7 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. 0x0000000010000000 _eccmram = . 0x0000000010000000 . = ALIGN (0x4) -.bss 0x00000000200006c8 0xb2c +.bss 0x00000000200006c8 0xb74 0x00000000200006c8 _sbss = . 0x00000000200006c8 __bss_start__ = _sbss *(.bss) @@ -3904,39 +3908,41 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. 0x0000000020000b14 hrng .bss.huart3 0x0000000020000b24 0x48 ./Core/Src/main.o 0x0000000020000b24 huart3 + .bss.huart6 0x0000000020000b6c 0x48 ./Core/Src/main.o + 0x0000000020000b6c huart6 .bss.hpcd_USB_OTG_FS - 0x0000000020000b6c 0x4e4 ./Core/Src/main.o - 0x0000000020000b6c hpcd_USB_OTG_FS + 0x0000000020000bb4 0x4e4 ./Core/Src/main.o + 0x0000000020000bb4 hpcd_USB_OTG_FS .bss.MACAddr.0 - 0x0000000020001050 0x6 ./Core/Src/main.o - *fill* 0x0000000020001056 0x2 - .bss.uwTick 0x0000000020001058 0x4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000020001058 uwTick + 0x0000000020001098 0x6 ./Core/Src/main.o + *fill* 0x000000002000109e 0x2 + .bss.uwTick 0x00000000200010a0 0x4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x00000000200010a0 uwTick .bss.__lock___atexit_recursive_mutex - 0x000000002000105c 0x1 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) - 0x000000002000105c __lock___atexit_recursive_mutex - *fill* 0x000000002000105d 0x3 - .bss.__atexit 0x0000000020001060 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) - 0x0000000020001060 __atexit + 0x00000000200010a4 0x1 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) + 0x00000000200010a4 __lock___atexit_recursive_mutex + *fill* 0x00000000200010a5 0x3 + .bss.__atexit 0x00000000200010a8 0x4 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) + 0x00000000200010a8 __atexit .bss.__atexit0 - 0x0000000020001064 0x190 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) - 0x0000000020001064 __atexit0 + 0x00000000200010ac 0x190 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) + 0x00000000200010ac __atexit0 *(COMMON) - 0x00000000200011f4 . = ALIGN (0x4) - 0x00000000200011f4 _ebss = . - 0x00000000200011f4 __bss_end__ = _ebss + 0x000000002000123c . = ALIGN (0x4) + 0x000000002000123c _ebss = . + 0x000000002000123c __bss_end__ = _ebss ._user_heap_stack - 0x00000000200011f4 0x604 - 0x00000000200011f8 . = ALIGN (0x8) - *fill* 0x00000000200011f4 0x4 + 0x000000002000123c 0x604 + 0x0000000020001240 . = ALIGN (0x8) + *fill* 0x000000002000123c 0x4 [!provide] PROVIDE (end = .) - 0x00000000200011f8 PROVIDE (_end = .) - 0x00000000200013f8 . = (. + _Min_Heap_Size) - *fill* 0x00000000200011f8 0x200 - 0x00000000200017f8 . = (. + _Min_Stack_Size) - *fill* 0x00000000200013f8 0x400 - 0x00000000200017f8 . = ALIGN (0x8) + 0x0000000020001240 PROVIDE (_end = .) + 0x0000000020001440 . = (. + _Min_Heap_Size) + *fill* 0x0000000020001240 0x200 + 0x0000000020001840 . = (. + _Min_Stack_Size) + *fill* 0x0000000020001440 0x400 + 0x0000000020001840 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -3965,45 +3971,43 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. .ARM.attributes 0x0000000000000177 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .ARM.attributes - 0x00000000000001ab 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + 0x00000000000001ab 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .ARM.attributes - 0x00000000000001df 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x00000000000001df 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .ARM.attributes - 0x0000000000000213 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000000000213 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o .ARM.attributes - 0x0000000000000247 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + 0x0000000000000247 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o .ARM.attributes - 0x000000000000027b 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x000000000000027b 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o .ARM.attributes - 0x00000000000002af 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + 0x00000000000002af 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .ARM.attributes - 0x00000000000002e3 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x00000000000002e3 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o .ARM.attributes - 0x0000000000000317 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x0000000000000317 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-memset.o) .ARM.attributes - 0x000000000000034b 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-memset.o) + 0x000000000000034b 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-init.o) .ARM.attributes - 0x000000000000037f 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-init.o) + 0x000000000000037f 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) .ARM.attributes - 0x00000000000003b3 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) + 0x00000000000003b3 0x17 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-strlen.o) .ARM.attributes - 0x00000000000003e7 0x17 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-strlen.o) + 0x00000000000003ca 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) .ARM.attributes - 0x00000000000003fe 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) + 0x00000000000003fe 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-atexit.o) .ARM.attributes - 0x0000000000000432 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-atexit.o) + 0x0000000000000432 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-fini.o) .ARM.attributes - 0x0000000000000466 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-fini.o) + 0x0000000000000466 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) .ARM.attributes - 0x000000000000049a 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) + 0x000000000000049a 0x1e /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) .ARM.attributes - 0x00000000000004ce 0x1e /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + 0x00000000000004b8 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .ARM.attributes - 0x00000000000004ec 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x00000000000004ec 0x1e /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) .ARM.attributes - 0x0000000000000520 0x1e /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) - .ARM.attributes - 0x000000000000053e 0x1e /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x000000000000050a 0x1e /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o OUTPUT(csprng.elf elf32-littlearm) LOAD linker stubs LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a @@ -4019,7 +4023,6 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. .comment 0x0000000000000043 0x44 ./Core/Src/system_stm32f4xx.o .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o @@ -4028,47 +4031,45 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o -.debug_info 0x0000000000000000 0xfc88 - .debug_info 0x0000000000000000 0x20f2 ./Core/Src/main.o - .debug_info 0x00000000000020f2 0x1b70 ./Core/Src/stm32f4xx_hal_msp.o - .debug_info 0x0000000000003c62 0x639 ./Core/Src/stm32f4xx_it.o - .debug_info 0x000000000000429b 0x52e ./Core/Src/system_stm32f4xx.o - .debug_info 0x00000000000047c9 0x23 ./Core/Startup/startup_stm32f439zitx.o - .debug_info 0x00000000000047ec 0x9c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_info 0x00000000000051ac 0xdc8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_info 0x0000000000005f74 0x8e7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - .debug_info 0x000000000000685b 0x2193 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o - .debug_info 0x00000000000089ee 0x6db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_info 0x00000000000090c9 0x156f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o - .debug_info 0x000000000000a638 0x8db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_info 0x000000000000af13 0x493 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o - .debug_info 0x000000000000b3a6 0x2f4f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_info 0x000000000000e2f5 0x1993 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o +.debug_info 0x0000000000000000 0xec80 + .debug_info 0x0000000000000000 0x216c ./Core/Src/main.o + .debug_info 0x000000000000216c 0x18fc ./Core/Src/stm32f4xx_hal_msp.o + .debug_info 0x0000000000003a68 0x112 ./Core/Src/stm32f4xx_it.o + .debug_info 0x0000000000003b7a 0x52e ./Core/Src/system_stm32f4xx.o + .debug_info 0x00000000000040a8 0x23 ./Core/Startup/startup_stm32f439zitx.o + .debug_info 0x00000000000040cb 0x9c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_info 0x0000000000004a8b 0xdc8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_info 0x0000000000005853 0x2193 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + .debug_info 0x00000000000079e6 0x6db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_info 0x00000000000080c1 0x156f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + .debug_info 0x0000000000009630 0x8db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_info 0x0000000000009f0b 0x493 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + .debug_info 0x000000000000a39e 0x2f4f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .debug_info 0x000000000000d2ed 0x1993 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o -.debug_abbrev 0x0000000000000000 0x22ce - .debug_abbrev 0x0000000000000000 0x3e4 ./Core/Src/main.o - .debug_abbrev 0x00000000000003e4 0x28f ./Core/Src/stm32f4xx_hal_msp.o - .debug_abbrev 0x0000000000000673 0x175 ./Core/Src/stm32f4xx_it.o - .debug_abbrev 0x00000000000007e8 0x11a ./Core/Src/system_stm32f4xx.o - .debug_abbrev 0x0000000000000902 0x12 ./Core/Startup/startup_stm32f439zitx.o - .debug_abbrev 0x0000000000000914 0x214 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_abbrev 0x0000000000000b28 0x31d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_abbrev 0x0000000000000e45 0x264 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - .debug_abbrev 0x00000000000010a9 0x35c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o - .debug_abbrev 0x0000000000001405 0x1d4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_abbrev 0x00000000000015d9 0x2b9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o - .debug_abbrev 0x0000000000001892 0x2b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_abbrev 0x0000000000001b49 0x1c4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o - .debug_abbrev 0x0000000000001d0d 0x30e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_abbrev 0x000000000000201b 0x2b3 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o +.debug_abbrev 0x0000000000000000 0x1f5a + .debug_abbrev 0x0000000000000000 0x3f5 ./Core/Src/main.o + .debug_abbrev 0x00000000000003f5 0x270 ./Core/Src/stm32f4xx_hal_msp.o + .debug_abbrev 0x0000000000000665 0x73 ./Core/Src/stm32f4xx_it.o + .debug_abbrev 0x00000000000006d8 0x11a ./Core/Src/system_stm32f4xx.o + .debug_abbrev 0x00000000000007f2 0x12 ./Core/Startup/startup_stm32f439zitx.o + .debug_abbrev 0x0000000000000804 0x214 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_abbrev 0x0000000000000a18 0x31d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_abbrev 0x0000000000000d35 0x35c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + .debug_abbrev 0x0000000000001091 0x1d4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_abbrev 0x0000000000001265 0x2b9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + .debug_abbrev 0x000000000000151e 0x2b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_abbrev 0x00000000000017d5 0x1c4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + .debug_abbrev 0x0000000000001999 0x30e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .debug_abbrev 0x0000000000001ca7 0x2b3 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o -.debug_aranges 0x0000000000000000 0xcc0 +.debug_aranges 0x0000000000000000 0xc30 .debug_aranges - 0x0000000000000000 0xa8 ./Core/Src/main.o + 0x0000000000000000 0xb0 ./Core/Src/main.o .debug_aranges - 0x00000000000000a8 0x60 ./Core/Src/stm32f4xx_hal_msp.o + 0x00000000000000b0 0x60 ./Core/Src/stm32f4xx_hal_msp.o .debug_aranges - 0x0000000000000108 0x68 ./Core/Src/stm32f4xx_it.o + 0x0000000000000110 0x60 ./Core/Src/stm32f4xx_it.o .debug_aranges 0x0000000000000170 0x28 ./Core/Src/system_stm32f4xx.o .debug_aranges @@ -4078,30 +4079,28 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. .debug_aranges 0x00000000000002c0 0x130 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .debug_aranges - 0x00000000000003f0 0x90 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + 0x00000000000003f0 0x1e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .debug_aranges - 0x0000000000000480 0x1e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x00000000000005d8 0x58 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .debug_aranges - 0x0000000000000668 0x58 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000000000630 0x148 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o .debug_aranges - 0x00000000000006c0 0x148 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + 0x0000000000000778 0x88 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o .debug_aranges - 0x0000000000000808 0x88 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000000000800 0x88 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o .debug_aranges - 0x0000000000000890 0x88 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + 0x0000000000000888 0x208 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_aranges - 0x0000000000000918 0x208 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_aranges - 0x0000000000000b20 0x1a0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x0000000000000a90 0x1a0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o .debug_rnglists - 0x0000000000000000 0x9d3 + 0x0000000000000000 0x963 .debug_rnglists - 0x0000000000000000 0x7f ./Core/Src/main.o + 0x0000000000000000 0x85 ./Core/Src/main.o .debug_rnglists - 0x000000000000007f 0x46 ./Core/Src/stm32f4xx_hal_msp.o + 0x0000000000000085 0x46 ./Core/Src/stm32f4xx_hal_msp.o .debug_rnglists - 0x00000000000000c5 0x49 ./Core/Src/stm32f4xx_it.o + 0x00000000000000cb 0x43 ./Core/Src/stm32f4xx_it.o .debug_rnglists 0x000000000000010e 0x1a ./Core/Src/system_stm32f4xx.o .debug_rnglists @@ -4111,23 +4110,21 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. .debug_rnglists 0x00000000000001fc 0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .debug_rnglists - 0x00000000000002dc 0x70 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + 0x00000000000002dc 0x182 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o .debug_rnglists - 0x000000000000034c 0x182 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + 0x000000000000045e 0x3f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .debug_rnglists - 0x00000000000004ce 0x3f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x000000000000049d 0xfa ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o .debug_rnglists - 0x000000000000050d 0xfa ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + 0x0000000000000597 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o .debug_rnglists - 0x0000000000000607 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x00000000000005fd 0x63 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o .debug_rnglists - 0x000000000000066d 0x63 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + 0x0000000000000660 0x1bc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_rnglists - 0x00000000000006d0 0x1bc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_rnglists - 0x000000000000088c 0x147 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + 0x000000000000081c 0x147 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o -.debug_macro 0x0000000000000000 0x24751 +.debug_macro 0x0000000000000000 0x24565 .debug_macro 0x0000000000000000 0x2fd ./Core/Src/main.o .debug_macro 0x00000000000002fd 0xaa8 ./Core/Src/main.o .debug_macro 0x0000000000000da5 0x2a7 ./Core/Src/main.o @@ -4170,112 +4167,107 @@ LOAD /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools. .debug_macro 0x0000000000021e91 0x293 ./Core/Src/main.o .debug_macro 0x0000000000022124 0xba ./Core/Src/main.o .debug_macro 0x00000000000221de 0x134 ./Core/Src/main.o - .debug_macro 0x0000000000022312 0x130 ./Core/Src/main.o - .debug_macro 0x0000000000022442 0x74 ./Core/Src/main.o - .debug_macro 0x00000000000224b6 0x2a ./Core/Src/main.o - .debug_macro 0x00000000000224e0 0x3c ./Core/Src/main.o - .debug_macro 0x000000000002251c 0x34 ./Core/Src/main.o - .debug_macro 0x0000000000022550 0x16 ./Core/Src/main.o - .debug_macro 0x0000000000022566 0x43 ./Core/Src/main.o - .debug_macro 0x00000000000225a9 0x34 ./Core/Src/main.o - .debug_macro 0x00000000000225dd 0x10 ./Core/Src/main.o - .debug_macro 0x00000000000225ed 0x58 ./Core/Src/main.o - .debug_macro 0x0000000000022645 0x1de ./Core/Src/main.o - .debug_macro 0x0000000000022823 0x369 ./Core/Src/main.o - .debug_macro 0x0000000000022b8c 0x10 ./Core/Src/main.o - .debug_macro 0x0000000000022b9c 0x35 ./Core/Src/main.o - .debug_macro 0x0000000000022bd1 0x20 ./Core/Src/main.o - .debug_macro 0x0000000000022bf1 0x1c ./Core/Src/main.o - .debug_macro 0x0000000000022c0d 0x16 ./Core/Src/main.o - .debug_macro 0x0000000000022c23 0x16 ./Core/Src/main.o - .debug_macro 0x0000000000022c39 0x29 ./Core/Src/main.o - .debug_macro 0x0000000000022c62 0x201 ./Core/Src/stm32f4xx_hal_msp.o - .debug_macro 0x0000000000022e63 0x20b ./Core/Src/stm32f4xx_it.o - .debug_macro 0x000000000002306e 0x1f2 ./Core/Src/system_stm32f4xx.o - .debug_macro 0x0000000000023260 0x252 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_macro 0x00000000000234b2 0x1f2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_macro 0x00000000000236a4 0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - .debug_macro 0x000000000002389c 0x2cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o - .debug_macro 0x0000000000023b68 0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_macro 0x0000000000023d60 0x1fe ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o - .debug_macro 0x0000000000023f5e 0x216 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_macro 0x0000000000024174 0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o - .debug_macro 0x000000000002436c 0x1f3 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_macro 0x000000000002455f 0x1f2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + .debug_macro 0x0000000000022312 0x13c ./Core/Src/main.o + .debug_macro 0x000000000002244e 0x74 ./Core/Src/main.o + .debug_macro 0x00000000000224c2 0x2a ./Core/Src/main.o + .debug_macro 0x00000000000224ec 0x3c ./Core/Src/main.o + .debug_macro 0x0000000000022528 0x34 ./Core/Src/main.o + .debug_macro 0x000000000002255c 0x16 ./Core/Src/main.o + .debug_macro 0x0000000000022572 0x43 ./Core/Src/main.o + .debug_macro 0x00000000000225b5 0x34 ./Core/Src/main.o + .debug_macro 0x00000000000225e9 0x10 ./Core/Src/main.o + .debug_macro 0x00000000000225f9 0x58 ./Core/Src/main.o + .debug_macro 0x0000000000022651 0x1de ./Core/Src/main.o + .debug_macro 0x000000000002282f 0x369 ./Core/Src/main.o + .debug_macro 0x0000000000022b98 0x10 ./Core/Src/main.o + .debug_macro 0x0000000000022ba8 0x35 ./Core/Src/main.o + .debug_macro 0x0000000000022bdd 0x20 ./Core/Src/main.o + .debug_macro 0x0000000000022bfd 0x1c ./Core/Src/main.o + .debug_macro 0x0000000000022c19 0x16 ./Core/Src/main.o + .debug_macro 0x0000000000022c2f 0x16 ./Core/Src/main.o + .debug_macro 0x0000000000022c45 0x29 ./Core/Src/main.o + .debug_macro 0x0000000000022c6e 0x201 ./Core/Src/stm32f4xx_hal_msp.o + .debug_macro 0x0000000000022e6f 0x20b ./Core/Src/stm32f4xx_it.o + .debug_macro 0x000000000002307a 0x1f2 ./Core/Src/system_stm32f4xx.o + .debug_macro 0x000000000002326c 0x252 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_macro 0x00000000000234be 0x1f2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_macro 0x00000000000236b0 0x2cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + .debug_macro 0x000000000002397c 0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_macro 0x0000000000023b74 0x1fe ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + .debug_macro 0x0000000000023d72 0x216 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_macro 0x0000000000023f88 0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + .debug_macro 0x0000000000024180 0x1f3 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .debug_macro 0x0000000000024373 0x1f2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o -.debug_line 0x0000000000000000 0xddc7 - .debug_line 0x0000000000000000 0xc01 ./Core/Src/main.o - .debug_line 0x0000000000000c01 0x842 ./Core/Src/stm32f4xx_hal_msp.o - .debug_line 0x0000000000001443 0x7b2 ./Core/Src/stm32f4xx_it.o - .debug_line 0x0000000000001bf5 0x74a ./Core/Src/system_stm32f4xx.o - .debug_line 0x000000000000233f 0x7a ./Core/Startup/startup_stm32f439zitx.o - .debug_line 0x00000000000023b9 0x9f5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_line 0x0000000000002dae 0xcb9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_line 0x0000000000003a67 0xf23 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - .debug_line 0x000000000000498a 0x199f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o - .debug_line 0x0000000000006329 0xb5b ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_line 0x0000000000006e84 0x1451 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o - .debug_line 0x00000000000082d5 0xd50 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_line 0x0000000000009025 0x954 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o - .debug_line 0x0000000000009979 0x28ad ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_line 0x000000000000c226 0x1ba1 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o +.debug_line 0x0000000000000000 0xcef7 + .debug_line 0x0000000000000000 0xc3d ./Core/Src/main.o + .debug_line 0x0000000000000c3d 0x871 ./Core/Src/stm32f4xx_hal_msp.o + .debug_line 0x00000000000014ae 0x79a ./Core/Src/stm32f4xx_it.o + .debug_line 0x0000000000001c48 0x74a ./Core/Src/system_stm32f4xx.o + .debug_line 0x0000000000002392 0x7a ./Core/Startup/startup_stm32f439zitx.o + .debug_line 0x000000000000240c 0x9f5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_line 0x0000000000002e01 0xcb9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_line 0x0000000000003aba 0x199f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + .debug_line 0x0000000000005459 0xb5b ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_line 0x0000000000005fb4 0x1451 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + .debug_line 0x0000000000007405 0xd50 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_line 0x0000000000008155 0x954 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + .debug_line 0x0000000000008aa9 0x28ad ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .debug_line 0x000000000000b356 0x1ba1 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o -.debug_str 0x0000000000000000 0xdbbe7 - .debug_str 0x0000000000000000 0xd7da5 ./Core/Src/main.o - 0xd815c (size before relaxing) - .debug_str 0x00000000000d7da5 0x65a ./Core/Src/stm32f4xx_hal_msp.o - 0xd5656 (size before relaxing) - .debug_str 0x00000000000d83ff 0xef ./Core/Src/stm32f4xx_it.o - 0xd4605 (size before relaxing) - .debug_str 0x00000000000d84ee 0xdb ./Core/Src/system_stm32f4xx.o +.debug_str 0x0000000000000000 0xdb955 + .debug_str 0x0000000000000000 0xd7df6 ./Core/Src/main.o + 0xd81ad (size before relaxing) + .debug_str 0x00000000000d7df6 0xcb ./Core/Src/stm32f4xx_hal_msp.o + 0xd50dc (size before relaxing) + .debug_str 0x00000000000d7ec1 0xc9 ./Core/Src/stm32f4xx_it.o + 0xd417d (size before relaxing) + .debug_str 0x00000000000d7f8a 0xdb ./Core/Src/system_stm32f4xx.o 0xd3dd1 (size before relaxing) - .debug_str 0x00000000000d85c9 0x34 ./Core/Startup/startup_stm32f439zitx.o + .debug_str 0x00000000000d8065 0x34 ./Core/Startup/startup_stm32f439zitx.o 0x6b (size before relaxing) - .debug_str 0x00000000000d85fd 0x648 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_str 0x00000000000d8099 0xbb0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o 0xd49fe (size before relaxing) - .debug_str 0x00000000000d8c45 0x366 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_str 0x00000000000d8c49 0x38d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o 0xd472c (size before relaxing) - .debug_str 0x00000000000d8fab 0x317 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - 0xd41d8 (size before relaxing) - .debug_str 0x00000000000d92c2 0x1260 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + .debug_str 0x00000000000d8fd6 0x1260 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o 0xd56cd (size before relaxing) - .debug_str 0x00000000000da522 0xce ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_str 0x00000000000da236 0xce ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o 0xd3f4c (size before relaxing) - .debug_str 0x00000000000da5f0 0x7fc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + .debug_str 0x00000000000da304 0x7fc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o 0xd489c (size before relaxing) - .debug_str 0x00000000000dadec 0x21f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_str 0x00000000000dab00 0x21f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o 0xd4205 (size before relaxing) - .debug_str 0x00000000000db00b 0x16f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + .debug_str 0x00000000000dad1f 0x16f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o 0xd3ebe (size before relaxing) - .debug_str 0x00000000000db17a 0x5c2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .debug_str 0x00000000000dae8e 0x61c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o 0xd47d3 (size before relaxing) - .debug_str 0x00000000000db73c 0x4ab ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + .debug_str 0x00000000000db4aa 0x4ab ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o 0xd4777 (size before relaxing) -.debug_frame 0x0000000000000000 0x379c - .debug_frame 0x0000000000000000 0x280 ./Core/Src/main.o - .debug_frame 0x0000000000000280 0x160 ./Core/Src/stm32f4xx_hal_msp.o - .debug_frame 0x00000000000003e0 0x120 ./Core/Src/stm32f4xx_it.o +.debug_frame 0x0000000000000000 0x354c + .debug_frame 0x0000000000000000 0x29c ./Core/Src/main.o + .debug_frame 0x000000000000029c 0x160 ./Core/Src/stm32f4xx_hal_msp.o + .debug_frame 0x00000000000003fc 0x104 ./Core/Src/stm32f4xx_it.o .debug_frame 0x0000000000000500 0x58 ./Core/Src/system_stm32f4xx.o .debug_frame 0x0000000000000558 0x3b4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o .debug_frame 0x000000000000090c 0x508 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_frame 0x0000000000000e14 0x250 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - .debug_frame 0x0000000000001064 0x8c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o - .debug_frame 0x0000000000001924 0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_frame 0x0000000000001a70 0x5b8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o - .debug_frame 0x0000000000002028 0x1f4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_frame 0x000000000000221c 0x22c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o - .debug_frame 0x0000000000002448 0x954 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_frame 0x0000000000002d9c 0x7c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o - .debug_frame 0x000000000000355c 0x20 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-memset.o) - .debug_frame 0x000000000000357c 0x2c /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-init.o) - .debug_frame 0x00000000000035a8 0xb0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) - .debug_frame 0x0000000000003658 0x58 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) - .debug_frame 0x00000000000036b0 0x20 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-atexit.o) - .debug_frame 0x00000000000036d0 0x38 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-fini.o) - .debug_frame 0x0000000000003708 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) - .debug_frame 0x000000000000373c 0x2c /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_frame 0x0000000000003768 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .debug_frame 0x0000000000000e14 0x8c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o + .debug_frame 0x00000000000016d4 0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_frame 0x0000000000001820 0x5b8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.o + .debug_frame 0x0000000000001dd8 0x1f4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_frame 0x0000000000001fcc 0x22c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.o + .debug_frame 0x00000000000021f8 0x954 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .debug_frame 0x0000000000002b4c 0x7c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o + .debug_frame 0x000000000000330c 0x20 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-memset.o) + .debug_frame 0x000000000000332c 0x2c /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-init.o) + .debug_frame 0x0000000000003358 0xb0 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lock.o) + .debug_frame 0x0000000000003408 0x58 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__call_atexit.o) + .debug_frame 0x0000000000003460 0x20 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-atexit.o) + .debug_frame 0x0000000000003480 0x38 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-fini.o) + .debug_frame 0x00000000000034b8 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-__atexit.o) + .debug_frame 0x00000000000034ec 0x2c /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x0000000000003518 0x34 /opt/st/stm32cubeide_1.14.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .debug_line_str 0x0000000000000000 0x5f diff --git a/csprng.ioc b/csprng.ioc index 5527a42..56c0b3b 100644 --- a/csprng.ioc +++ b/csprng.ioc @@ -17,8 +17,9 @@ Mcu.IP2=RCC Mcu.IP3=RNG Mcu.IP4=SYS Mcu.IP5=USART3 -Mcu.IP6=USB_OTG_FS -Mcu.IPNb=7 +Mcu.IP6=USART6 +Mcu.IP7=USB_OTG_FS +Mcu.IPNb=8 Mcu.Name=STM32F439Z(G-I)Tx Mcu.Package=LQFP144 Mcu.Pin0=PC13 @@ -39,19 +40,21 @@ Mcu.Pin21=PA11 Mcu.Pin22=PA12 Mcu.Pin23=PA13 Mcu.Pin24=PA14 -Mcu.Pin25=PG11 -Mcu.Pin26=PG13 -Mcu.Pin27=PB7 -Mcu.Pin28=VP_RNG_VS_RNG -Mcu.Pin29=VP_SYS_VS_Systick +Mcu.Pin25=PG9 +Mcu.Pin26=PG11 +Mcu.Pin27=PG13 +Mcu.Pin28=PG14 +Mcu.Pin29=PB7 Mcu.Pin3=PH0/OSC_IN +Mcu.Pin30=VP_RNG_VS_RNG +Mcu.Pin31=VP_SYS_VS_Systick Mcu.Pin4=PH1/OSC_OUT Mcu.Pin5=PC1 Mcu.Pin6=PA1 Mcu.Pin7=PA2 Mcu.Pin8=PA7 Mcu.Pin9=PC4 -Mcu.PinsNb=30 +Mcu.PinsNb=32 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F439ZITx @@ -67,7 +70,7 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false -NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true +NVIC.USART6_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false PA1.GPIOParameters=GPIO_Label PA1.GPIO_Label=RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] @@ -188,6 +191,9 @@ PG13.GPIO_Label=RMII_TXD0 [LAN8742A-CZ-TR_TXD0] PG13.Locked=true PG13.Mode=RMII PG13.Signal=ETH_TXD0 +PG14.Locked=true +PG14.Mode=Asynchronous +PG14.Signal=USART6_TX PG6.GPIOParameters=GPIO_Label PG6.GPIO_Label=USB_PowerSwitchOn [STMPS2151STR_EN] PG6.Locked=true @@ -196,6 +202,9 @@ PG7.GPIOParameters=GPIO_Label PG7.GPIO_Label=USB_OverCurrent [STMPS2151STR_FAULT] PG7.Locked=true PG7.Signal=GPIO_Input +PG9.Locked=true +PG9.Mode=Asynchronous +PG9.Signal=USART6_RX PH0/OSC_IN.GPIOParameters=GPIO_Label PH0/OSC_IN.GPIO_Label=MCO [STM32F103CBT6_PA8] PH0/OSC_IN.Locked=true @@ -236,7 +245,7 @@ ProjectManager.ToolChainLocation= ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ETH_Init-ETH-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,5-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,6-MX_RNG_Init-RNG-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ETH_Init-ETH-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,5-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,6-MX_RNG_Init-RNG-false-HAL-true,7-MX_USART6_UART_Init-USART6-false-HAL-true RCC.48MHZClocksFreq_Value=48000000 RCC.ADC12outputFreq_Value=72000000 RCC.ADC34outputFreq_Value=72000000 @@ -308,6 +317,8 @@ SH.GPXTI13.0=GPIO_EXTI13 SH.GPXTI13.ConfNb=1 USART3.IPParameters=VirtualMode USART3.VirtualMode=VM_ASYNC +USART6.IPParameters=VirtualMode +USART6.VirtualMode=VM_ASYNC USB_OTG_FS.IPParameters=VirtualMode USB_OTG_FS.VirtualMode=Device_Only VP_RNG_VS_RNG.Mode=RNG_Activate